[PATCH v5 2/4] gdb: provide openrisc target description XML files.

Stafford Horne
2017-03-17T05:44:31Z

Add xml tdesc for openrisc, this is compatible with the tdesc returned by
OpenOCD.

gdb/ChangeLog:

2017-01-20 Stafford Horne <shorne@gmail.com>

* features/Makefile: Add or1k.xml to build.
* features/or1k.xml: New file.
* features/or1k.c: Generated.
---
gdb/features/Makefile | 2 +
gdb/features/or1k.c | 2280 +++++++++++++++++++++++++++++++++++++++++++++++++
gdb/features/or1k.xml | 2274 ++++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 4556 insertions(+)
create mode 100644 gdb/features/or1k.c
create mode 100644 gdb/features/or1k.xml

diff --git a/gdb/features/Makefile b/gdb/features/Makefile
index 3bc8b5a..d16d5ba 100644
--- a/gdb/features/Makefile
+++ b/gdb/features/Makefile
@@ -93,6 +93,7 @@ mips64-expedite = r29,pc
mips64-dsp-expedite = r29,pc
microblaze-expedite = r1,rpc
nios2-linux-expedite = sp,pc
+or1k-expedite = r1,npc
powerpc-expedite = r1,pc
rs6000/powerpc-cell32l-expedite = r1,pc,r0,orig_r3,r4
rs6000/powerpc-cell64l-expedite = r1,pc,r0,orig_r3,r4
@@ -179,6 +180,7 @@ XMLTOC = \
nds32.xml \
nios2-linux.xml \
nios2.xml \
+ or1k.xml \
rs6000/powerpc-32.xml \
rs6000/powerpc-32l.xml \
rs6000/powerpc-403.xml \
diff --git a/gdb/features/or1k.c b/gdb/features/or1k.c
new file mode 100644
index 0000000..9878720
--- /dev/null
+++ b/gdb/features/or1k.c
@@ -0,0 +1,2280 @@
+/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
+ Original: or1k.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_or1k;
+static void
+initialize_tdesc_or1k (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type;
+ struct tdesc_type *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("or1k"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.or1k.group0");
+ type = tdesc_create_flags (feature, "sr_flags", 4);
+ tdesc_add_flag (type, 0, "SM");
+ tdesc_add_flag (type, 1, "TEE");
+ tdesc_add_flag (type, 2, "IEE");
+ tdesc_add_flag (type, 3, "DCE");
+ tdesc_add_flag (type, 4, "ICE");
+ tdesc_add_flag (type, 5, "DME");
+ tdesc_add_flag (type, 6, "IME");
+ tdesc_add_flag (type, 7, "LEE");
+ tdesc_add_flag (type, 8, "CE");
+ tdesc_add_flag (type, 9, "F");
+ tdesc_add_flag (type, 10, "CY");
+ tdesc_add_flag (type, 11, "OV");
+ tdesc_add_flag (type, 12, "OVE");
+ tdesc_add_flag (type, 13, "DSX");
+ tdesc_add_flag (type, 14, "EPH");
+ tdesc_add_flag (type, 15, "FO");
+ tdesc_add_flag (type, 16, "SUMRA");
+ tdesc_add_bitfield (type, "CID", 28, 31);
+
+ tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "data_ptr");
+ tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "ppc", 32, 1, NULL, 32, "code_ptr");
+ tdesc_create_reg (feature, "npc", 33, 1, NULL, 32, "code_ptr");
+ tdesc_create_reg (feature, "sr", 34, 1, NULL, 32, "sr_flags");
+ tdesc_create_reg (feature, "vr", 35, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "upr", 36, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "cpucfgr", 37, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "dmmucfgr", 38, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "immucfgr", 39, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "dccfgr", 40, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "iccfgr", 41, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "dcfgr", 42, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "pccfgr", 43, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "fpcsr", 44, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "epcr0", 45, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "epcr1", 46, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "epcr2", 47, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "epcr3", 48, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "epcr4", 49, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "epcr5", 50, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "epcr6", 51, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "epcr7", 52, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "epcr8", 53, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "epcr9", 54, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "epcr10", 55, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "epcr11", 56, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "epcr12", 57, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "epcr13", 58, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "epcr14", 59, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "epcr15", 60, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "eear0", 61, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "eear1", 62, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "eear2", 63, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "eear3", 64, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "eear4", 65, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "eear5", 66, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "eear6", 67, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "eear7", 68, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "eear8", 69, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "eear9", 70, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "eear10", 71, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "eear11", 72, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "eear12", 73, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "eear13", 74, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "eear14", 75, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "eear15", 76, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "esr0", 77, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "esr1", 78, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "esr2", 79, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "esr3", 80, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "esr4", 81, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "esr5", 82, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "esr6", 83, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "esr7", 84, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "esr8", 85, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "esr9", 86, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "esr10", 87, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "esr11", 88, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "esr12", 89, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "esr13", 90, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "esr14", 91, 1, "system", 32, "int");
+ tdesc_create_reg (feature, "esr15", 92, 1, "system", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.or1k.group1");
+ tdesc_create_reg (feature, "dmmuucr", 93, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dmmuupr", 94, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbeir", 95, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "datbmr0", 96, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "datbmr1", 97, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "datbmr2", 98, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "datbmr3", 99, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "datbtr0", 100, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "datbtr1", 101, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "datbtr2", 102, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "datbtr3", 103, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr0", 104, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr0", 105, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr1", 106, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr1", 107, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr2", 108, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr2", 109, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr3", 110, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr3", 111, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr4", 112, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr4", 113, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr5", 114, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr5", 115, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr6", 116, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr6", 117, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr7", 118, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr7", 119, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr8", 120, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr8", 121, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr9", 122, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr9", 123, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr10", 124, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr10", 125, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr11", 126, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr11", 127, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr12", 128, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr12", 129, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr13", 130, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr13", 131, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr14", 132, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr14", 133, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr15", 134, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr15", 135, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr16", 136, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr16", 137, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr17", 138, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr17", 139, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr18", 140, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr18", 141, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr19", 142, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr19", 143, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr20", 144, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr20", 145, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr21", 146, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr21", 147, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr22", 148, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr22", 149, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr23", 150, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr23", 151, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr24", 152, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr24", 153, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr25", 154, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr25", 155, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr26", 156, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr26", 157, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr27", 158, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr27", 159, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr28", 160, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr28", 161, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr29", 162, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr29", 163, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr30", 164, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr30", 165, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr31", 166, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr31", 167, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr32", 168, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr32", 169, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr33", 170, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr33", 171, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr34", 172, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr34", 173, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr35", 174, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr35", 175, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr36", 176, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr36", 177, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr37", 178, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr37", 179, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr38", 180, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr38", 181, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr39", 182, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr39", 183, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr40", 184, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr40", 185, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr41", 186, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr41", 187, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr42", 188, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr42", 189, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr43", 190, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr43", 191, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr44", 192, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr44", 193, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr45", 194, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr45", 195, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr46", 196, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr46", 197, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr47", 198, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr47", 199, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr48", 200, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr48", 201, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr49", 202, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr49", 203, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr50", 204, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr50", 205, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr51", 206, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr51", 207, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr52", 208, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr52", 209, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr53", 210, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr53", 211, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr54", 212, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr54", 213, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr55", 214, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr55", 215, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr56", 216, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr56", 217, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr57", 218, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr57", 219, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr58", 220, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr58", 221, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr59", 222, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr59", 223, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr60", 224, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr60", 225, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr61", 226, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr61", 227, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr62", 228, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr62", 229, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr63", 230, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr63", 231, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr64", 232, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr64", 233, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr65", 234, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr65", 235, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr66", 236, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr66", 237, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr67", 238, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr67", 239, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr68", 240, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr68", 241, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr69", 242, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr69", 243, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr70", 244, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr70", 245, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr71", 246, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr71", 247, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr72", 248, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr72", 249, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr73", 250, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr73", 251, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr74", 252, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr74", 253, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr75", 254, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr75", 255, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr76", 256, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr76", 257, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr77", 258, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr77", 259, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr78", 260, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr78", 261, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr79", 262, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr79", 263, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr80", 264, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr80", 265, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr81", 266, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr81", 267, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr82", 268, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr82", 269, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr83", 270, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr83", 271, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr84", 272, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr84", 273, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr85", 274, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr85", 275, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr86", 276, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr86", 277, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr87", 278, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr87", 279, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr88", 280, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr88", 281, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr89", 282, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr89", 283, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr90", 284, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr90", 285, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr91", 286, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr91", 287, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr92", 288, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr92", 289, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr93", 290, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr93", 291, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr94", 292, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr94", 293, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr95", 294, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr95", 295, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr96", 296, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr96", 297, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr97", 298, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr97", 299, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr98", 300, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr98", 301, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr99", 302, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr99", 303, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr100", 304, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr100", 305, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr101", 306, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr101", 307, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr102", 308, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr102", 309, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr103", 310, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr103", 311, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr104", 312, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr104", 313, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr105", 314, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr105", 315, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr106", 316, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr106", 317, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr107", 318, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr107", 319, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr108", 320, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr108", 321, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr109", 322, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr109", 323, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr110", 324, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr110", 325, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr111", 326, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr111", 327, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr112", 328, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr112", 329, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr113", 330, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr113", 331, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr114", 332, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr114", 333, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr115", 334, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr115", 335, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr116", 336, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr116", 337, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr117", 338, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr117", 339, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr118", 340, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr118", 341, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr119", 342, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr119", 343, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr120", 344, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr120", 345, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr121", 346, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr121", 347, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr122", 348, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr122", 349, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr123", 350, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr123", 351, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr124", 352, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr124", 353, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr125", 354, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr125", 355, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr126", 356, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr126", 357, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0mr127", 358, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw0tr127", 359, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr0", 360, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr0", 361, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr1", 362, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr1", 363, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr2", 364, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr2", 365, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr3", 366, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr3", 367, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr4", 368, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr4", 369, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr5", 370, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr5", 371, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr6", 372, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr6", 373, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr7", 374, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr7", 375, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr8", 376, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr8", 377, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr9", 378, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr9", 379, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr10", 380, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr10", 381, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr11", 382, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr11", 383, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr12", 384, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr12", 385, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr13", 386, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr13", 387, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr14", 388, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr14", 389, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr15", 390, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr15", 391, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr16", 392, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr16", 393, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr17", 394, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr17", 395, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr18", 396, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr18", 397, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr19", 398, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr19", 399, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr20", 400, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr20", 401, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr21", 402, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr21", 403, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr22", 404, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr22", 405, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr23", 406, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr23", 407, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr24", 408, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr24", 409, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr25", 410, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr25", 411, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr26", 412, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr26", 413, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr27", 414, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr27", 415, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr28", 416, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr28", 417, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr29", 418, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr29", 419, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr30", 420, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr30", 421, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr31", 422, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr31", 423, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr32", 424, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr32", 425, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr33", 426, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr33", 427, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr34", 428, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr34", 429, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr35", 430, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr35", 431, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr36", 432, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr36", 433, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr37", 434, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr37", 435, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr38", 436, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr38", 437, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr39", 438, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr39", 439, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr40", 440, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr40", 441, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr41", 442, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr41", 443, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr42", 444, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr42", 445, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr43", 446, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr43", 447, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr44", 448, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr44", 449, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr45", 450, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr45", 451, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr46", 452, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr46", 453, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr47", 454, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr47", 455, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr48", 456, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr48", 457, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr49", 458, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr49", 459, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr50", 460, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr50", 461, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr51", 462, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr51", 463, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr52", 464, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr52", 465, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr53", 466, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr53", 467, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr54", 468, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr54", 469, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr55", 470, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr55", 471, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr56", 472, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr56", 473, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr57", 474, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr57", 475, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr58", 476, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr58", 477, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr59", 478, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr59", 479, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr60", 480, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr60", 481, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr61", 482, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr61", 483, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr62", 484, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr62", 485, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr63", 486, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr63", 487, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr64", 488, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr64", 489, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr65", 490, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr65", 491, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr66", 492, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr66", 493, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr67", 494, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr67", 495, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr68", 496, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr68", 497, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr69", 498, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr69", 499, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr70", 500, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr70", 501, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr71", 502, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr71", 503, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr72", 504, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr72", 505, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr73", 506, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr73", 507, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr74", 508, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr74", 509, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr75", 510, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr75", 511, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr76", 512, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr76", 513, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr77", 514, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr77", 515, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr78", 516, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr78", 517, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr79", 518, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr79", 519, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr80", 520, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr80", 521, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr81", 522, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr81", 523, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr82", 524, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr82", 525, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr83", 526, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr83", 527, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr84", 528, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr84", 529, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr85", 530, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr85", 531, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr86", 532, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr86", 533, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr87", 534, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr87", 535, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr88", 536, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr88", 537, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr89", 538, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr89", 539, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr90", 540, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr90", 541, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr91", 542, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr91", 543, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr92", 544, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr92", 545, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr93", 546, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr93", 547, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr94", 548, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr94", 549, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr95", 550, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr95", 551, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr96", 552, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr96", 553, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr97", 554, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr97", 555, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr98", 556, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr98", 557, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr99", 558, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr99", 559, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr100", 560, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr100", 561, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr101", 562, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr101", 563, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr102", 564, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr102", 565, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr103", 566, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr103", 567, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr104", 568, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr104", 569, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr105", 570, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr105", 571, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr106", 572, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr106", 573, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr107", 574, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr107", 575, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr108", 576, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr108", 577, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr109", 578, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr109", 579, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr110", 580, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr110", 581, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr111", 582, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr111", 583, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr112", 584, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr112", 585, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr113", 586, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr113", 587, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr114", 588, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr114", 589, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr115", 590, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr115", 591, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr116", 592, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr116", 593, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr117", 594, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr117", 595, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr118", 596, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr118", 597, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr119", 598, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr119", 599, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr120", 600, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr120", 601, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr121", 602, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr121", 603, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr122", 604, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr122", 605, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr123", 606, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr123", 607, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr124", 608, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr124", 609, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr125", 610, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr125", 611, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr126", 612, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr126", 613, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1mr127", 614, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw1tr127", 615, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr0", 616, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr0", 617, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr1", 618, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr1", 619, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr2", 620, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr2", 621, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr3", 622, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr3", 623, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr4", 624, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr4", 625, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr5", 626, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr5", 627, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr6", 628, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr6", 629, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr7", 630, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr7", 631, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr8", 632, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr8", 633, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr9", 634, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr9", 635, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr10", 636, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr10", 637, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr11", 638, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr11", 639, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr12", 640, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr12", 641, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr13", 642, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr13", 643, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr14", 644, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr14", 645, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr15", 646, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr15", 647, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr16", 648, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr16", 649, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr17", 650, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr17", 651, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr18", 652, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr18", 653, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr19", 654, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr19", 655, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr20", 656, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr20", 657, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr21", 658, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr21", 659, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr22", 660, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr22", 661, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr23", 662, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr23", 663, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr24", 664, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr24", 665, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr25", 666, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr25", 667, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr26", 668, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr26", 669, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr27", 670, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr27", 671, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr28", 672, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr28", 673, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr29", 674, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr29", 675, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr30", 676, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr30", 677, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr31", 678, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr31", 679, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr32", 680, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr32", 681, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr33", 682, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr33", 683, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr34", 684, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr34", 685, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr35", 686, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr35", 687, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr36", 688, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr36", 689, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr37", 690, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr37", 691, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr38", 692, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr38", 693, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr39", 694, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr39", 695, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr40", 696, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr40", 697, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr41", 698, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr41", 699, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr42", 700, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr42", 701, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr43", 702, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr43", 703, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr44", 704, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr44", 705, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr45", 706, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr45", 707, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr46", 708, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr46", 709, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr47", 710, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr47", 711, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr48", 712, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr48", 713, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr49", 714, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr49", 715, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr50", 716, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr50", 717, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr51", 718, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr51", 719, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr52", 720, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr52", 721, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr53", 722, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr53", 723, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr54", 724, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr54", 725, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr55", 726, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr55", 727, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr56", 728, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr56", 729, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr57", 730, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr57", 731, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr58", 732, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr58", 733, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr59", 734, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr59", 735, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr60", 736, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr60", 737, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr61", 738, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr61", 739, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr62", 740, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr62", 741, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr63", 742, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr63", 743, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr64", 744, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr64", 745, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr65", 746, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr65", 747, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr66", 748, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr66", 749, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr67", 750, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr67", 751, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr68", 752, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr68", 753, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr69", 754, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr69", 755, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr70", 756, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr70", 757, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr71", 758, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr71", 759, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr72", 760, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr72", 761, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr73", 762, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr73", 763, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr74", 764, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr74", 765, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr75", 766, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr75", 767, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr76", 768, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr76", 769, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr77", 770, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr77", 771, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr78", 772, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr78", 773, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr79", 774, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr79", 775, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr80", 776, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr80", 777, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr81", 778, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr81", 779, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr82", 780, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr82", 781, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr83", 782, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr83", 783, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr84", 784, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr84", 785, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr85", 786, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr85", 787, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr86", 788, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr86", 789, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr87", 790, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr87", 791, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr88", 792, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr88", 793, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr89", 794, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr89", 795, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr90", 796, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr90", 797, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr91", 798, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr91", 799, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr92", 800, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr92", 801, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr93", 802, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr93", 803, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr94", 804, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr94", 805, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr95", 806, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr95", 807, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr96", 808, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr96", 809, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr97", 810, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr97", 811, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr98", 812, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr98", 813, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr99", 814, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr99", 815, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr100", 816, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr100", 817, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr101", 818, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr101", 819, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr102", 820, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr102", 821, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr103", 822, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr103", 823, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr104", 824, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr104", 825, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr105", 826, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr105", 827, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr106", 828, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr106", 829, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr107", 830, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr107", 831, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr108", 832, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr108", 833, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr109", 834, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr109", 835, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr110", 836, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr110", 837, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr111", 838, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr111", 839, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr112", 840, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr112", 841, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr113", 842, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr113", 843, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr114", 844, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr114", 845, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr115", 846, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr115", 847, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr116", 848, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr116", 849, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr117", 850, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr117", 851, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr118", 852, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr118", 853, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr119", 854, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr119", 855, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr120", 856, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr120", 857, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr121", 858, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr121", 859, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr122", 860, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr122", 861, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr123", 862, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr123", 863, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr124", 864, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr124", 865, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr125", 866, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr125", 867, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr126", 868, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr126", 869, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2mr127", 870, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw2tr127", 871, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr0", 872, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr0", 873, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr1", 874, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr1", 875, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr2", 876, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr2", 877, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr3", 878, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr3", 879, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr4", 880, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr4", 881, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr5", 882, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr5", 883, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr6", 884, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr6", 885, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr7", 886, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr7", 887, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr8", 888, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr8", 889, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr9", 890, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr9", 891, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr10", 892, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr10", 893, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr11", 894, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr11", 895, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr12", 896, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr12", 897, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr13", 898, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr13", 899, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr14", 900, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr14", 901, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr15", 902, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr15", 903, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr16", 904, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr16", 905, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr17", 906, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr17", 907, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr18", 908, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr18", 909, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr19", 910, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr19", 911, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr20", 912, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr20", 913, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr21", 914, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr21", 915, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr22", 916, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr22", 917, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr23", 918, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr23", 919, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr24", 920, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr24", 921, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr25", 922, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr25", 923, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr26", 924, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr26", 925, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr27", 926, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr27", 927, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr28", 928, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr28", 929, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr29", 930, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr29", 931, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr30", 932, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr30", 933, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr31", 934, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr31", 935, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr32", 936, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr32", 937, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr33", 938, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr33", 939, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr34", 940, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr34", 941, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr35", 942, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr35", 943, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr36", 944, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr36", 945, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr37", 946, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr37", 947, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr38", 948, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr38", 949, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr39", 950, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr39", 951, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr40", 952, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr40", 953, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr41", 954, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr41", 955, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr42", 956, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr42", 957, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr43", 958, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr43", 959, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr44", 960, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr44", 961, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr45", 962, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr45", 963, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr46", 964, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr46", 965, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr47", 966, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr47", 967, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr48", 968, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr48", 969, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr49", 970, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr49", 971, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr50", 972, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr50", 973, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr51", 974, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr51", 975, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr52", 976, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr52", 977, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr53", 978, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr53", 979, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr54", 980, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr54", 981, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr55", 982, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr55", 983, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr56", 984, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr56", 985, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr57", 986, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr57", 987, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr58", 988, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr58", 989, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr59", 990, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr59", 991, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr60", 992, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr60", 993, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr61", 994, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr61", 995, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr62", 996, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr62", 997, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr63", 998, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr63", 999, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr64", 1000, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr64", 1001, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr65", 1002, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr65", 1003, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr66", 1004, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr66", 1005, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr67", 1006, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr67", 1007, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr68", 1008, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr68", 1009, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr69", 1010, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr69", 1011, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr70", 1012, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr70", 1013, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr71", 1014, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr71", 1015, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr72", 1016, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr72", 1017, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr73", 1018, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr73", 1019, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr74", 1020, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr74", 1021, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr75", 1022, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr75", 1023, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr76", 1024, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr76", 1025, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr77", 1026, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr77", 1027, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr78", 1028, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr78", 1029, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr79", 1030, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr79", 1031, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr80", 1032, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr80", 1033, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr81", 1034, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr81", 1035, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr82", 1036, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr82", 1037, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr83", 1038, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr83", 1039, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr84", 1040, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr84", 1041, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr85", 1042, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr85", 1043, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr86", 1044, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr86", 1045, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr87", 1046, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr87", 1047, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr88", 1048, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr88", 1049, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr89", 1050, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr89", 1051, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr90", 1052, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr90", 1053, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr91", 1054, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr91", 1055, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr92", 1056, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr92", 1057, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr93", 1058, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr93", 1059, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr94", 1060, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr94", 1061, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr95", 1062, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr95", 1063, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr96", 1064, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr96", 1065, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr97", 1066, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr97", 1067, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr98", 1068, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr98", 1069, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr99", 1070, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr99", 1071, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr100", 1072, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr100", 1073, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr101", 1074, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr101", 1075, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr102", 1076, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr102", 1077, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr103", 1078, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr103", 1079, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr104", 1080, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr104", 1081, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr105", 1082, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr105", 1083, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr106", 1084, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr106", 1085, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr107", 1086, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr107", 1087, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr108", 1088, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr108", 1089, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr109", 1090, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr109", 1091, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr110", 1092, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr110", 1093, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr111", 1094, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr111", 1095, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr112", 1096, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr112", 1097, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr113", 1098, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr113", 1099, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr114", 1100, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr114", 1101, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr115", 1102, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr115", 1103, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr116", 1104, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr116", 1105, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr117", 1106, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr117", 1107, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr118", 1108, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr118", 1109, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr119", 1110, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr119", 1111, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr120", 1112, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr120", 1113, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr121", 1114, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr121", 1115, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr122", 1116, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr122", 1117, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr123", 1118, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr123", 1119, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr124", 1120, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr124", 1121, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr125", 1122, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr125", 1123, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr126", 1124, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr126", 1125, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3mr127", 1126, 1, "dmmu", 32, "int");
+ tdesc_create_reg (feature, "dtlbw3tr127", 1127, 1, "dmmu", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.or1k.group10");
+ tdesc_create_reg (feature, "ttmr", 1128, 1, "timer", 32, "int");
+ tdesc_create_reg (feature, "ttcr", 1129, 1, "timer", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.or1k.group2");
+ tdesc_create_reg (feature, "immucr", 1130, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "immupr", 1131, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbeir", 1132, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "iatbmr0", 1133, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "iatbmr1", 1134, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "iatbmr2", 1135, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "iatbmr3", 1136, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "iatbtr0", 1137, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "iatbtr1", 1138, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "iatbtr2", 1139, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "iatbtr3", 1140, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr0", 1141, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr0", 1142, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr1", 1143, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr1", 1144, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr2", 1145, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr2", 1146, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr3", 1147, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr3", 1148, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr4", 1149, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr4", 1150, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr5", 1151, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr5", 1152, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr6", 1153, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr6", 1154, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr7", 1155, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr7", 1156, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr8", 1157, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr8", 1158, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr9", 1159, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr9", 1160, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr10", 1161, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr10", 1162, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr11", 1163, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr11", 1164, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr12", 1165, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr12", 1166, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr13", 1167, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr13", 1168, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr14", 1169, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr14", 1170, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr15", 1171, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr15", 1172, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr16", 1173, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr16", 1174, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr17", 1175, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr17", 1176, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr18", 1177, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr18", 1178, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr19", 1179, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr19", 1180, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr20", 1181, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr20", 1182, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr21", 1183, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr21", 1184, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr22", 1185, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr22", 1186, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr23", 1187, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr23", 1188, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr24", 1189, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr24", 1190, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr25", 1191, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr25", 1192, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr26", 1193, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr26", 1194, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr27", 1195, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr27", 1196, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr28", 1197, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr28", 1198, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr29", 1199, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr29", 1200, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr30", 1201, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr30", 1202, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr31", 1203, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr31", 1204, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr32", 1205, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr32", 1206, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr33", 1207, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr33", 1208, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr34", 1209, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr34", 1210, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr35", 1211, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr35", 1212, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr36", 1213, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr36", 1214, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr37", 1215, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr37", 1216, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr38", 1217, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr38", 1218, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr39", 1219, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr39", 1220, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr40", 1221, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr40", 1222, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr41", 1223, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr41", 1224, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr42", 1225, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr42", 1226, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr43", 1227, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr43", 1228, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr44", 1229, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr44", 1230, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr45", 1231, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr45", 1232, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr46", 1233, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr46", 1234, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr47", 1235, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr47", 1236, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr48", 1237, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr48", 1238, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr49", 1239, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr49", 1240, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr50", 1241, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr50", 1242, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr51", 1243, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr51", 1244, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr52", 1245, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr52", 1246, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr53", 1247, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr53", 1248, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr54", 1249, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr54", 1250, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr55", 1251, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr55", 1252, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr56", 1253, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr56", 1254, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr57", 1255, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr57", 1256, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr58", 1257, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr58", 1258, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr59", 1259, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr59", 1260, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr60", 1261, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr60", 1262, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr61", 1263, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr61", 1264, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr62", 1265, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr62", 1266, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr63", 1267, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr63", 1268, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr64", 1269, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr64", 1270, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr65", 1271, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr65", 1272, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr66", 1273, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr66", 1274, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr67", 1275, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr67", 1276, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr68", 1277, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr68", 1278, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr69", 1279, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr69", 1280, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr70", 1281, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr70", 1282, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr71", 1283, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr71", 1284, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr72", 1285, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr72", 1286, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr73", 1287, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr73", 1288, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr74", 1289, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr74", 1290, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr75", 1291, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr75", 1292, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr76", 1293, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr76", 1294, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr77", 1295, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr77", 1296, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr78", 1297, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr78", 1298, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr79", 1299, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr79", 1300, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr80", 1301, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr80", 1302, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr81", 1303, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr81", 1304, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr82", 1305, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr82", 1306, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr83", 1307, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr83", 1308, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr84", 1309, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr84", 1310, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr85", 1311, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr85", 1312, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr86", 1313, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr86", 1314, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr87", 1315, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr87", 1316, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr88", 1317, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr88", 1318, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr89", 1319, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr89", 1320, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr90", 1321, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr90", 1322, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr91", 1323, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr91", 1324, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr92", 1325, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr92", 1326, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr93", 1327, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr93", 1328, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr94", 1329, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr94", 1330, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr95", 1331, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr95", 1332, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr96", 1333, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr96", 1334, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr97", 1335, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr97", 1336, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr98", 1337, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr98", 1338, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr99", 1339, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr99", 1340, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr100", 1341, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr100", 1342, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr101", 1343, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr101", 1344, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr102", 1345, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr102", 1346, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr103", 1347, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr103", 1348, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr104", 1349, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr104", 1350, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr105", 1351, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr105", 1352, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr106", 1353, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr106", 1354, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr107", 1355, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr107", 1356, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr108", 1357, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr108", 1358, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr109", 1359, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr109", 1360, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr110", 1361, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr110", 1362, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr111", 1363, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr111", 1364, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr112", 1365, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr112", 1366, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr113", 1367, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr113", 1368, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr114", 1369, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr114", 1370, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr115", 1371, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr115", 1372, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr116", 1373, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr116", 1374, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr117", 1375, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr117", 1376, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr118", 1377, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr118", 1378, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr119", 1379, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr119", 1380, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr120", 1381, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr120", 1382, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr121", 1383, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr121", 1384, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr122", 1385, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr122", 1386, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr123", 1387, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr123", 1388, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr124", 1389, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr124", 1390, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr125", 1391, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr125", 1392, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr126", 1393, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr126", 1394, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0mr127", 1395, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw0tr127", 1396, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr0", 1397, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr0", 1398, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr1", 1399, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr1", 1400, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr2", 1401, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr2", 1402, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr3", 1403, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr3", 1404, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr4", 1405, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr4", 1406, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr5", 1407, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr5", 1408, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr6", 1409, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr6", 1410, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr7", 1411, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr7", 1412, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr8", 1413, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr8", 1414, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr9", 1415, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr9", 1416, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr10", 1417, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr10", 1418, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr11", 1419, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr11", 1420, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr12", 1421, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr12", 1422, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr13", 1423, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr13", 1424, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr14", 1425, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr14", 1426, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr15", 1427, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr15", 1428, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr16", 1429, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr16", 1430, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr17", 1431, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr17", 1432, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr18", 1433, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr18", 1434, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr19", 1435, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr19", 1436, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr20", 1437, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr20", 1438, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr21", 1439, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr21", 1440, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr22", 1441, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr22", 1442, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr23", 1443, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr23", 1444, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr24", 1445, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr24", 1446, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr25", 1447, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr25", 1448, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr26", 1449, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr26", 1450, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr27", 1451, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr27", 1452, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr28", 1453, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr28", 1454, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr29", 1455, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr29", 1456, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr30", 1457, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr30", 1458, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr31", 1459, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr31", 1460, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr32", 1461, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr32", 1462, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr33", 1463, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr33", 1464, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr34", 1465, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr34", 1466, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr35", 1467, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr35", 1468, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr36", 1469, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr36", 1470, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr37", 1471, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr37", 1472, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr38", 1473, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr38", 1474, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr39", 1475, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr39", 1476, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr40", 1477, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr40", 1478, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr41", 1479, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr41", 1480, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr42", 1481, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr42", 1482, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr43", 1483, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr43", 1484, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr44", 1485, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr44", 1486, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr45", 1487, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr45", 1488, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr46", 1489, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr46", 1490, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr47", 1491, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr47", 1492, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr48", 1493, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr48", 1494, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr49", 1495, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr49", 1496, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr50", 1497, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr50", 1498, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr51", 1499, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr51", 1500, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr52", 1501, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr52", 1502, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr53", 1503, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr53", 1504, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr54", 1505, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr54", 1506, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr55", 1507, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr55", 1508, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr56", 1509, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr56", 1510, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr57", 1511, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr57", 1512, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr58", 1513, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr58", 1514, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr59", 1515, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr59", 1516, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr60", 1517, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr60", 1518, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr61", 1519, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr61", 1520, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr62", 1521, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr62", 1522, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr63", 1523, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr63", 1524, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr64", 1525, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr64", 1526, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr65", 1527, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr65", 1528, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr66", 1529, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr66", 1530, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr67", 1531, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr67", 1532, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr68", 1533, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr68", 1534, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr69", 1535, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr69", 1536, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr70", 1537, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr70", 1538, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr71", 1539, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr71", 1540, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr72", 1541, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr72", 1542, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr73", 1543, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr73", 1544, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr74", 1545, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr74", 1546, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr75", 1547, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr75", 1548, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr76", 1549, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr76", 1550, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr77", 1551, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr77", 1552, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr78", 1553, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr78", 1554, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr79", 1555, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr79", 1556, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr80", 1557, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr80", 1558, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr81", 1559, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr81", 1560, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr82", 1561, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr82", 1562, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr83", 1563, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr83", 1564, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr84", 1565, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr84", 1566, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr85", 1567, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr85", 1568, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr86", 1569, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr86", 1570, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr87", 1571, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr87", 1572, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr88", 1573, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr88", 1574, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr89", 1575, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr89", 1576, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr90", 1577, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr90", 1578, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr91", 1579, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr91", 1580, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr92", 1581, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr92", 1582, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr93", 1583, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr93", 1584, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr94", 1585, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr94", 1586, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr95", 1587, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr95", 1588, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr96", 1589, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr96", 1590, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr97", 1591, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr97", 1592, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr98", 1593, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr98", 1594, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr99", 1595, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr99", 1596, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr100", 1597, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr100", 1598, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr101", 1599, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr101", 1600, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr102", 1601, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr102", 1602, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr103", 1603, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr103", 1604, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr104", 1605, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr104", 1606, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr105", 1607, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr105", 1608, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr106", 1609, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr106", 1610, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr107", 1611, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr107", 1612, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr108", 1613, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr108", 1614, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr109", 1615, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr109", 1616, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr110", 1617, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr110", 1618, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr111", 1619, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr111", 1620, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr112", 1621, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr112", 1622, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr113", 1623, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr113", 1624, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr114", 1625, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr114", 1626, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr115", 1627, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr115", 1628, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr116", 1629, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr116", 1630, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr117", 1631, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr117", 1632, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr118", 1633, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr118", 1634, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr119", 1635, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr119", 1636, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr120", 1637, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr120", 1638, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr121", 1639, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr121", 1640, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr122", 1641, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr122", 1642, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr123", 1643, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr123", 1644, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr124", 1645, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr124", 1646, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr125", 1647, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr125", 1648, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr126", 1649, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr126", 1650, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1mr127", 1651, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw1tr127", 1652, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr0", 1653, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr0", 1654, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr1", 1655, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr1", 1656, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr2", 1657, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr2", 1658, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr3", 1659, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr3", 1660, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr4", 1661, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr4", 1662, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr5", 1663, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr5", 1664, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr6", 1665, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr6", 1666, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr7", 1667, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr7", 1668, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr8", 1669, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr8", 1670, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr9", 1671, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr9", 1672, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr10", 1673, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr10", 1674, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr11", 1675, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr11", 1676, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr12", 1677, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr12", 1678, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr13", 1679, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr13", 1680, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr14", 1681, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr14", 1682, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr15", 1683, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr15", 1684, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr16", 1685, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr16", 1686, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr17", 1687, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr17", 1688, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr18", 1689, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr18", 1690, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr19", 1691, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr19", 1692, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr20", 1693, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr20", 1694, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr21", 1695, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr21", 1696, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr22", 1697, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr22", 1698, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr23", 1699, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr23", 1700, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr24", 1701, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr24", 1702, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr25", 1703, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr25", 1704, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr26", 1705, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr26", 1706, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr27", 1707, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr27", 1708, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr28", 1709, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr28", 1710, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr29", 1711, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr29", 1712, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr30", 1713, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr30", 1714, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr31", 1715, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr31", 1716, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr32", 1717, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr32", 1718, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr33", 1719, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr33", 1720, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr34", 1721, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr34", 1722, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr35", 1723, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr35", 1724, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr36", 1725, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr36", 1726, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr37", 1727, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr37", 1728, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr38", 1729, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr38", 1730, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr39", 1731, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr39", 1732, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr40", 1733, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr40", 1734, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr41", 1735, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr41", 1736, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr42", 1737, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr42", 1738, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr43", 1739, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr43", 1740, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr44", 1741, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr44", 1742, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr45", 1743, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr45", 1744, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr46", 1745, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr46", 1746, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr47", 1747, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr47", 1748, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr48", 1749, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr48", 1750, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr49", 1751, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr49", 1752, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr50", 1753, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr50", 1754, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr51", 1755, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr51", 1756, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr52", 1757, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr52", 1758, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr53", 1759, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr53", 1760, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr54", 1761, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr54", 1762, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr55", 1763, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr55", 1764, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr56", 1765, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr56", 1766, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr57", 1767, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr57", 1768, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr58", 1769, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr58", 1770, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr59", 1771, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr59", 1772, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr60", 1773, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr60", 1774, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr61", 1775, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr61", 1776, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr62", 1777, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr62", 1778, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr63", 1779, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr63", 1780, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr64", 1781, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr64", 1782, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr65", 1783, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr65", 1784, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr66", 1785, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr66", 1786, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr67", 1787, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr67", 1788, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr68", 1789, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr68", 1790, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr69", 1791, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr69", 1792, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr70", 1793, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr70", 1794, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr71", 1795, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr71", 1796, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr72", 1797, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr72", 1798, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr73", 1799, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr73", 1800, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr74", 1801, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr74", 1802, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr75", 1803, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr75", 1804, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr76", 1805, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr76", 1806, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr77", 1807, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr77", 1808, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr78", 1809, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr78", 1810, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr79", 1811, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr79", 1812, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr80", 1813, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr80", 1814, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr81", 1815, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr81", 1816, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr82", 1817, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr82", 1818, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr83", 1819, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr83", 1820, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr84", 1821, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr84", 1822, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr85", 1823, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr85", 1824, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr86", 1825, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr86", 1826, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr87", 1827, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr87", 1828, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr88", 1829, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr88", 1830, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr89", 1831, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr89", 1832, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr90", 1833, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr90", 1834, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr91", 1835, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr91", 1836, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr92", 1837, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr92", 1838, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr93", 1839, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr93", 1840, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr94", 1841, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr94", 1842, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr95", 1843, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr95", 1844, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr96", 1845, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr96", 1846, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr97", 1847, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr97", 1848, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr98", 1849, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr98", 1850, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr99", 1851, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr99", 1852, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr100", 1853, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr100", 1854, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr101", 1855, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr101", 1856, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr102", 1857, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr102", 1858, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr103", 1859, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr103", 1860, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr104", 1861, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr104", 1862, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr105", 1863, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr105", 1864, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr106", 1865, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr106", 1866, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr107", 1867, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr107", 1868, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr108", 1869, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr108", 1870, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr109", 1871, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr109", 1872, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr110", 1873, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr110", 1874, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr111", 1875, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr111", 1876, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr112", 1877, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr112", 1878, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr113", 1879, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr113", 1880, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr114", 1881, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr114", 1882, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr115", 1883, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr115", 1884, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr116", 1885, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr116", 1886, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr117", 1887, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr117", 1888, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr118", 1889, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr118", 1890, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr119", 1891, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr119", 1892, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr120", 1893, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr120", 1894, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr121", 1895, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr121", 1896, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr122", 1897, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr122", 1898, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr123", 1899, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr123", 1900, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr124", 1901, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr124", 1902, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr125", 1903, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr125", 1904, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr126", 1905, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr126", 1906, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2mr127", 1907, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw2tr127", 1908, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr0", 1909, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr0", 1910, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr1", 1911, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr1", 1912, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr2", 1913, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr2", 1914, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr3", 1915, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr3", 1916, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr4", 1917, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr4", 1918, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr5", 1919, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr5", 1920, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr6", 1921, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr6", 1922, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr7", 1923, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr7", 1924, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr8", 1925, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr8", 1926, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr9", 1927, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr9", 1928, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr10", 1929, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr10", 1930, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr11", 1931, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr11", 1932, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr12", 1933, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr12", 1934, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr13", 1935, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr13", 1936, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr14", 1937, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr14", 1938, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr15", 1939, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr15", 1940, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr16", 1941, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr16", 1942, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr17", 1943, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr17", 1944, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr18", 1945, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr18", 1946, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr19", 1947, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr19", 1948, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr20", 1949, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr20", 1950, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr21", 1951, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr21", 1952, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr22", 1953, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr22", 1954, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr23", 1955, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr23", 1956, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr24", 1957, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr24", 1958, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr25", 1959, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr25", 1960, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr26", 1961, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr26", 1962, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr27", 1963, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr27", 1964, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr28", 1965, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr28", 1966, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr29", 1967, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr29", 1968, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr30", 1969, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr30", 1970, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr31", 1971, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr31", 1972, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr32", 1973, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr32", 1974, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr33", 1975, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr33", 1976, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr34", 1977, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr34", 1978, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr35", 1979, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr35", 1980, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr36", 1981, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr36", 1982, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr37", 1983, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr37", 1984, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr38", 1985, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr38", 1986, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr39", 1987, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr39", 1988, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr40", 1989, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr40", 1990, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr41", 1991, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr41", 1992, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr42", 1993, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr42", 1994, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr43", 1995, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr43", 1996, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr44", 1997, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr44", 1998, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr45", 1999, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr45", 2000, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr46", 2001, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr46", 2002, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr47", 2003, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr47", 2004, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr48", 2005, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr48", 2006, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr49", 2007, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr49", 2008, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr50", 2009, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr50", 2010, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr51", 2011, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr51", 2012, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr52", 2013, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr52", 2014, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr53", 2015, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr53", 2016, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr54", 2017, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr54", 2018, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr55", 2019, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr55", 2020, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr56", 2021, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr56", 2022, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr57", 2023, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr57", 2024, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr58", 2025, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr58", 2026, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr59", 2027, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr59", 2028, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr60", 2029, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr60", 2030, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr61", 2031, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr61", 2032, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr62", 2033, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr62", 2034, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr63", 2035, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr63", 2036, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr64", 2037, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr64", 2038, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr65", 2039, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr65", 2040, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr66", 2041, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr66", 2042, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr67", 2043, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr67", 2044, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr68", 2045, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr68", 2046, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr69", 2047, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr69", 2048, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr70", 2049, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr70", 2050, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr71", 2051, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr71", 2052, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr72", 2053, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr72", 2054, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr73", 2055, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr73", 2056, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr74", 2057, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr74", 2058, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr75", 2059, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr75", 2060, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr76", 2061, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr76", 2062, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr77", 2063, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr77", 2064, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr78", 2065, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr78", 2066, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr79", 2067, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr79", 2068, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr80", 2069, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr80", 2070, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr81", 2071, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr81", 2072, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr82", 2073, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr82", 2074, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr83", 2075, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr83", 2076, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr84", 2077, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr84", 2078, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr85", 2079, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr85", 2080, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr86", 2081, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr86", 2082, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr87", 2083, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr87", 2084, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr88", 2085, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr88", 2086, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr89", 2087, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr89", 2088, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr90", 2089, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr90", 2090, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr91", 2091, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr91", 2092, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr92", 2093, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr92", 2094, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr93", 2095, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr93", 2096, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr94", 2097, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr94", 2098, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr95", 2099, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr95", 2100, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr96", 2101, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr96", 2102, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr97", 2103, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr97", 2104, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr98", 2105, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr98", 2106, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr99", 2107, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr99", 2108, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr100", 2109, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr100", 2110, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr101", 2111, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr101", 2112, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr102", 2113, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr102", 2114, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr103", 2115, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr103", 2116, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr104", 2117, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr104", 2118, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr105", 2119, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr105", 2120, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr106", 2121, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr106", 2122, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr107", 2123, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr107", 2124, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr108", 2125, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr108", 2126, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr109", 2127, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr109", 2128, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr110", 2129, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr110", 2130, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr111", 2131, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr111", 2132, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr112", 2133, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr112", 2134, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr113", 2135, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr113", 2136, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr114", 2137, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr114", 2138, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr115", 2139, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr115", 2140, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr116", 2141, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr116", 2142, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr117", 2143, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr117", 2144, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr118", 2145, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr118", 2146, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr119", 2147, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr119", 2148, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr120", 2149, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr120", 2150, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr121", 2151, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr121", 2152, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr122", 2153, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr122", 2154, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr123", 2155, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr123", 2156, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr124", 2157, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr124", 2158, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr125", 2159, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr125", 2160, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr126", 2161, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr126", 2162, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3mr127", 2163, 1, "immu", 32, "int");
+ tdesc_create_reg (feature, "itlbw3tr127", 2164, 1, "immu", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.or1k.group3");
+ tdesc_create_reg (feature, "dccr", 2165, 1, "dcache", 32, "int");
+ tdesc_create_reg (feature, "dcbpr", 2166, 1, "dcache", 32, "int");
+ tdesc_create_reg (feature, "dcbfr", 2167, 1, "dcache", 32, "int");
+ tdesc_create_reg (feature, "dcbir", 2168, 1, "dcache", 32, "int");
+ tdesc_create_reg (feature, "dcbwr", 2169, 1, "dcache", 32, "int");
+ tdesc_create_reg (feature, "dcblr", 2170, 1, "dcache", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.or1k.group4");
+ tdesc_create_reg (feature, "iccr", 2171, 1, "icache", 32, "int");
+ tdesc_create_reg (feature, "icbpr", 2172, 1, "icache", 32, "int");
+ tdesc_create_reg (feature, "icbir", 2173, 1, "icache", 32, "int");
+ tdesc_create_reg (feature, "icblr", 2174, 1, "icache", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.or1k.group5");
+ tdesc_create_reg (feature, "maclo", 2175, 1, "mac", 32, "int");
+ tdesc_create_reg (feature, "machi", 2176, 1, "mac", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.or1k.group6");
+ tdesc_create_reg (feature, "dvr0", 2177, 1, "debug", 32, "int");
+ tdesc_create_reg (feature, "dvr1", 2178, 1, "debug", 32, "int");
+ tdesc_create_reg (feature, "dvr2", 2179, 1, "debug", 32, "int");
+ tdesc_create_reg (feature, "dvr3", 2180, 1, "debug", 32, "int");
+ tdesc_create_reg (feature, "dvr4", 2181, 1, "debug", 32, "int");
+ tdesc_create_reg (feature, "dvr5", 2182, 1, "debug", 32, "int");
+ tdesc_create_reg (feature, "dvr6", 2183, 1, "debug", 32, "int");
+ tdesc_create_reg (feature, "dvr7", 2184, 1, "debug", 32, "int");
+ tdesc_create_reg (feature, "dcr0", 2185, 1, "debug", 32, "int");
+ tdesc_create_reg (feature, "dcr1", 2186, 1, "debug", 32, "int");
+ tdesc_create_reg (feature, "dcr2", 2187, 1, "debug", 32, "int");
+ tdesc_create_reg (feature, "dcr3", 2188, 1, "debug", 32, "int");
+ tdesc_create_reg (feature, "dcr4", 2189, 1, "debug", 32, "int");
+ tdesc_create_reg (feature, "dcr5", 2190, 1, "debug", 32, "int");
+ tdesc_create_reg (feature, "dcr6", 2191, 1, "debug", 32, "int");
+ tdesc_create_reg (feature, "dcr7", 2192, 1, "debug", 32, "int");
+ tdesc_create_reg (feature, "dmr1", 2193, 1, "debug", 32, "int");
+ tdesc_create_reg (feature, "dmr2", 2194, 1, "debug", 32, "int");
+ tdesc_create_reg (feature, "dcwr0", 2195, 1, "debug", 32, "int");
+ tdesc_create_reg (feature, "dcwr1", 2196, 1, "debug", 32, "int");
+ tdesc_create_reg (feature, "dsr", 2197, 1, "debug", 32, "int");
+ tdesc_create_reg (feature, "drr", 2198, 1, "debug", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.or1k.group7");
+ tdesc_create_reg (feature, "pccr0", 2199, 1, "perf", 32, "int");
+ tdesc_create_reg (feature, "pccr1", 2200, 1, "perf", 32, "int");
+ tdesc_create_reg (feature, "pccr2", 2201, 1, "perf", 32, "int");
+ tdesc_create_reg (feature, "pccr3", 2202, 1, "perf", 32, "int");
+ tdesc_create_reg (feature, "pccr4", 2203, 1, "perf", 32, "int");
+ tdesc_create_reg (feature, "pccr5", 2204, 1, "perf", 32, "int");
+ tdesc_create_reg (feature, "pccr6", 2205, 1, "perf", 32, "int");
+ tdesc_create_reg (feature, "pccr7", 2206, 1, "perf", 32, "int");
+ tdesc_create_reg (feature, "pcmr0", 2207, 1, "perf", 32, "int");
+ tdesc_create_reg (feature, "pcmr1", 2208, 1, "perf", 32, "int");
+ tdesc_create_reg (feature, "pcmr2", 2209, 1, "perf", 32, "int");
+ tdesc_create_reg (feature, "pcmr3", 2210, 1, "perf", 32, "int");
+ tdesc_create_reg (feature, "pcmr4", 2211, 1, "perf", 32, "int");
+ tdesc_create_reg (feature, "pcmr5", 2212, 1, "perf", 32, "int");
+ tdesc_create_reg (feature, "pcmr6", 2213, 1, "perf", 32, "int");
+ tdesc_create_reg (feature, "pcmr7", 2214, 1, "perf", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.or1k.group8");
+ tdesc_create_reg (feature, "pmr", 2215, 1, "power", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.or1k.group9");
+ tdesc_create_reg (feature, "picmr", 2216, 1, "pic", 32, "int");
+ tdesc_create_reg (feature, "picsr", 2217, 1, "pic", 32, "int");
+
+ tdesc_or1k = result;
+}
diff --git a/gdb/features/or1k.xml b/gdb/features/or1k.xml
new file mode 100644
index 0000000..688b340
--- /dev/null
+++ b/gdb/features/or1k.xml
@@ -0,0 +1,2274 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2016 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+
+<target>
+ <architecture>or1k</architecture>
+ <feature name="org.gnu.gdb.or1k.group0">
+ <reg name="r0" bitsize="32" type="int"/>
+ <reg name="r1" bitsize="32" type="data_ptr"/>
+ <reg name="r2" bitsize="32" type="int"/>
+ <reg name="r3" bitsize="32" type="int"/>
+ <reg name="r4" bitsize="32" type="int"/>
+ <reg name="r5" bitsize="32" type="int"/>
+ <reg name="r6" bitsize="32" type="int"/>
+ <reg name="r7" bitsize="32" type="int"/>
+ <reg name="r8" bitsize="32" type="int"/>
+ <reg name="r9" bitsize="32" type="int"/>
+ <reg name="r10" bitsize="32" type="int"/>
+ <reg name="r11" bitsize="32" type="int"/>
+ <reg name="r12" bitsize="32" type="int"/>
+ <reg name="r13" bitsize="32" type="int"/>
+ <reg name="r14" bitsize="32" type="int"/>
+ <reg name="r15" bitsize="32" type="int"/>
+ <reg name="r16" bitsize="32" type="int"/>
+ <reg name="r17" bitsize="32" type="int"/>
+ <reg name="r18" bitsize="32" type="int"/>
+ <reg name="r19" bitsize="32" type="int"/>
+ <reg name="r20" bitsize="32" type="int"/>
+ <reg name="r21" bitsize="32" type="int"/>
+ <reg name="r22" bitsize="32" type="int"/>
+ <reg name="r23" bitsize="32" type="int"/>
+ <reg name="r24" bitsize="32" type="int"/>
+ <reg name="r25" bitsize="32" type="int"/>
+ <reg name="r26" bitsize="32" type="int"/>
+ <reg name="r27" bitsize="32" type="int"/>
+ <reg name="r28" bitsize="32" type="int"/>
+ <reg name="r29" bitsize="32" type="int"/>
+ <reg name="r30" bitsize="32" type="int"/>
+ <reg name="r31" bitsize="32" type="int"/>
+ <reg name="ppc" bitsize="32" type="code_ptr"/>
+ <reg name="npc" bitsize="32" type="code_ptr"/>
+
+ <flags id="sr_flags" size="4">
+ <field name="SM" start="0" end="0"/>
+ <field name="TEE" start="1" end="1"/>
+ <field name="IEE" start="2" end="2"/>
+ <field name="DCE" start="3" end="3"/>
+ <field name="ICE" start="4" end="4"/>
+ <field name="DME" start="5" end="5"/>
+ <field name="IME" start="6" end="6"/>
+ <field name="LEE" start="7" end="7"/>
+ <field name="CE" start="8" end="8"/>
+ <field name="F" start="9" end="9"/>
+ <field name="CY" start="10" end="10"/>
+ <field name="OV" start="11" end="11"/>
+ <field name="OVE" start="12" end="12"/>
+ <field name="DSX" start="13" end="13"/>
+ <field name="EPH" start="14" end="14"/>
+ <field name="FO" start="15" end="15"/>
+ <field name="SUMRA" start="16" end="16"/>
+
+ <field name="CID" start="28" end="31"/>
+ </flags>
+ <reg name="sr" bitsize="32" type="sr_flags"/>
+
+ <reg name="vr" bitsize="32" type="int" group="system"/>
+ <reg name="upr" bitsize="32" type="int" group="system"/>
+ <reg name="cpucfgr" bitsize="32" type="int" group="system"/>
+ <reg name="dmmucfgr" bitsize="32" type="int" group="system"/>
+ <reg name="immucfgr" bitsize="32" type="int" group="system"/>
+ <reg name="dccfgr" bitsize="32" type="int" group="system"/>
+ <reg name="iccfgr" bitsize="32" type="int" group="system"/>
+ <reg name="dcfgr" bitsize="32" type="int" group="system"/>
+ <reg name="pccfgr" bitsize="32" type="int" group="system"/>
+ <reg name="fpcsr" bitsize="32" type="int" group="system"/>
+ <reg name="epcr0" bitsize="32" type="int" group="system"/>
+ <reg name="epcr1" bitsize="32" type="int" group="system"/>
+ <reg name="epcr2" bitsize="32" type="int" group="system"/>
+ <reg name="epcr3" bitsize="32" type="int" group="system"/>
+ <reg name="epcr4" bitsize="32" type="int" group="system"/>
+ <reg name="epcr5" bitsize="32" type="int" group="system"/>
+ <reg name="epcr6" bitsize="32" type="int" group="system"/>
+ <reg name="epcr7" bitsize="32" type="int" group="system"/>
+ <reg name="epcr8" bitsize="32" type="int" group="system"/>
+ <reg name="epcr9" bitsize="32" type="int" group="system"/>
+ <reg name="epcr10" bitsize="32" type="int" group="system"/>
+ <reg name="epcr11" bitsize="32" type="int" group="system"/>
+ <reg name="epcr12" bitsize="32" type="int" group="system"/>
+ <reg name="epcr13" bitsize="32" type="int" group="system"/>
+ <reg name="epcr14" bitsize="32" type="int" group="system"/>
+ <reg name="epcr15" bitsize="32" type="int" group="system"/>
+ <reg name="eear0" bitsize="32" type="int" group="system"/>
+ <reg name="eear1" bitsize="32" type="int" group="system"/>
+ <reg name="eear2" bitsize="32" type="int" group="system"/>
+ <reg name="eear3" bitsize="32" type="int" group="system"/>
+ <reg name="eear4" bitsize="32" type="int" group="system"/>
+ <reg name="eear5" bitsize="32" type="int" group="system"/>
+ <reg name="eear6" bitsize="32" type="int" group="system"/>
+ <reg name="eear7" bitsize="32" type="int" group="system"/>
+ <reg name="eear8" bitsize="32" type="int" group="system"/>
+ <reg name="eear9" bitsize="32" type="int" group="system"/>
+ <reg name="eear10" bitsize="32" type="int" group="system"/>
+ <reg name="eear11" bitsize="32" type="int" group="system"/>
+ <reg name="eear12" bitsize="32" type="int" group="system"/>
+ <reg name="eear13" bitsize="32" type="int" group="system"/>
+ <reg name="eear14" bitsize="32" type="int" group="system"/>
+ <reg name="eear15" bitsize="32" type="int" group="system"/>
+ <reg name="esr0" bitsize="32" type="int" group="system"/>
+ <reg name="esr1" bitsize="32" type="int" group="system"/>
+ <reg name="esr2" bitsize="32" type="int" group="system"/>
+ <reg name="esr3" bitsize="32" type="int" group="system"/>
+ <reg name="esr4" bitsize="32" type="int" group="system"/>
+ <reg name="esr5" bitsize="32" type="int" group="system"/>
+ <reg name="esr6" bitsize="32" type="int" group="system"/>
+ <reg name="esr7" bitsize="32" type="int" group="system"/>
+ <reg name="esr8" bitsize="32" type="int" group="system"/>
+ <reg name="esr9" bitsize="32" type="int" group="system"/>
+ <reg name="esr10" bitsize="32" type="int" group="system"/>
+ <reg name="esr11" bitsize="32" type="int" group="system"/>
+ <reg name="esr12" bitsize="32" type="int" group="system"/>
+ <reg name="esr13" bitsize="32" type="int" group="system"/>
+ <reg name="esr14" bitsize="32" type="int" group="system"/>
+ <reg name="esr15" bitsize="32" type="int" group="system"/>
+ </feature>
+ <feature name="org.gnu.gdb.or1k.group1">
+ <reg name="dmmuucr" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dmmuupr" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbeir" bitsize="32" type="int" group="dmmu"/>
+ <reg name="datbmr0" bitsize="32" type="int" group="dmmu"/>
+ <reg name="datbmr1" bitsize="32" type="int" group="dmmu"/>
+ <reg name="datbmr2" bitsize="32" type="int" group="dmmu"/>
+ <reg name="datbmr3" bitsize="32" type="int" group="dmmu"/>
+ <reg name="datbtr0" bitsize="32" type="int" group="dmmu"/>
+ <reg name="datbtr1" bitsize="32" type="int" group="dmmu"/>
+ <reg name="datbtr2" bitsize="32" type="int" group="dmmu"/>
+ <reg name="datbtr3" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr0" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr0" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr1" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr1" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr2" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr2" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr3" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr3" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr4" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr4" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr5" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr5" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr6" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr6" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr7" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr7" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr8" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr8" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr9" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr9" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr10" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr10" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr11" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr11" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr12" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr12" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr13" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr13" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr14" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr14" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr15" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr15" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr16" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr16" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr17" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr17" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr18" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr18" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr19" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr19" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr20" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr20" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr21" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr21" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr22" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr22" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr23" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr23" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr24" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr24" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr25" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr25" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr26" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr26" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr27" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr27" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr28" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr28" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr29" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr29" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr30" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr30" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr31" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr31" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr32" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr32" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr33" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr33" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr34" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr34" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr35" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr35" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr36" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr36" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr37" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr37" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr38" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr38" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr39" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr39" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr40" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr40" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr41" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr41" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr42" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr42" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr43" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr43" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr44" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr44" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr45" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr45" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr46" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr46" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr47" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr47" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr48" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr48" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr49" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr49" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr50" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr50" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr51" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr51" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr52" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr52" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr53" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr53" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr54" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr54" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr55" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr55" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr56" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr56" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr57" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr57" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr58" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr58" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr59" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr59" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr60" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr60" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr61" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr61" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr62" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr62" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr63" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr63" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr64" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr64" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr65" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr65" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr66" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr66" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr67" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr67" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr68" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr68" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr69" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr69" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr70" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr70" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr71" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr71" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr72" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr72" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr73" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr73" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr74" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr74" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr75" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr75" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr76" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr76" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr77" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr77" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr78" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr78" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr79" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr79" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr80" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr80" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr81" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr81" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr82" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr82" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr83" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr83" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr84" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr84" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr85" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr85" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr86" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr86" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr87" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr87" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr88" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr88" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr89" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr89" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr90" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr90" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr91" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr91" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr92" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr92" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr93" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr93" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr94" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr94" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr95" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr95" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr96" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr96" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr97" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr97" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr98" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr98" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr99" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr99" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr100" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr100" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr101" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr101" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr102" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr102" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr103" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr103" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr104" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr104" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr105" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr105" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr106" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr106" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr107" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr107" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr108" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr108" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr109" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr109" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr110" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr110" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr111" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr111" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr112" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr112" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr113" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr113" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr114" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr114" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr115" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr115" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr116" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr116" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr117" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr117" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr118" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr118" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr119" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr119" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr120" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr120" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr121" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr121" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr122" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr122" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr123" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr123" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr124" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr124" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr125" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr125" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr126" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr126" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0mr127" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw0tr127" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr0" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr0" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr1" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr1" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr2" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr2" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr3" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr3" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr4" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr4" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr5" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr5" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr6" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr6" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr7" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr7" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr8" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr8" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr9" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr9" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr10" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr10" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr11" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr11" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr12" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr12" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr13" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr13" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr14" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr14" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr15" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr15" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr16" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr16" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr17" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr17" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr18" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr18" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr19" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr19" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr20" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr20" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr21" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr21" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr22" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr22" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr23" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr23" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr24" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr24" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr25" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr25" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr26" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr26" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr27" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr27" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr28" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr28" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr29" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr29" bitsize="32" type="int" group="dmmu"/>
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+ <reg name="dtlbw1tr30" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr31" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr31" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr32" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr32" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr33" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr33" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr34" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr34" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr35" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr35" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr36" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr36" bitsize="32" type="int" group="dmmu"/>
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+ <reg name="dtlbw1tr37" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr38" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr38" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr39" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr39" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr40" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr40" bitsize="32" type="int" group="dmmu"/>
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+ <reg name="dtlbw1tr41" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr42" bitsize="32" type="int" group="dmmu"/>
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+ <reg name="dtlbw1mr43" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr43" bitsize="32" type="int" group="dmmu"/>
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+ <reg name="dtlbw1tr44" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr45" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr45" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr46" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr46" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr47" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr47" bitsize="32" type="int" group="dmmu"/>
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+ <reg name="dtlbw1mr50" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr50" bitsize="32" type="int" group="dmmu"/>
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+ <reg name="dtlbw1tr52" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr53" bitsize="32" type="int" group="dmmu"/>
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+ <reg name="dtlbw1tr54" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr55" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr55" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr56" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr56" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr57" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr57" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr58" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr58" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr59" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr59" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr60" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr60" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr61" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr61" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr62" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr62" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr63" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr63" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr64" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr64" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr65" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr65" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr66" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr66" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr67" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr67" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr68" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr68" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr69" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr69" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr70" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr70" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr71" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr71" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr72" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr72" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr73" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr73" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr74" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr74" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr75" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr75" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr76" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr76" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr77" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr77" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr78" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr78" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr79" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr79" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr80" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr80" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr81" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr81" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr82" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr82" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr83" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr83" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr84" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr84" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr85" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr85" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr86" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr86" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr87" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr87" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr88" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr88" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr89" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr89" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr90" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr90" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr91" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr91" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr92" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr92" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr93" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr93" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr94" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr94" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr95" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr95" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr96" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr96" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr97" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr97" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr98" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr98" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr99" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr99" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr100" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr100" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr101" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr101" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr102" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr102" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr103" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr103" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr104" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr104" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr105" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr105" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr106" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr106" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr107" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr107" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr108" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr108" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr109" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr109" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr110" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr110" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr111" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr111" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr112" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr112" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr113" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr113" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr114" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr114" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr115" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr115" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr116" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr116" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr117" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr117" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr118" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr118" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr119" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr119" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr120" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr120" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr121" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr121" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr122" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr122" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr123" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr123" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr124" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr124" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr125" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr125" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr126" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr126" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1mr127" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw1tr127" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr0" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr0" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr1" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr1" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr2" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr2" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr3" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr3" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr4" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr4" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr5" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr5" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr6" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr6" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr7" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr7" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr8" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr8" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr9" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr9" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr10" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr10" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr11" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr11" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr12" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr12" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr13" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr13" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr14" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr14" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr15" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr15" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr16" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr16" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr17" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr17" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr18" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr18" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr19" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr19" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr20" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr20" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr21" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr21" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr22" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr22" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr23" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr23" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr24" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr24" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr25" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr25" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr26" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr26" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr27" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr27" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr28" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr28" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr29" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr29" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr30" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr30" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr31" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr31" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr32" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr32" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr33" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr33" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr34" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr34" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr35" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr35" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr36" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr36" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr37" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr37" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr38" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr38" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr39" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr39" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr40" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr40" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr41" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr41" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr42" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr42" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr43" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr43" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr44" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr44" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr45" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr45" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr46" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr46" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr47" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr47" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr48" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr48" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr49" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr49" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr50" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr50" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr51" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr51" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr52" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr52" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr53" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr53" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr54" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr54" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr55" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr55" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr56" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr56" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr57" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr57" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr58" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr58" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr59" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr59" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr60" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr60" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr61" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr61" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr62" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr62" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr63" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr63" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr64" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr64" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr65" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr65" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr66" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr66" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr67" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr67" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr68" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr68" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr69" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr69" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr70" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr70" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr71" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr71" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr72" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr72" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr73" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr73" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr74" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr74" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr75" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr75" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr76" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr76" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr77" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr77" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr78" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr78" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr79" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr79" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr80" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr80" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr81" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr81" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr82" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr82" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr83" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr83" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr84" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr84" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr85" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr85" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr86" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr86" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr87" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr87" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr88" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr88" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr89" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr89" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr90" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr90" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr91" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr91" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr92" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr92" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr93" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr93" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr94" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr94" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr95" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr95" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr96" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr96" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr97" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr97" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr98" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr98" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr99" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr99" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr100" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr100" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr101" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr101" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr102" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr102" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr103" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr103" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr104" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr104" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr105" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr105" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr106" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr106" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr107" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr107" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr108" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr108" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr109" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr109" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr110" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr110" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr111" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr111" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr112" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr112" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr113" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr113" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr114" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr114" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr115" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr115" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr116" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr116" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr117" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr117" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr118" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr118" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr119" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr119" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr120" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr120" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr121" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr121" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr122" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr122" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr123" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr123" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr124" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr124" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr125" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr125" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr126" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr126" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2mr127" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw2tr127" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr0" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr0" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr1" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr1" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr2" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr2" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr3" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr3" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr4" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr4" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr5" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr5" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr6" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr6" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr7" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr7" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr8" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr8" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr9" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr9" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr10" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr10" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr11" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr11" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr12" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr12" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr13" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr13" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr14" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr14" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr15" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr15" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr16" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr16" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr17" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr17" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr18" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr18" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr19" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr19" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr20" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr20" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr21" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr21" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr22" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr22" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr23" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr23" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr24" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr24" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr25" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr25" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr26" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr26" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr27" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr27" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr28" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr28" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr29" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr29" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr30" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr30" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr31" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr31" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr32" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr32" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr33" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr33" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr34" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr34" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr35" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr35" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr36" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr36" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr37" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr37" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr38" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr38" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr39" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr39" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr40" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr40" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr41" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr41" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr42" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr42" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr43" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr43" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr44" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr44" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr45" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr45" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr46" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr46" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr47" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr47" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr48" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr48" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr49" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr49" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr50" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr50" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr51" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr51" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr52" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr52" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr53" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr53" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr54" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr54" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr55" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr55" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr56" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr56" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr57" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr57" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr58" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr58" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr59" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr59" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr60" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr60" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr61" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr61" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr62" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr62" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr63" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr63" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr64" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr64" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr65" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr65" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr66" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr66" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr67" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr67" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr68" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr68" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr69" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr69" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr70" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr70" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr71" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr71" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr72" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr72" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr73" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr73" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr74" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr74" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr75" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr75" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr76" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr76" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr77" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr77" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr78" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr78" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr79" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr79" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr80" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr80" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr81" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr81" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr82" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr82" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr83" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr83" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr84" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr84" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr85" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr85" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr86" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr86" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr87" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr87" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr88" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr88" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr89" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr89" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr90" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr90" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr91" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr91" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr92" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr92" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr93" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr93" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr94" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr94" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr95" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr95" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr96" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr96" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr97" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr97" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr98" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr98" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr99" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr99" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr100" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr100" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr101" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr101" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr102" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr102" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr103" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr103" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr104" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr104" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr105" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr105" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr106" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr106" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr107" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr107" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr108" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr108" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr109" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr109" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr110" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr110" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr111" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr111" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr112" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr112" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr113" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr113" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr114" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr114" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr115" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr115" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr116" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr116" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr117" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr117" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr118" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr118" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr119" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr119" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr120" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr120" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr121" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr121" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr122" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr122" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr123" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr123" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr124" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr124" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr125" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr125" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr126" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr126" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3mr127" bitsize="32" type="int" group="dmmu"/>
+ <reg name="dtlbw3tr127" bitsize="32" type="int" group="dmmu"/>
+ </feature>
+ <feature name="org.gnu.gdb.or1k.group10">
+ <reg name="ttmr" bitsize="32" type="int" group="timer"/>
+ <reg name="ttcr" bitsize="32" type="int" group="timer"/>
+ </feature>
+ <feature name="org.gnu.gdb.or1k.group2">
+ <reg name="immucr" bitsize="32" type="int" group="immu"/>
+ <reg name="immupr" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbeir" bitsize="32" type="int" group="immu"/>
+ <reg name="iatbmr0" bitsize="32" type="int" group="immu"/>
+ <reg name="iatbmr1" bitsize="32" type="int" group="immu"/>
+ <reg name="iatbmr2" bitsize="32" type="int" group="immu"/>
+ <reg name="iatbmr3" bitsize="32" type="int" group="immu"/>
+ <reg name="iatbtr0" bitsize="32" type="int" group="immu"/>
+ <reg name="iatbtr1" bitsize="32" type="int" group="immu"/>
+ <reg name="iatbtr2" bitsize="32" type="int" group="immu"/>
+ <reg name="iatbtr3" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr0" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr0" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr1" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr1" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr2" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr2" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr3" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr3" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr4" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr4" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr5" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr5" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr6" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr6" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr7" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr7" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr8" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr8" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr9" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr9" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr10" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr10" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr11" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr11" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr12" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr12" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr13" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr13" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr14" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr14" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr15" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr15" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr16" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr16" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr17" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr17" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr18" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr18" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr19" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr19" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr20" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr20" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr21" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr21" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr22" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr22" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr23" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr23" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr24" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr24" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr25" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr25" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr26" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr26" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr27" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr27" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr28" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr28" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr29" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr29" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr30" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr30" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr31" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr31" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr32" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr32" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr33" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr33" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr34" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr34" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr35" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr35" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr36" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr36" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr37" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr37" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr38" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr38" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr39" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr39" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr40" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr40" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr41" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr41" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr42" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr42" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr43" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr43" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr44" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr44" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr45" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr45" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr46" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr46" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr47" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr47" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr48" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr48" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr49" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr49" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr50" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr50" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr51" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr51" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr52" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr52" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr53" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr53" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr54" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr54" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr55" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr55" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr56" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr56" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr57" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr57" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr58" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr58" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr59" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr59" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr60" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr60" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr61" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr61" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr62" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr62" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr63" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr63" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr64" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr64" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr65" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr65" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr66" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr66" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr67" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr67" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr68" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr68" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr69" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr69" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr70" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr70" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr71" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr71" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr72" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr72" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr73" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr73" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr74" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr74" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr75" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr75" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr76" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr76" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr77" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr77" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr78" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr78" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr79" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr79" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr80" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr80" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr81" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr81" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr82" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr82" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr83" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr83" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr84" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr84" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr85" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr85" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr86" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr86" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr87" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr87" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr88" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr88" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr89" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr89" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr90" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr90" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr91" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr91" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr92" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr92" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr93" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr93" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr94" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr94" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr95" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr95" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr96" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr96" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr97" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr97" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr98" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr98" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr99" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr99" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr100" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr100" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr101" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr101" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr102" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr102" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr103" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr103" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr104" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr104" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr105" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr105" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr106" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr106" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr107" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr107" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr108" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr108" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr109" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr109" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr110" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr110" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr111" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr111" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr112" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr112" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr113" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr113" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr114" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr114" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr115" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr115" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr116" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr116" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr117" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr117" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr118" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr118" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr119" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr119" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr120" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr120" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr121" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr121" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr122" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr122" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr123" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr123" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr124" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr124" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr125" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr125" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr126" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr126" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0mr127" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw0tr127" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr0" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr0" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr1" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr1" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr2" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr2" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr3" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr3" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr4" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr4" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr5" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr5" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr6" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr6" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr7" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr7" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr8" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr8" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr9" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr9" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr10" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr10" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr11" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr11" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr12" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr12" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr13" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr13" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr14" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr14" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr15" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr15" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr16" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr16" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr17" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr17" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr18" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr18" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr19" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr19" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr20" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr20" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr21" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr21" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr22" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr22" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr23" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr23" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr24" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr24" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr25" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr25" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr26" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr26" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr27" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr27" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr28" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr28" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr29" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr29" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr30" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr30" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr31" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr31" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr32" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr32" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr33" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr33" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr34" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr34" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr35" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr35" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr36" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr36" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr37" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr37" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr38" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr38" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr39" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr39" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr40" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr40" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr41" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr41" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr42" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr42" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr43" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr43" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr44" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr44" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr45" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr45" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr46" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr46" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr47" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr47" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr48" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr48" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr49" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr49" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr50" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr50" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr51" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr51" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr52" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr52" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr53" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr53" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr54" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr54" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr55" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr55" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr56" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr56" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr57" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr57" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr58" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr58" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr59" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr59" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr60" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr60" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr61" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr61" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr62" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr62" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr63" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr63" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr64" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr64" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr65" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr65" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr66" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr66" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr67" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr67" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr68" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr68" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr69" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr69" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr70" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr70" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr71" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr71" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr72" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr72" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr73" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr73" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr74" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr74" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr75" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr75" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr76" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr76" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr77" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr77" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr78" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr78" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr79" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr79" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr80" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr80" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr81" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr81" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr82" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr82" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr83" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr83" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr84" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr84" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr85" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr85" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr86" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr86" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr87" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr87" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr88" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr88" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr89" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr89" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr90" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr90" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr91" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr91" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr92" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr92" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr93" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr93" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr94" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr94" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr95" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr95" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr96" bitsize="32" type="int" group="immu"/>
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+ <reg name="itlbw1mr97" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr97" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr98" bitsize="32" type="int" group="immu"/>
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+ <reg name="itlbw1mr100" bitsize="32" type="int" group="immu"/>
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+ <reg name="itlbw1mr101" bitsize="32" type="int" group="immu"/>
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+ <reg name="itlbw1mr102" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr102" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr103" bitsize="32" type="int" group="immu"/>
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+ <reg name="itlbw1mr106" bitsize="32" type="int" group="immu"/>
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+ <reg name="itlbw1mr108" bitsize="32" type="int" group="immu"/>
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+ <reg name="itlbw1mr111" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr111" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr112" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr112" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr113" bitsize="32" type="int" group="immu"/>
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+ <reg name="itlbw1mr115" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr115" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr116" bitsize="32" type="int" group="immu"/>
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+ <reg name="itlbw1mr117" bitsize="32" type="int" group="immu"/>
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+ <reg name="itlbw1mr118" bitsize="32" type="int" group="immu"/>
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+ <reg name="itlbw1mr119" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr119" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr120" bitsize="32" type="int" group="immu"/>
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+ <reg name="itlbw1mr121" bitsize="32" type="int" group="immu"/>
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+ <reg name="itlbw1mr122" bitsize="32" type="int" group="immu"/>
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+ <reg name="itlbw1mr123" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr123" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr124" bitsize="32" type="int" group="immu"/>
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+ <reg name="itlbw1mr125" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr125" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr126" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr126" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1mr127" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw1tr127" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr0" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr0" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr1" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr1" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr2" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr2" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr3" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr3" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr4" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr4" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr5" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr5" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr6" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr6" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr7" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr7" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr8" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr8" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr9" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr9" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr10" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr10" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr11" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr11" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr12" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr12" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr13" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr13" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr14" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr14" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr15" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr15" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr16" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr16" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr17" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr17" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr18" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr18" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr19" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr19" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr20" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr20" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr21" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr21" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr22" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr22" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr23" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr23" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr24" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr24" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr25" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr25" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr26" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr26" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr27" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr27" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr28" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr28" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr29" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr29" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr30" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr30" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr31" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr31" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr32" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr32" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr33" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr33" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr34" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr34" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr35" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr35" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr36" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr36" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr37" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr37" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr38" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr38" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr39" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr39" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr40" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr40" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr41" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr41" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr42" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr42" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr43" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr43" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr44" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr44" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr45" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr45" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr46" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr46" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr47" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr47" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr48" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr48" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr49" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr49" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr50" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr50" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr51" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr51" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr52" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr52" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr53" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr53" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr54" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr54" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr55" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr55" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr56" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr56" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr57" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr57" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr58" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr58" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr59" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr59" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr60" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr60" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr61" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr61" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr62" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr62" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr63" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr63" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr64" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr64" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr65" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr65" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr66" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr66" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr67" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr67" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr68" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr68" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr69" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr69" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr70" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr70" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr71" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr71" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr72" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr72" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr73" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr73" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr74" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr74" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr75" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr75" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr76" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr76" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr77" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr77" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr78" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr78" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr79" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr79" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr80" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr80" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr81" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr81" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr82" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr82" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr83" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr83" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr84" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr84" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr85" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr85" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr86" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr86" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr87" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr87" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr88" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr88" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr89" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr89" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr90" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr90" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr91" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr91" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr92" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr92" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr93" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr93" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr94" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr94" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr95" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr95" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr96" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr96" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr97" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr97" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr98" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr98" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr99" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr99" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr100" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr100" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr101" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr101" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr102" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr102" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr103" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr103" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr104" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr104" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr105" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr105" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr106" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr106" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr107" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr107" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr108" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr108" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr109" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr109" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr110" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr110" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr111" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr111" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr112" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr112" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr113" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr113" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr114" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr114" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr115" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr115" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr116" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr116" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr117" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr117" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr118" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr118" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr119" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr119" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr120" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr120" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr121" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr121" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr122" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr122" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr123" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr123" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr124" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr124" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr125" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr125" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr126" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr126" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2mr127" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw2tr127" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr0" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr0" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr1" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr1" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr2" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr2" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr3" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr3" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr4" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr4" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr5" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr5" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr6" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr6" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr7" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr7" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr8" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr8" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr9" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr9" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr10" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr10" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr11" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr11" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr12" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr12" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr13" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr13" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr14" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr14" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr15" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr15" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr16" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr16" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr17" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr17" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr18" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr18" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr19" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr19" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr20" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr20" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr21" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr21" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr22" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr22" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr23" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr23" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr24" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr24" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr25" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr25" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr26" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr26" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr27" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr27" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr28" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr28" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr29" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr29" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr30" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr30" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr31" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr31" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr32" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr32" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr33" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr33" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr34" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr34" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr35" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr35" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr36" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr36" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr37" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr37" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr38" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr38" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr39" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr39" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr40" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr40" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr41" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr41" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr42" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr42" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr43" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr43" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr44" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr44" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr45" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr45" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr46" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr46" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr47" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr47" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr48" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr48" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr49" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr49" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr50" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr50" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr51" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr51" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr52" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr52" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr53" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr53" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr54" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr54" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr55" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr55" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr56" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr56" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr57" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr57" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr58" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr58" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr59" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr59" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr60" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr60" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr61" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr61" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr62" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr62" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr63" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr63" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr64" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr64" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr65" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr65" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr66" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr66" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr67" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr67" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr68" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr68" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr69" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr69" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr70" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr70" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr71" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr71" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr72" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr72" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr73" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr73" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr74" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr74" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr75" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr75" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr76" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr76" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr77" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr77" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr78" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr78" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr79" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr79" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr80" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr80" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr81" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr81" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr82" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr82" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr83" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr83" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr84" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr84" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr85" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr85" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr86" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr86" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr87" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr87" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr88" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr88" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr89" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr89" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr90" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr90" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr91" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr91" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr92" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr92" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr93" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr93" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr94" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr94" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr95" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr95" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr96" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr96" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr97" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr97" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr98" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr98" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr99" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr99" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr100" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr100" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr101" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr101" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr102" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr102" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr103" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr103" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr104" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr104" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr105" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr105" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr106" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr106" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr107" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr107" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr108" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr108" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr109" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr109" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr110" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr110" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr111" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr111" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr112" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr112" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr113" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr113" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr114" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr114" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr115" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr115" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr116" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr116" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr117" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr117" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr118" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr118" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr119" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr119" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr120" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr120" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr121" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr121" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr122" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr122" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr123" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr123" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr124" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr124" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr125" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr125" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr126" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr126" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3mr127" bitsize="32" type="int" group="immu"/>
+ <reg name="itlbw3tr127" bitsize="32" type="int" group="immu"/>
+ </feature>
+ <feature name="org.gnu.gdb.or1k.group3">
+ <reg name="dccr" bitsize="32" type="int" group="dcache"/>
+ <reg name="dcbpr" bitsize="32" type="int" group="dcache"/>
+ <reg name="dcbfr" bitsize="32" type="int" group="dcache"/>
+ <reg name="dcbir" bitsize="32" type="int" group="dcache"/>
+ <reg name="dcbwr" bitsize="32" type="int" group="dcache"/>
+ <reg name="dcblr" bitsize="32" type="int" group="dcache"/>
+ </feature>
+ <feature name="org.gnu.gdb.or1k.group4">
+ <reg name="iccr" bitsize="32" type="int" group="icache"/>
+ <reg name="icbpr" bitsize="32" type="int" group="icache"/>
+ <reg name="icbir" bitsize="32" type="int" group="icache"/>
+ <reg name="icblr" bitsize="32" type="int" group="icache"/>
+ </feature>
+ <feature name="org.gnu.gdb.or1k.group5">
+ <reg name="maclo" bitsize="32" type="int" group="mac"/>
+ <reg name="machi" bitsize="32" type="int" group="mac"/>
+ </feature>
+ <feature name="org.gnu.gdb.or1k.group6">
+ <reg name="dvr0" bitsize="32" type="int" group="debug"/>
+ <reg name="dvr1" bitsize="32" type="int" group="debug"/>
+ <reg name="dvr2" bitsize="32" type="int" group="debug"/>
+ <reg name="dvr3" bitsize="32" type="int" group="debug"/>
+ <reg name="dvr4" bitsize="32" type="int" group="debug"/>
+ <reg name="dvr5" bitsize="32" type="int" group="debug"/>
+ <reg name="dvr6" bitsize="32" type="int" group="debug"/>
+ <reg name="dvr7" bitsize="32" type="int" group="debug"/>
+ <reg name="dcr0" bitsize="32" type="int" group="debug"/>
+ <reg name="dcr1" bitsize="32" type="int" group="debug"/>
+ <reg name="dcr2" bitsize="32" type="int" group="debug"/>
+ <reg name="dcr3" bitsize="32" type="int" group="debug"/>
+ <reg name="dcr4" bitsize="32" type="int" group="debug"/>
+ <reg name="dcr5" bitsize="32" type="int" group="debug"/>
+ <reg name="dcr6" bitsize="32" type="int" group="debug"/>
+ <reg name="dcr7" bitsize="32" type="int" group="debug"/>
+ <reg name="dmr1" bitsize="32" type="int" group="debug"/>
+ <reg name="dmr2" bitsize="32" type="int" group="debug"/>
+ <reg name="dcwr0" bitsize="32" type="int" group="debug"/>
+ <reg name="dcwr1" bitsize="32" type="int" group="debug"/>
+ <reg name="dsr" bitsize="32" type="int" group="debug"/>
+ <reg name="drr" bitsize="32" type="int" group="debug"/>
+ </feature>
+ <feature name="org.gnu.gdb.or1k.group7">
+ <reg name="pccr0" bitsize="32" type="int" group="perf"/>
+ <reg name="pccr1" bitsize="32" type="int" group="perf"/>
+ <reg name="pccr2" bitsize="32" type="int" group="perf"/>
+ <reg name="pccr3" bitsize="32" type="int" group="perf"/>
+ <reg name="pccr4" bitsize="32" type="int" group="perf"/>
+ <reg name="pccr5" bitsize="32" type="int" group="perf"/>
+ <reg name="pccr6" bitsize="32" type="int" group="perf"/>
+ <reg name="pccr7" bitsize="32" type="int" group="perf"/>
+ <reg name="pcmr0" bitsize="32" type="int" group="perf"/>
+ <reg name="pcmr1" bitsize="32" type="int" group="perf"/>
+ <reg name="pcmr2" bitsize="32" type="int" group="perf"/>
+ <reg name="pcmr3" bitsize="32" type="int" group="perf"/>
+ <reg name="pcmr4" bitsize="32" type="int" group="perf"/>
+ <reg name="pcmr5" bitsize="32" type="int" group="perf"/>
+ <reg name="pcmr6" bitsize="32" type="int" group="perf"/>
+ <reg name="pcmr7" bitsize="32" type="int" group="perf"/>
+ </feature>
+ <feature name="org.gnu.gdb.or1k.group8">
+ <reg name="pmr" bitsize="32" type="int" group="power"/>
+ </feature>
+ <feature name="org.gnu.gdb.or1k.group9">
+ <reg name="picmr" bitsize="32" type="int" group="pic"/>
+ <reg name="picsr" bitsize="32" type="int" group="pic"/>
+ </feature>
+</target>
--
2.9.3