From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id MImJNWEXUWNYsA4AWB0awg (envelope-from ) for ; Thu, 20 Oct 2022 05:39:45 -0400 Received: by simark.ca (Postfix, from userid 112) id D90061E11A; Thu, 20 Oct 2022 05:39:45 -0400 (EDT) Authentication-Results: simark.ca; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.a=rsa-sha256 header.s=default header.b=tn4k18wZ; dkim-atps=neutral X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on simark.ca X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RDNS_DYNAMIC,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id 616A71E0D5 for ; Thu, 20 Oct 2022 05:39:45 -0400 (EDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 929513831D92 for ; Thu, 20 Oct 2022 09:38:42 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 929513831D92 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258722; bh=49IUbsfcxVS5X7UmOx7WcoTHJppV20TW+OE+Os7D8Fk=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=tn4k18wZf8tT5djYPfWo6B4kGifTV3w3ZKQMEFxE3b0mKYIF9rczC+iwgd4KLyeDF gFuMI5yPzdJ8If1UfJ+PCBGisbsMmyz00yaRzROXieRUZHb+tza8vA4HGMgTr7IeMB eWkDa8ZYTMrJaKo9QBLIV3Pr2l6si/oOHyglU+rI= Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id D58583875A03 for ; Thu, 20 Oct 2022 09:35:43 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org D58583875A03 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 3351C300089; Thu, 20 Oct 2022 09:35:42 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 16/40] sim/lm32: fix some missing function declaration warnings Date: Thu, 20 Oct 2022 09:32:21 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Tsukasa OI via Gdb-patches Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+public-inbox=simark.ca@sourceware.org Sender: "Gdb-patches" From: Andrew Burgess In the lm32 simulator, I was seeing some warnings about missing function declarations. The lm32 simulator has a weird header structure, in order to pull in the full cpu.h header we need to define WANT_CPU_LM32BF. This is done in some files, but not in others. Critically, it's not done in some files that then use functions declared in cpu.h In this commit I added the missing #define so that the full cpu.h can be included. After doing this there are still a few functions that are used undeclared, these functions appear to be missing any declarations at all, so I've added some to cpu.h. With this done all the warnings when compiling lm32 are resolved for both gcc and clang, so I've removed the SIM_WERROR_CFLAGS line from Makefile.in, this allows lm32 to build with -Werror. --- sim/lm32/Makefile.in | 3 --- sim/lm32/cpu.h | 11 +++++++++++ sim/lm32/dv-lm32cpu.c | 3 +++ sim/lm32/user.c | 3 +++ 4 files changed, 17 insertions(+), 3 deletions(-) diff --git a/sim/lm32/Makefile.in b/sim/lm32/Makefile.in index d827b711d45..db15bef47a7 100644 --- a/sim/lm32/Makefile.in +++ b/sim/lm32/Makefile.in @@ -24,9 +24,6 @@ SIM_EXTRA_DEPS = $(CGEN_INCLUDE_DEPS) $(srcdir)/../../opcodes/lm32-desc.h \ SIM_EXTRA_CLEAN = lm32-clean -# Some modules don't build cleanly yet. -dv-lm32cpu.o mloop.o sem.o traps.o user.o: SIM_WERROR_CFLAGS = - ## COMMON_POST_CONFIG_FRAG arch = lm32 diff --git a/sim/lm32/cpu.h b/sim/lm32/cpu.h index 05b98be8cf1..d025065f2ba 100644 --- a/sim/lm32/cpu.h +++ b/sim/lm32/cpu.h @@ -163,6 +163,17 @@ struct scache { struct argbuf argbuf; }; +/* From traps.c. */ +extern USI lm32bf_b_insn (SIM_CPU * current_cpu, USI r0, USI f_r0); +extern USI lm32bf_divu_insn (SIM_CPU * current_cpu, IADDR pc, USI r0, USI r1, USI r2); +extern USI lm32bf_modu_insn (SIM_CPU * current_cpu, IADDR pc, USI r0, USI r1, USI r2); +extern void lm32bf_wcsr_insn (SIM_CPU * current_cpu, USI f_csr, USI r1); +extern USI lm32bf_break_insn (SIM_CPU * current_cpu, IADDR pc); +extern USI lm32bf_scall_insn (SIM_CPU * current_cpu, IADDR pc); + +/* From user.c. */ +extern UINT lm32bf_user_insn (SIM_CPU * current_cpu, INT r0, INT r1, UINT imm); + /* Macros to simplify extraction, reading and semantic code. These define and assign the local vars that contain the insn's fields. */ diff --git a/sim/lm32/dv-lm32cpu.c b/sim/lm32/dv-lm32cpu.c index b97580e80a3..15a08eee815 100644 --- a/sim/lm32/dv-lm32cpu.c +++ b/sim/lm32/dv-lm32cpu.c @@ -18,6 +18,9 @@ You should have received a copy of the GNU General Public License along with this program. If not, see . */ +#define WANT_CPU lm32bf +#define WANT_CPU_LM32BF + /* This must come before any other includes. */ #include "defs.h" diff --git a/sim/lm32/user.c b/sim/lm32/user.c index 3cc21a208ee..d301d482c1b 100644 --- a/sim/lm32/user.c +++ b/sim/lm32/user.c @@ -21,6 +21,9 @@ /* This must come before any other includes. */ #include "defs.h" +#define WANT_CPU lm32bf +#define WANT_CPU_LM32BF + #include "sim-main.h" /* Handle user defined instructions. */ -- 2.34.1