From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 29002 invoked by alias); 22 Mar 2010 14:44:03 -0000 Received: (qmail 28994 invoked by uid 22791); 22 Mar 2010 14:44:03 -0000 X-SWARE-Spam-Status: No, hits=-1.8 required=5.0 tests=AWL,BAYES_00,SARE_MSGID_LONG40 X-Spam-Check-By: sourceware.org Received: from mail-px0-f197.google.com (HELO mail-px0-f197.google.com) (209.85.216.197) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 22 Mar 2010 14:43:59 +0000 Received: by pxi35 with SMTP id 35so3523580pxi.19 for ; Mon, 22 Mar 2010 07:43:58 -0700 (PDT) MIME-Version: 1.0 Received: by 10.142.250.21 with SMTP id x21mr767117wfh.216.1269269032579; Mon, 22 Mar 2010 07:43:52 -0700 (PDT) In-Reply-To: <6dc9ffc81003220735k54fbef51o4f5c9ebec06fffa7@mail.gmail.com> References: <4B9FCA21.9020904@vmware.com> <20100316200424.GA29097@caradoc.them.org> <6dc9ffc81003220735k54fbef51o4f5c9ebec06fffa7@mail.gmail.com> From: Hui Zhu Date: Mon, 22 Mar 2010 14:44:00 -0000 Message-ID: Subject: Re: [RFA 3/5] Prec: x86 segment register support: target To: "H.J. Lu" Cc: Michael Snyder , Daniel Jacobowitz , gdb-patches ml Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2010-03/txt/msg00754.txt.bz2 Prec i386 code is not OS special. So the base will not be OS special too. Thanks, Hui On Mon, Mar 22, 2010 at 22:35, H.J. Lu wrote: > On Mon, Mar 22, 2010 at 7:02 AM, Hui Zhu wrote: >> Thanks Michael and Daniel. >> >> I make a patch to add base of segments registers to x86-32: >> (gdb) info reg >> eax =A0 =A0 =A0 =A0 =A0 =A00xffffd514 =A0 =A0 =A0 -10988 >> ecx =A0 =A0 =A0 =A0 =A0 =A00x1eda96c5 =A0 =A0 =A0 517641925 >> edx =A0 =A0 =A0 =A0 =A0 =A00x1 =A0 =A0 =A01 >> ebx =A0 =A0 =A0 =A0 =A0 =A00xf7fb1ff4 =A0 =A0 =A0 -134537228 >> esp =A0 =A0 =A0 =A0 =A0 =A00xffffd488 =A0 =A0 =A0 0xffffd488 >> ebp =A0 =A0 =A0 =A0 =A0 =A00xffffd488 =A0 =A0 =A0 0xffffd488 >> esi =A0 =A0 =A0 =A0 =A0 =A00x8048510 =A0 =A0 =A0 =A0134513936 >> edi =A0 =A0 =A0 =A0 =A0 =A00x80483d0 =A0 =A0 =A0 =A0134513616 >> eip =A0 =A0 =A0 =A0 =A0 =A00x8048487 =A0 =A0 =A0 =A00x8048487 >> eflags =A0 =A0 =A0 =A0 0x246 =A0 =A0[ PF ZF IF ] >> cs =A0 =A0 =A0 =A0 =A0 =A0 0x23 =A0 =A0 35 >> ss =A0 =A0 =A0 =A0 =A0 =A0 0x2b =A0 =A0 43 >> ds =A0 =A0 =A0 =A0 =A0 =A0 0x2b =A0 =A0 43 >> es =A0 =A0 =A0 =A0 =A0 =A0 0x2b =A0 =A0 43 >> fs =A0 =A0 =A0 =A0 =A0 =A0 0x0 =A0 =A0 =A00 >> gs =A0 =A0 =A0 =A0 =A0 =A0 0x63 =A0 =A0 99 >> cs_base =A0 =A0 =A0 =A00x0 =A0 =A0 =A00 >> ss_base =A0 =A0 =A0 =A00x0 =A0 =A0 =A00 >> ds_base =A0 =A0 =A0 =A00x0 =A0 =A0 =A00 >> es_base =A0 =A0 =A0 =A00x0 =A0 =A0 =A00 >> fs_base =A0 =A0 =A0 =A00x0 =A0 =A0 =A00 >> gs_base =A0 =A0 =A0 =A00xf7e528d0 =A0 =A0 =A0 -135976752 >> >> I try it in x86-32 pc and 32bit code in x86-64. =A0It works OK. >> >> Please help me review it. >> >> Best regards, >> Hui >> >> 2010-03-22 =A0Hui Zhu =A0 >> >> =A0 =A0 =A0 =A0* features/i386/32bit-linux.xml (org.gnu.gdb.i386.linux):= Add >> =A0 =A0 =A0 =A0cs_base, ss_base, ds_base, es_base, fs_base and gs_base. >> =A0 =A0 =A0 =A0* i386-tdep.h (i386_segment_base_regnum): New enum. >> =A0 =A0 =A0 =A0* amd64-linux-nat.c (GDT_ENTRY_TLS_MIN, >> =A0 =A0 =A0 =A0GDT_ENTRY_TLS_MAX): New marco. >> =A0 =A0 =A0 =A0(ps_get_thread_area): New extern. >> =A0 =A0 =A0 =A0(amd64_linux_fetch_inferior_registers): Add >> =A0 =A0 =A0 =A0code to get 32 bits segment registers base. >> =A0 =A0 =A0 =A0* i386-linux-nat.c (GDT_ENTRY_TLS_ENTRIES, >> =A0 =A0 =A0 =A0GDT_ENTRY_TLS_MIN, >> =A0 =A0 =A0 =A0GDT_ENTRY_TLS_MAX): New marco. >> =A0 =A0 =A0 =A0(ps_get_thread_area): New extern. >> =A0 =A0 =A0 =A0(i386_linux_fetch_inferior_registers): Add >> =A0 =A0 =A0 =A0code to get segment registers base. > > Are we going to support them on other OSes? If not, > the contents of i386_segment_base_regnum should be > moved to i386-linux-tdep.h and those values should > be after > > /* Register number for the "orig_eax" pseudo-register. =A0If this > =A0 pseudo-register contains a value >=3D 0 it is interpreted as the > =A0 system call number that the kernel is supposed to restart. =A0*/ > #define I386_LINUX_ORIG_EAX_REGNUM I386_SSE_NUM_REGS > > In any cases, they shouldn't be hard-coded to any values. > Otherwise, it won't work with AVX, which will add more registers. > > > -- > H.J. >