From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 22636 invoked by alias); 17 Aug 2009 03:35:13 -0000 Received: (qmail 22624 invoked by uid 22791); 17 Aug 2009 03:35:12 -0000 X-SWARE-Spam-Status: No, hits=-1.7 required=5.0 tests=AWL,BAYES_00,SARE_MSGID_LONG40,SPF_PASS X-Spam-Check-By: sourceware.org Received: from wf-out-1314.google.com (HELO wf-out-1314.google.com) (209.85.200.174) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 17 Aug 2009 03:35:06 +0000 Received: by wf-out-1314.google.com with SMTP id 23so754490wfg.24 for ; Sun, 16 Aug 2009 20:35:04 -0700 (PDT) MIME-Version: 1.0 Received: by 10.142.225.11 with SMTP id x11mr235177wfg.233.1250480104107; Sun, 16 Aug 2009 20:35:04 -0700 (PDT) In-Reply-To: References: <4A875C26.7060302@vmware.com> From: Hui Zhu Date: Mon, 17 Aug 2009 06:36:00 -0000 Message-ID: Subject: Re: Bug in i386_process_record To: Michael Snyder Cc: "gdb-patches@sourceware.org" Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2009-08/txt/msg00228.txt.bz2 Hi Michael, I think this is not a bug. In "Intel=AE 64 and IA-32 Architectures Software Developer=92s Manual Volume 2A: Instruction Set Reference, A-M" INC=97Increment by 1, it said:"In 64-bit mode, INC r16 and INC r32 are not encodable (because opcodes 40H through 47H are REX prefixes)." And disas of machinestate is clear: (gdb) disas /m register_state Dump of assembler code for function register_state: 29 { 0x0000000000400488 : push %rbp 0x0000000000400489 : mov %rsp,%rbp 0x000000000040048c : push %rbx 0x000000000040048d : sub $0x8,%rsp 30 register int a =3D 0; 0x0000000000400491 : mov $0x0,%ebx 31=09 32 hide (a); /* External function to defeat optimization. */ 0x0000000000400496 : mov %ebx,%edi 0x0000000000400498 : callq 0x400598 33 a++; /* register_state: set breakpoint here */ 0x000000000040049d : add $0x1,%ebx 34 hide (a); /* register post-change */ 0x00000000004004a0 : mov %ebx,%edi 0x00000000004004a2 : callq 0x400598 35 } 0x00000000004004a7 : add $0x8,%rsp 0x00000000004004ab : pop %rbx 0x00000000004004ac : leaveq 0x00000000004004ad : retq End of assembler dump. In amd64, 0x40-0x47 will not be use to inv. Thanks, Hui On Mon, Aug 17, 2009 at 00:12, Hui Zhu wrote: > =A0 =A0 =A0 =A0case 0x67: > =A0 =A0 =A0 =A0 =A0prefixes |=3D PREFIX_ADDR; > =A0 =A0 =A0 =A0 =A0break; > =A0 =A0 =A0 =A0case 0x40: > =A0 =A0 =A0 =A0case 0x41: > =A0 =A0 =A0 =A0case 0x42: > =A0 =A0 =A0 =A0case 0x43: > =A0 =A0 =A0 =A0case 0x44: > =A0 =A0 =A0 =A0case 0x45: > =A0 =A0 =A0 =A0case 0x46: > =A0 =A0 =A0 =A0case 0x47: > > =A0 =A0 =A0/* inv */ > =A0 =A0case 0x40: > =A0 =A0case 0x41: > =A0 =A0case 0x42: > =A0 =A0case 0x43: > =A0 =A0case 0x44: > =A0 =A0case 0x45: > =A0 =A0case 0x46: > =A0 =A0case 0x47: > > Oops, I must make something wrong. =A0I need check the spec of amd64 clea= r. > > Thanks, > Hui > > On Sun, Aug 16, 2009 at 09:08, Michael Snyder wrote: >> Hi Hui, >> >> This line in i386-tdep.c causes 4 failures in machinestate.exp. >> >> diff -u -p -r1.283 i386-tdep.c >> --- i386-tdep.c 10 Aug 2009 03:02:39 -0000 =A0 =A0 =A01.283 >> +++ i386-tdep.c 16 Aug 2009 01:07:48 -0000 >> @@ -3283,7 +3283,7 @@ i386_process_record (struct gdbarch *gdb >> =A0 =A0 =A0 =A0 case 0x40: >> =A0 =A0 =A0 =A0 case 0x41: >> =A0 =A0 =A0 =A0 case 0x42: >> - =A0 =A0 =A0 =A0case 0x43: >> + =A0 =A0 =A0 =A0 // =A0 =A0 =A0 =A0case 0x43: >> =A0 =A0 =A0 =A0 case 0x44: >> =A0 =A0 =A0 =A0 case 0x45: >> =A0 =A0 =A0 =A0 case 0x46: >> >> 0x43 is "inc %ebx", and this line causes it to be treated as a prefix, >> consuming the instruction without recording the register change. >> >> I don't want to change it myself, because I'm not sure what other >> side effects the change might have. =A0Could you fix it please? =A0;-) >> >> Thanks, >> Michael >> >> >