From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 11328 invoked by alias); 3 Aug 2009 05:37:19 -0000 Received: (qmail 11280 invoked by uid 22791); 3 Aug 2009 05:37:18 -0000 X-SWARE-Spam-Status: No, hits=-1.7 required=5.0 tests=AWL,BAYES_00,SARE_MSGID_LONG40,SPF_PASS X-Spam-Check-By: sourceware.org Received: from mail-pz0-f197.google.com (HELO mail-pz0-f197.google.com) (209.85.222.197) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 03 Aug 2009 05:37:10 +0000 Received: by pzk35 with SMTP id 35so2560039pzk.24 for ; Sun, 02 Aug 2009 22:37:09 -0700 (PDT) MIME-Version: 1.0 Received: by 10.142.134.12 with SMTP id h12mr462145wfd.35.1249277829078; Sun, 02 Aug 2009 22:37:09 -0700 (PDT) In-Reply-To: References: <4A5A810B.7080603@vmware.com> <4A610EE8.1090904@vmware.com> <4A6B806D.6030103@vmware.com> From: Hui Zhu Date: Mon, 03 Aug 2009 05:37:00 -0000 Message-ID: Subject: Re: [RFA/RFC Prec] Add Linux AMD64 process record support second version, (instruction set support) 1/3 To: Mark Kettenis Cc: Michael Snyder , gdb-patches ml Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2009-08/txt/msg00019.txt.bz2 Ping. On Tue, Jul 28, 2009 at 09:42, Hui Zhu wrote: > Hi Mark, > > Could you please help me review this patch? > > Thanks, > Hui > > On Sun, Jul 26, 2009 at 06:00, Michael Snyder wrote: >> Hui Zhu wrote: >>> >>> On Sat, Jul 18, 2009 at 07:53, Michael Snyder wrote: >> >>>> Mark Kettenis should approve it, though. >>>> >>> >>> >>> Thanks Michael. >>> >>> I update the patches according to your mail except changelog. =A0Because >>> It sames that we just add * at the begin of the function name. >>> >>> Please help me review it. >>> >>> Thanks, >>> Hui >>> >>> 2009-07-20 =A0Hui Zhu =A0 >>> >>> =A0 =A0 =A0 =A0Add AMD64 process record instruction set support. >>> >>> =A0 =A0 =A0 =A0* i386-tdep.h (gdbarch_tdep): Add record_regmap for regi= sters >>> =A0 =A0 =A0 =A0because the AMD64's registers order in GDB is not same w= ith >>> =A0 =A0 =A0 =A0I386 instructions. >>> =A0 =A0 =A0 =A0Add i386_syscall_record to be the syscall function handle >>> =A0 =A0 =A0 =A0interface. >>> =A0 =A0 =A0 =A0(record_i386_regnum): Number for record_regmap. >>> =A0 =A0 =A0 =A0* i386-tdep.c (OT_QUAD): For 64 bits. >>> =A0 =A0 =A0 =A0(i386_record_s): Add rex_x, rex_b, rip_offset and >>> =A0 =A0 =A0 =A0popl_esp_hack for AMD64 instruction set. And regmap for >>> =A0 =A0 =A0 =A0record_regmap. >>> =A0 =A0 =A0 =A0(i386_record_lea_modrm_addr): Support AMD64 instruction = set >>> =A0 =A0 =A0 =A064 bits lea. >>> =A0 =A0 =A0 =A0(i386_record_lea_modrm): Ditto. >>> =A0 =A0 =A0 =A0(i386_record_push): New function. =A0Record the executio= n log >>> =A0 =A0 =A0 =A0of push. >>> =A0 =A0 =A0 =A0(I386_RECORD_ARCH_LIST_ADD_REG): New macro to record the >>> =A0 =A0 =A0 =A0register. >>> =A0 =A0 =A0 =A0(i386_process_record): Support AMD64 instruction set. >>> =A0 =A0 =A0 =A0amd64-tdep.c (amd64_record_regmap): For record_regmap. >>> =A0 =A0 =A0 =A0(amd64_init_abi): Set amd64_record_regmap to record_regm= ap. >> >> =A0 =A0 =A0 =A0* amd64-tdep.c (...): >> >> Except for this small nit with the changelog, >> I have no further issues with this patch. >> Thanks for all your revisions (and your hard work)! >> >> Mark? =A0You have the final say... >> >> >