From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 31197 invoked by alias); 21 Oct 2008 07:04:32 -0000 Received: (qmail 31188 invoked by uid 22791); 21 Oct 2008 07:04:31 -0000 X-Spam-Check-By: sourceware.org Received: from ti-out-0910.google.com (HELO ti-out-0910.google.com) (209.85.142.188) by sourceware.org (qpsmtpd/0.31) with ESMTP; Tue, 21 Oct 2008 07:03:56 +0000 Received: by ti-out-0910.google.com with SMTP id d10so1145284tib.12 for ; Tue, 21 Oct 2008 00:03:53 -0700 (PDT) Received: by 10.110.92.8 with SMTP id p8mr5675842tib.11.1224572633081; Tue, 21 Oct 2008 00:03:53 -0700 (PDT) Received: by 10.110.42.9 with HTTP; Tue, 21 Oct 2008 00:03:52 -0700 (PDT) Message-ID: Date: Tue, 21 Oct 2008 07:04:00 -0000 From: teawater To: "Pedro Alves" Subject: Re: [reverse/record] adjust_pc_after_break in reverse execution mode? Cc: "Michael Snyder" , "gdb-patches@sourceware.org" In-Reply-To: <200810210121.07914.pedro@codesourcery.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <200810180210.16346.pedro@codesourcery.com> <48FCC413.3040506@vmware.com> <200810210121.07914.pedro@codesourcery.com> X-IsSubscribed: yes Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2008-10/txt/msg00506.txt.bz2 Sorry I send too much Email. I found that: if (singlestep_breakpoints_inserted_p || !ptid_equal (ecs->ptid, inferior_ptid) || !currently_stepping (ecs->event_thread) || ecs->event_thread->prev_pc == breakpoint_pc) regcache_write_pc (regcache, breakpoint_pc); Before write_pc, there are a lot of thing to check. Do we need to check it in record_wait? If so, it actually useless cause it will be set back in adjust_pc_after_break? Maybe we can let adjust_pc_after_break disable in replay mode. How do you think? On Tue, Oct 21, 2008 at 08:21, Pedro Alves wrote: > On Tuesday 21 October 2008 00:36:12, teawater wrote: >> I think your mean is check breakpoint in address >> read_pc()+gdbarch_decr_pc_after_break (gdbarch) in record_wait, right? > > Taking x86 as an example, when you're doing normal debugging and you > hit a breakpoint (SIGTRAP), the first read_pc GDB does to check where > what breakpoint was hit, will read back `breakpoint_PC + 1' --- GDB takes care > getting rid of that `+ 1' offset in infrun.c:adjust_pc_after_break. The > idea is for you to do the same as the kernel/hardware would --- still > check for breakpoints at read_pc, but increment PC by 1 before reporting the > breakpoint to GDB's core. E.g., see the `pc += gdbarch...' line from > the patch I posted previously, something like: > > record.c:record_wait () > { > ... > + /* Check for breakpoint hits in forward execution. */ > + pc = read_pc (); > + if (execution_direction == EXEC_FORWARD > + && regular_breakpoint_inserted_here_p (pc) > + /* && !single-stepping */) > + { > + status->kind = TARGET_WAITKIND_STOPPED; > + status->value.sig = TARGET_SIGNAL_TRAP; > + if (software_breakpoint_inserted_here_p (pc)) > + { > + pc += gdbarch_decr_pc_after_break (gdbarch); > + write_pc (pc); > + } > + > > -- > Pedro Alves >