From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id WRysGjG27GC2dwAAWB0awg (envelope-from ) for ; Mon, 12 Jul 2021 17:37:53 -0400 Received: by simark.ca (Postfix, from userid 112) id 5A93E1EDEC; Mon, 12 Jul 2021 17:37:53 -0400 (EDT) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on simark.ca X-Spam-Level: X-Spam-Status: No, score=-0.7 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,MAILING_LIST_MULTI,RDNS_DYNAMIC,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id 508521E54D for ; Mon, 12 Jul 2021 17:37:52 -0400 (EDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id CDEB43893640 for ; Mon, 12 Jul 2021 21:37:51 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org CDEB43893640 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1626125871; bh=6MWJJ+E8zSNZZFdlnwCETxZG5wgZ1lzqQEKFvkOG6yw=; h=Subject:To:References:Date:In-Reply-To:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=j6YL8mHA3eC7XqnHOO6xzfhklilS8BULMkjXiJUrXLKROidvdOtxdd5IOWx6gQz5u TWiskQ9Eznp0sm6JPPlDhB16HHiTBirC0b42S9uAnZUUgRyWuY0OWuGD0WoobuVrKT h/9kukHP8wBOMzQ/39vMUI1P3LkLeaAmF8uJW+J8= Received: from smtp.polymtl.ca (smtp.polymtl.ca [132.207.4.11]) by sourceware.org (Postfix) with ESMTPS id 053E1385742A for ; Mon, 12 Jul 2021 21:37:31 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 053E1385742A Received: from simark.ca (simark.ca [158.69.221.121]) (authenticated bits=0) by smtp.polymtl.ca (8.14.7/8.14.7) with ESMTP id 16CLbPEi013476 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 12 Jul 2021 17:37:30 -0400 DKIM-Filter: OpenDKIM Filter v2.11.0 smtp.polymtl.ca 16CLbPEi013476 Received: from [10.0.0.11] (192-222-157-6.qc.cable.ebox.net [192.222.157.6]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPSA id A10E21E54D; Mon, 12 Jul 2021 17:37:25 -0400 (EDT) Subject: Re: [PATCH v4] [gdb] Add basic Z80 CPU support To: Sergey Belyashov , gdb-patches@sourceware.org References: <5a120c4d-630a-08f5-fb81-d35237267adb@simark.ca> <20200925114042.14337-1-Sergey.Belyashov@gmail.com> Message-ID: Date: Mon, 12 Jul 2021 17:37:25 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: <20200925114042.14337-1-Sergey.Belyashov@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-Poly-FromMTA: (simark.ca [158.69.221.121]) at Mon, 12 Jul 2021 21:37:25 +0000 X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Simon Marchi via Gdb-patches Reply-To: Simon Marchi Errors-To: gdb-patches-bounces+public-inbox=simark.ca@sourceware.org Sender: "Gdb-patches" Hi Sergey, I'm fine with merging this pretty much as-is. I certainly won't have the time to do an in-depth / functional review, but I trust that if it is useful to you, it can be for others. I can take care of rebasing and doing the fixups to make sure it compiles, as well as make a few style changes. I'm just wondering about these, if you could help me: > diff --git a/gdb/features/z80-cpu.xml b/gdb/features/z80-cpu.xml > new file mode 100644 > index 0000000000..d8093d68b9 > --- /dev/null > +++ b/gdb/features/z80-cpu.xml > @@ -0,0 +1,34 @@ > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + Is this commented out on purpose, can we remove it? > +static int > +z80_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR pc_beg, CORE_ADDR pc_end, > + struct z80_unwind_cache *info) > +{ > + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); > + int addr_len = gdbarch_tdep (gdbarch)->addr_length; > + gdb_byte prologue[32]; /* max prologue is 24 bytes: __interrupt with local array */ > + int pos = 0; > + int len; > + int reg; > + CORE_ADDR value; > + > + len = pc_end - pc_beg; > + if (len > (int)sizeof(prologue)) > + len = sizeof(prologue); > + > + read_memory (pc_beg, prologue, len); > + > + /* stage0: check for series of POPs and then PUSHs */ > + if ((reg = z80_is_pop_rr(prologue, &pos))) > + { > + int i; > + int size = pos; > + gdb_byte regs[8]; /* Z80 have only 6 register pairs */ > + regs[0] = reg & 0xff; > + for (i = 1; i < 8 && (regs[i] = z80_is_pop_rr (&prologue[pos], &size)); > + ++i, pos += size); > + /* now we expect series of PUSHs in reverse order */ > + for (--i; i >= 0 && regs[i] == z80_is_push_rr (&prologue[pos], &size); > + --i, pos += size); > + if (i == -1 && pos > 0) > + info->prologue_type.load_args = 1; > + else > + pos = 0; > + } > + /* stage1: check for __interrupt handlers and __critical functions */ > + else if (!memcmp (&prologue[pos], "\355\127\363\365", 4)) > + { /* ld a, i; di; push af */ > + info->prologue_type.critical = 1; > + pos += 4; > + info->state_size += addr_len; > + } > + else if (!memcmp (&prologue[pos], "\365\305\325\345\375\345", 6)) > + { /* push af; push bc; push de; push hl; push iy */ > + info->prologue_type.interrupt = 1; > + pos += 6; > + info->state_size += addr_len * 5; > + } > + > + /* stage2: check for FP saving scheme */ > + if (prologue[pos] == 0xcd) /* call nn */ > + { > + struct bound_minimal_symbol msymbol; > + msymbol = lookup_minimal_symbol ("__sdcc_enter_ix", NULL, NULL); > + if (msymbol.minsym) > + { > + value = BMSYMBOL_VALUE_ADDRESS (msymbol); > + if (value == extract_unsigned_integer (&prologue[pos+1], addr_len, byte_order)) > + { > + pos += 1 + addr_len; > + info->prologue_type.fp_sdcc = 1; > + } > + } > + } > + else if (!memcmp (&prologue[pos], "\335\345\335\041\000\000", 4+addr_len) && > + !memcmp (&prologue[pos+4+addr_len], "\335\071\335\371", 4)) > + { /* push ix; ld ix, #0; add ix, sp; ld sp, ix */ > + pos += 4 + addr_len + 4; > + info->prologue_type.fp_sdcc = 1; > + } > + else if (!memcmp (&prologue[pos], "\335\345", 2)) > + { /* push ix */ > + pos += 2; > + info->prologue_type.fp_sdcc = 1; > + } > + > + /* stage3: check for local variables allocation */ > + switch (prologue[pos]) > + { > + case 0xf5: /* push af */ > + info->size = 0; > + while (prologue[pos] == 0xf5) > + { > + info->size += addr_len; > + pos++; > + } > + if (prologue[pos] == 0x3b) /* dec sp */ > + { > + info->size++; > + pos++; > + } > + break; > + case 0x3b: /* dec sp */ > + info->size = 0; > + while (prologue[pos] == 0x3b) > + { > + info->size++; > + pos++; > + } > + break; > + case 0x21: /*ld hl, -nn */ > + if (prologue[pos+addr_len] == 0x39 && prologue[pos+addr_len] >= 0x80 && > + prologue[pos+addr_len+1] == 0xf9) > + { /* add hl, sp; ld sp, hl */ > + info->size = -extract_signed_integer(&prologue[pos+1], addr_len, byte_order); > + pos += 1 + addr_len + 2; > + } > + break; > + case 0xfd: /* ld iy, -nn */ > + if (prologue[pos+1] == 0x21 && prologue[pos+1+addr_len] >= 0x80 && > + !memcmp (&prologue[pos+2+addr_len], "\375\071\375\371", 4)) > + { > + info->size = -extract_signed_integer(&prologue[pos+2], addr_len, byte_order); > + pos += 2 + addr_len + 4; > + } > + break; > + case 0xed: /* check for lea xx, ix - n */ > + switch (prologue[pos+1]) > + { > + case 0x22: /* lea hl, ix - n */ > + if (prologue[pos+2] >= 0x80 && prologue[pos+3] == 0xf9) > + { /* ld sp, hl */ > + info->size = -extract_signed_integer(&prologue[pos+2], 1, byte_order); > + pos += 4; > + } > + break; > + case 0x55: /* lea iy, ix - n */ > + if (prologue[pos+2] >= 0x80 && prologue[pos+3] == 0xfd && > + prologue[pos+4] == 0xf9) > + { /* ld sp, iy */ > + info->size = -extract_signed_integer(&prologue[pos+2], 1, byte_order); > + pos += 5; > + } > + break; > + } > + break; > + } > + len = 0; > + //info->saved_regs[Z80_PC_REGNUM].addr = len++ Is this commented out on purpose? Can we remove it? > +/* returns pointer to instruction information structure corresponded to opcode > + in buf */ > +static const struct insn_info * > +z80_get_insn_info (struct gdbarch *gdbarch, const gdb_byte *buf, int *size) > +{ > + int code; > + const struct insn_info *info; > + unsigned long mach = gdbarch_bfd_arch_info (gdbarch)->mach; > + *size = 0; > + switch (mach) > + { > + case bfd_mach_ez80_z80: > + info = &ez80_main_insn_table[4]; /* skip force_nops */ > + break; > + case bfd_mach_ez80_adl: > + info = &ez80_adl_main_insn_table[4]; /* skip force_nops */ > + break; > +/* > + case bfd_mach_gbz80: > + info = &gbz80_main_insn_table[0]; > + break; > + case bfd_mach_z80n: > + info = &z80n_main_insn_table[0]; > + break; > +*/ Is this commented out on purpose, can we remove it? Thanks, Simon