From: Tsukasa OI via Gdb-patches <gdb-patches@sourceware.org>
To: Tsukasa OI <research_trasio@irq.a4lg.com>,
Andrew Burgess <aburgess@redhat.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Claudiu Zissulescu <claziss@synopsys.com>,
Chenghua Xu <paul.hua.gm@gmail.com>,
Nelson Chu <nelson@rivosinc.com>
Cc: binutils@sourceware.org, gdb-patches@sourceware.org
Subject: [PATCH 0/2] gdb, opcodes: Add non-enum disassembler options
Date: Wed, 31 Aug 2022 02:15:30 +0000 [thread overview]
Message-ID: <cover.1661912099.git.research_trasio@irq.a4lg.com> (raw)
Hello,
This is a part of my work: implement `arch' disassembler option in RISC-V.
However, it requires technical changes also affecting opcodes:ARC and MIPS
and GDB. It will take some time because we have to wait many Binutils
prerequisites but this technical change can be discussed now (due to it
affects both Binutils and GDB).
PATCH 1/2: Binutils changes
PATCH 2/2: GDB changes
Independently applying Binutils/GDB changes is completely safe because we
haven't implemented any actual non-enum options.
[Example: Implement `arch' disassembler option]
$ objdump -b binary -m riscv:rv32 -M arch=rv32i_zfinx -D sample.bin
(... analyze a binary file with 'RV32I_Zfinx' ISA)
You can try my modified version at:
<https://github.com/a4lg/binutils-gdb/wiki/riscv_dis_arch_priv_spec>
<https://github.com/a4lg/binutils-gdb/tree/riscv-dis-arch-priv-spec>
[Technical Changes]
There is a portable mechanism for disassembler options and used on some
architectures:
- ARC
- Arm
- MIPS
- PowerPC
- RISC-V
- S/390
However, it only supports following forms:
- [NAME]
- [NAME]=[ENUM_VALUE]
Valid values for [ENUM_VALUE] must be predefined in
`disasm_option_arg_t.values'. For instance, for -M cpu=[CPU] in ARC
architecture, opcodes/arc-dis.c builds valid CPU model list from
include/elf/arc-cpu.def.
This patchset adds following third format:
- [NAME]=[ARBITRARY_VALUE] (cannot contain "," though)
This is identified by `NULL' value of `disasm_option_arg_t.values'
(normally, this is a non-NULL pointer to a NULL-terminated list).
Note that this patch modifies following architectures (that use
similar code to print disassembler help message) for consistency:
- ARC
- MIPS
- RISC-V
In the future, adding "verify" function to disasm_option_arg_t (or some)
might be an option as it may provide flexible argument validation.
Thanks,
Tsukasa
Tsukasa OI (2):
opcodes: Add non-enum disassembler options
gdb: Add non-enum disassembler options
gdb/disasm.c | 4 ++++
include/dis-asm.h | 3 ++-
opcodes/arc-dis.c | 2 ++
opcodes/mips-dis.c | 2 ++
opcodes/riscv-dis.c | 2 ++
5 files changed, 12 insertions(+), 1 deletion(-)
base-commit: 803584b96d97e1f6ea50b0a0064d2a03ab0baa60
--
2.34.1
next reply other threads:[~2022-08-31 2:16 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-31 2:15 Tsukasa OI via Gdb-patches [this message]
2022-08-31 2:15 ` [PATCH 1/2] " Tsukasa OI via Gdb-patches
2022-09-01 12:03 ` Nick Clifton via Gdb-patches
2022-08-31 2:15 ` [PATCH 2/2] gdb: " Tsukasa OI via Gdb-patches
2022-09-02 10:00 ` Andrew Burgess via Gdb-patches
2022-09-04 8:03 ` [PATCH v2 0/2] gdb, opcodes: " Tsukasa OI via Gdb-patches
2022-09-04 8:03 ` [PATCH v2 1/2] " Tsukasa OI via Gdb-patches
2022-09-06 2:36 ` Tsukasa OI via Gdb-patches
2022-09-06 8:31 ` Tsukasa OI via Gdb-patches
2022-09-04 8:03 ` [PATCH v2 2/2] gdb: " Tsukasa OI via Gdb-patches
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