From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 123754 invoked by alias); 29 Aug 2018 16:41:12 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 123743 invoked by uid 89); 29 Aug 2018 16:41:11 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-12.6 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_2,GIT_PATCH_3,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-wr1-f66.google.com Received: from mail-wr1-f66.google.com (HELO mail-wr1-f66.google.com) (209.85.221.66) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 29 Aug 2018 16:41:10 +0000 Received: by mail-wr1-f66.google.com with SMTP id v90-v6so5465564wrc.0 for ; Wed, 29 Aug 2018 09:41:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=embecosm.com; s=google; h=from:to:cc:subject:date:message-id; bh=Z4NnJDnyOYI49Q181Yae4fo0WjHpl4gcriUTc+LS0XA=; b=hQhVB9S/zOBdpChFRaJTNMu4AIQaPTQRLTbIqF04hIS3CSOGCxZ3p/AxRVT8TjeZwB /3Z+YKh8dklAtrlJP48z3F/xqdxDbK8RYadydpHvZqMQN4mYGZNdopl4OiOZtANkFyJY ryzLddVoCkI10qro+sdyt1hhd+tfAEEGDZMvxj64PxNCbfCvNHOlMNbCna0+XJpOLdnA CND18AKcywd38pO1nePz1gCt4vQOS2G/+QAuIpO3gUt5tSisi/qyyRLvDlKCoZbZxgZ5 dGYf8lRWhMiE0eob0RXhq/RNyakuwVOxqKgIpZmahMDGvKHXHNgYKYGmk/BX/Dyiq44N +Kew== Return-Path: Received: from localhost (host86-134-20-86.range86-134.btcentralplus.com. [86.134.20.86]) by smtp.gmail.com with ESMTPSA id x16-v6sm2684824wro.84.2018.08.29.09.41.07 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 29 Aug 2018 09:41:07 -0700 (PDT) From: Andrew Burgess To: gdb-patches@sourceware.org Cc: jimw@sifive.com, palmer@sifive.com, Andrew Burgess Subject: [PATCH 0/4] RISCV Non-DWARF stack unwinding Date: Wed, 29 Aug 2018 16:41:00 -0000 Message-Id: X-IsSubscribed: yes X-SW-Source: 2018-08/txt/msg00750.txt.bz2 A series of patches providing non-DWARF stack unwinding on RISC-V. Tested on a set of targetes including with and without compressed, and FP, and on 32 and 64 bit. Patch #3 touches generic code and so will need global maintainer review before I can commit. Review and feedback is welcome for all of the other patches too. Thanks, Andrew --- Andrew Burgess (4): gdb/riscv: remove extra caching of misa register gdb/riscv: Extend instruction decode to cover more instructions gdb: Extend the trad-frame API gdb/riscv: Provide non-DWARF stack unwinder gdb/ChangeLog | 42 +++++++ gdb/riscv-tdep.c | 361 +++++++++++++++++++++++++++++++++---------------------- gdb/riscv-tdep.h | 2 + gdb/trad-frame.c | 21 +++- gdb/trad-frame.h | 8 ++ 5 files changed, 287 insertions(+), 147 deletions(-) -- 2.14.4