From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id 0ALkKpDl/WNbeAAAWB0awg (envelope-from ) for ; Tue, 28 Feb 2023 06:29:20 -0500 Received: by simark.ca (Postfix, from userid 112) id AC9CE1E222; Tue, 28 Feb 2023 06:29:20 -0500 (EST) Authentication-Results: simark.ca; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.a=rsa-sha256 header.s=default header.b=aYAMKyjs; dkim-atps=neutral X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on simark.ca X-Spam-Level: X-Spam-Status: No, score=-8.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id 415AC1E128 for ; Tue, 28 Feb 2023 06:29:20 -0500 (EST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id EA67F385B51B for ; Tue, 28 Feb 2023 11:29:19 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org EA67F385B51B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1677583760; bh=+oGn46Z7tR3pt0yaumfX4sFQhUKXiZKt/V8MJPf7lt8=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=aYAMKyjsIKn2I6aygsKaY6moiw/YawpcL4N0krIpxge7FDeGpo3tJJDmBR+hDClD/ vgLWCnUPSCKg0JQLArNoPFkRsqmq5yB4YGvSilTMOTaL3/CIMjPy2m008RD7wpXUaK ZO8Z3w52oFSwazIPFZ3tokNMVvsU6YxUDJ4Ql/D4= Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by sourceware.org (Postfix) with ESMTPS id B42D93858434 for ; Tue, 28 Feb 2023 11:28:56 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org B42D93858434 X-IronPort-AV: E=McAfee;i="6500,9779,10634"; a="314536314" X-IronPort-AV: E=Sophos;i="5.98,221,1673942400"; d="scan'208";a="314536314" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Feb 2023 03:28:56 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10634"; a="738120444" X-IronPort-AV: E=Sophos;i="5.98,221,1673942400"; d="scan'208";a="738120444" Received: from ultl2604.iul.intel.com (HELO localhost) ([172.28.48.47]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Feb 2023 03:28:55 -0800 To: gdb-patches@sourceware.org Subject: [PATCH 03/26] gdbserver: by-pass regcache to access tdesc only Date: Tue, 28 Feb 2023 12:28:01 +0100 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Tankut Baris Aktemur via Gdb-patches Reply-To: Tankut Baris Aktemur Errors-To: gdb-patches-bounces+public-inbox=simark.ca@sourceware.org Sender: "Gdb-patches" The `get_thread_regcache` function has a `fetch` option to skip fetching the registers from the target. It seems this option is set to false only at uses where we just need to access the tdesc through the regcache of the current thread, as in struct regcache *regcache = get_thread_regcache (current_thread, 0); ... regcache->tdesc ... Since the tdesc of a regcache is set from the process of the thread that owns the regcache, we can simplify the code to access the tdesc via the process, as in ... current_process ()->tdesc ... This is intended to be a refactoring with no behavioral change. Tested only for the linux-x86-low target. --- gdbserver/linux-ppc-low.cc | 10 +++------- gdbserver/linux-s390-low.cc | 14 ++++---------- gdbserver/linux-x86-low.cc | 7 ++----- 3 files changed, 9 insertions(+), 22 deletions(-) diff --git a/gdbserver/linux-ppc-low.cc b/gdbserver/linux-ppc-low.cc index f8dd770b8eb..96c1da4d905 100644 --- a/gdbserver/linux-ppc-low.cc +++ b/gdbserver/linux-ppc-low.cc @@ -1609,8 +1609,7 @@ ppc_target::install_fast_tracepoint_jump_pad (CORE_ADDR tpoint, const CORE_ADDR entryaddr = *jump_entry; int rsz, min_frame, frame_size, tp_reg; #ifdef __powerpc64__ - struct regcache *regcache = get_thread_regcache (current_thread, 0); - int is_64 = register_size (regcache->tdesc, 0) == 8; + int is_64 = register_size (current_process ()->tdesc, 0) == 8; int is_opd = is_64 && !is_elfv2_inferior (); #else int is_64 = 0, is_opd = 0; @@ -3381,9 +3380,7 @@ emit_ops * ppc_target::emit_ops () { #ifdef __powerpc64__ - struct regcache *regcache = get_thread_regcache (current_thread, 0); - - if (register_size (regcache->tdesc, 0) == 8) + if (register_size (current_process ()->tdesc, 0) == 8) { if (is_elfv2_inferior ()) return &ppc64v2_emit_ops_impl; @@ -3399,8 +3396,7 @@ ppc_target::emit_ops () int ppc_target::get_ipa_tdesc_idx () { - struct regcache *regcache = get_thread_regcache (current_thread, 0); - const struct target_desc *tdesc = regcache->tdesc; + const struct target_desc *tdesc = current_process ()->tdesc; #ifdef __powerpc64__ if (tdesc == tdesc_powerpc_64l) diff --git a/gdbserver/linux-s390-low.cc b/gdbserver/linux-s390-low.cc index 48f64ef7bb3..11f207ea2f1 100644 --- a/gdbserver/linux-s390-low.cc +++ b/gdbserver/linux-s390-low.cc @@ -797,9 +797,7 @@ s390_target::low_get_thread_area (int lwpid, CORE_ADDR *addrp) { CORE_ADDR res = ptrace (PTRACE_PEEKUSER, lwpid, (long) PT_ACR0, (long) 0); #ifdef __s390x__ - struct regcache *regcache = get_thread_regcache (current_thread, 0); - - if (register_size (regcache->tdesc, 0) == 4) + if (register_size (current_process ()->tdesc, 0) == 4) res &= 0xffffffffull; #endif *addrp = res; @@ -1287,8 +1285,7 @@ s390_target::install_fast_tracepoint_jump_pad unsigned char jbuf[6] = { 0xc0, 0xf4, 0, 0, 0, 0 }; /* jg ... */ CORE_ADDR buildaddr = *jump_entry; #ifdef __s390x__ - struct regcache *regcache = get_thread_regcache (current_thread, 0); - int is_64 = register_size (regcache->tdesc, 0) == 8; + int is_64 = register_size (current_process ()->tdesc, 0) == 8; int is_zarch = is_64 || have_hwcap_s390_high_gprs; int has_vx = have_hwcap_s390_vx; #else @@ -1452,8 +1449,7 @@ s390_target::get_min_fast_tracepoint_insn_len () int s390_target::get_ipa_tdesc_idx () { - struct regcache *regcache = get_thread_regcache (current_thread, 0); - const struct target_desc *tdesc = regcache->tdesc; + const struct target_desc *tdesc = current_process ()->tdesc; #ifdef __s390x__ if (tdesc == tdesc_s390x_linux64) @@ -2840,9 +2836,7 @@ emit_ops * s390_target::emit_ops () { #ifdef __s390x__ - struct regcache *regcache = get_thread_regcache (current_thread, 0); - - if (register_size (regcache->tdesc, 0) == 8) + if (register_size (current_process ()->tdesc, 0) == 8) return &s390x_emit_ops; else #endif diff --git a/gdbserver/linux-x86-low.cc b/gdbserver/linux-x86-low.cc index 4a538b107be..e08ebacee05 100644 --- a/gdbserver/linux-x86-low.cc +++ b/gdbserver/linux-x86-low.cc @@ -276,9 +276,7 @@ static /*const*/ int i386_regmap[] = static int is_64bit_tdesc (thread_info *thread) { - struct regcache *regcache = get_thread_regcache (thread, 0); - - return register_size (regcache->tdesc, 0) == 8; + return register_size (get_thread_process (thread)->tdesc, 0) == 8; } #endif @@ -2958,8 +2956,7 @@ x86_target::low_supports_range_stepping () int x86_target::get_ipa_tdesc_idx () { - struct regcache *regcache = get_thread_regcache (current_thread, 0); - const struct target_desc *tdesc = regcache->tdesc; + const struct target_desc *tdesc = current_process ()->tdesc; #ifdef __x86_64__ return amd64_get_ipa_tdesc_idx (tdesc); -- 2.25.1 Intel Deutschland GmbH Registered Address: Am Campeon 10, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Christin Eisenschmid, Sharon Heck, Tiffany Doon Silva Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928