From bb5d08fbf07d559df7506944cbe328b98e3e02fd Mon Sep 17 00:00:00 2001
From: Ajit Kumar Agarwal <ajitkum@xhdspdgnu.(none)>
Date: Tue, 20 May 2014 21:16:24 +0530
Subject: [PATCH] [Patch, microblaze]: Add slr and shr regs and little-endian breakpoint

ChangeLog:

2014-05-20 Ajit Agarwal <ajitkum@xilinx.com>

	* gdb/gdbserver/Makefile.in (microblaze-linux.c): New rule.

	* gdb/microblaze-tdep.c (microblaze_register_names): Added
	the rshr and rslr register names.
	(microblaze_breakpoint_from_pc): Added Declaration of byte_order
	and break_insn_le. Check of byte order by BFD_ENDIAN_BIG.

	* gdb/microblaze-tdep.h (microblaze_reg_num): Addition of
	field MICROBLAZE_SLR_REGNUM and MICROBLAZE_SHR_REGNUM.
	(MICROBLAZE_BREAKPOINT_LE): New Macro.
	(microblaze_frame_cache): Change in the index of
	register_offsets.

	* gdb/regformats/reg-microblaze.dat: New Register data file.

Signed-off-by:Ajit Agarwal <ajitkum@xilinx.com>
---
 gdb/gdbserver/Makefile.in         |    5 +++-
 gdb/microblaze-tdep.c             |   10 +++++++-
 gdb/microblaze-tdep.h             |    8 +++++-
 gdb/regformats/reg-microblaze.dat |   41 +++++++++++++++++++++++++++++++++++++
 4 files changed, 59 insertions(+), 5 deletions(-)
 create mode 100644 gdb/regformats/reg-microblaze.dat

diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in
index f773fa2..2454003 100644
--- a/gdb/gdbserver/Makefile.in
+++ b/gdb/gdbserver/Makefile.in
@@ -348,7 +348,8 @@ clean:
 	rm -f amd64-avx.c amd64-avx-linux.c
 	rm -f amd64-mpx.c amd64-mpx-linux.c
 	rm -f amd64-avx512.c amd64-avx512-linux.c
-	rm -f i386-mmx.c i386-mmx-linux.c
+	rm -f i386-mmx.c i386-mmx-linux.c 
+	rm -f microblaze-linux.c
 	rm -f x32.c x32-linux.c
 	rm -f x32-avx.c x32-avx-linux.c
 	rm -f x32-avx512.c x32-avx512-linux.c
@@ -614,6 +615,8 @@ reg-cf.c : $(srcdir)/../regformats/reg-cf.dat $(regdat_sh)
 	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-cf.dat reg-cf.c
 mips-linux.c : $(srcdir)/../regformats/mips-linux.dat $(regdat_sh)
 	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/mips-linux.dat mips-linux.c
+microblaze-linux.c : $(srcdir)/../regformats/reg-microblaze.dat $(regdat_sh)
+	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-microblaze.dat mips-linux.c
 mips-dsp-linux.c : $(srcdir)/../regformats/mips-dsp-linux.dat $(regdat_sh)
 	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/mips-dsp-linux.dat mips-dsp-linux.c
 mips64-linux.c : $(srcdir)/../regformats/mips64-linux.dat $(regdat_sh)
diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
index 14c1b52..4402c99 100644
--- a/gdb/microblaze-tdep.c
+++ b/gdb/microblaze-tdep.c
@@ -73,7 +73,8 @@ static const char *microblaze_register_names[] =
   "rpc",  "rmsr", "rear", "resr", "rfsr", "rbtr",
   "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6",
   "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11",
-  "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi"
+  "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi",
+  "rslr", "rshr"
 };
 
 #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names)
@@ -160,10 +161,15 @@ static const gdb_byte *
 microblaze_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, 
 			       int *len)
 {
+  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
   static gdb_byte break_insn[] = MICROBLAZE_BREAKPOINT;
+  static gdb_byte break_insn_le[] = MICROBLAZE_BREAKPOINT_LE;
 
   *len = sizeof (break_insn);
-  return break_insn;
+  if (byte_order == BFD_ENDIAN_BIG)
+    return break_insn;
+  else
+    return break_insn_le;
 }
 
 /* Allocate and initialize a frame cache.  */
diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
index a532092..3f2bdc3 100644
--- a/gdb/microblaze-tdep.h
+++ b/gdb/microblaze-tdep.h
@@ -32,6 +32,7 @@ struct microblaze_frame_cache
   CORE_ADDR base;
   CORE_ADDR pc;
 
+  CORE_ADDR saved_sp;
   /* Do we have a frame?  */
   int frameless_p;
 
@@ -42,7 +43,7 @@ struct microblaze_frame_cache
   int fp_regnum;
 
   /* Offsets to saved registers.  */
-  int register_offsets[57];	/* Must match MICROBLAZE_NUM_REGS.  */
+  int register_offsets[59];	/* Must match MICROBLAZE_NUM_REGS.  */
 
   /* Table of saved registers.  */
   struct trad_frame_saved_reg *saved_regs;
@@ -107,7 +108,9 @@ enum microblaze_regnum
   MICROBLAZE_RTLBX_REGNUM,
   MICROBLAZE_RTLBSX_REGNUM,
   MICROBLAZE_RTLBLO_REGNUM,
-  MICROBLAZE_RTLBHI_REGNUM
+  MICROBLAZE_RTLBHI_REGNUM,
+  MICROBLAZE_SLR_REGNUM, 
+  MICROBLAZE_SHR_REGNUM 
 };
 
 /* All registers are 32 bits.  */
@@ -116,5 +119,6 @@ enum microblaze_regnum
 /* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used.
    Only used for native debugging.  */
 #define MICROBLAZE_BREAKPOINT {0xb9, 0xcc, 0x00, 0x60}
+#define MICROBLAZE_BREAKPOINT_LE {0x18, 0x00, 0x0c, 0xba}
 
 #endif /* microblaze-tdep.h */
diff --git a/gdb/regformats/reg-microblaze.dat b/gdb/regformats/reg-microblaze.dat
new file mode 100644
index 0000000..936bc44
--- /dev/null
+++ b/gdb/regformats/reg-microblaze.dat
@@ -0,0 +1,41 @@
+name:microblaze 
+expedite:r1,pc 
+32:r0 
+32:r1 
+32:r2 
+32:r3 
+32:r4 
+32:r5 
+32:r6 
+32:r7 
+32:r8 
+32:r9 
+32:r10 
+32:r11 
+32:r12 
+32:r13 
+32:r14 
+32:r15 
+32:r16 
+32:r17 
+32:r18 
+32:r19 
+32:r20 
+32:r21 
+32:r22 
+32:r23 
+32:r24 
+32:r25 
+32:r26 
+32:r27 
+32:r28 
+32:r29 
+32:r30 
+32:r31 
+32:pc 
+32:msr 
+32:ear 
+32:esr 
+32:fsr 
+32:slr
+32:shr
-- 
1.7.1

