From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 103524 invoked by alias); 14 Nov 2017 14:01:48 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 103515 invoked by uid 89); 14 Nov 2017 14:01:47 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.7 required=5.0 tests=BAYES_00,KB_WAM_FROM_NAME_SINGLEWORD,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=no version=3.3.2 spammy=interrupt, H*u:6.1, H*UA:6.1 X-HELO: relay1.mentorg.com Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 14 Nov 2017 14:01:38 +0000 Received: from svr-orw-mbx-04.mgc.mentorg.com ([147.34.90.204]) by relay1.mentorg.com with esmtps (TLSv1.2:ECDHE-RSA-AES256-SHA384:256) id 1eEbmS-0003zu-NJ from Paul_Carroll@mentor.com ; Tue, 14 Nov 2017 06:01:36 -0800 Received: from [172.30.88.65] (147.34.91.1) by SVR-ORW-MBX-04.mgc.mentorg.com (147.34.90.204) with Microsoft SMTP Server (TLS) id 15.0.1320.4; Tue, 14 Nov 2017 06:01:33 -0800 Subject: Re: [PATCH] Modify Aarch64 prologue analyzer to accept 128-bit registers To: Andrew Pinski CC: "gdb-patches@sourceware.org" References: <1816677702.1219332.1510594086497.ref@mail.yahoo.com> <1816677702.1219332.1510594086497@mail.yahoo.com> From: Paul Carroll Message-ID: Date: Tue, 14 Nov 2017 14:01:00 -0000 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: SVR-ORW-MBX-06.mgc.mentorg.com (147.34.90.206) To SVR-ORW-MBX-04.mgc.mentorg.com (147.34.90.204) X-SW-Source: 2017-11/txt/msg00251.txt.bz2 (Sending again, due to problems with the mailing list not liking my previous post) On 11/13/2017 12:32 PM, Andrew Pinski wrote: > Hmm, The normal elf aarch64 ABI says only 64bits is saved. Is there > another ABI which says 128bits of the SIMD register is saved? Thanks for the comment, Andrew. In this case, the code in question is an interrupt routine. As such, it is not following the ABI, except when making calls itself. When gdb processes the start of the interrupt routine, it finds the 'stp' with the 128-bit register references and asserts. That is a problem for debugging embedded applications, and is what this patch is trying to avoid.