Re: [PATCH v2] RISC-V: support for vector register accesses via ptrace() in RISC-V Linux native

Greg Savin via Gdb-patches
2023-08-11T16:41:45Z

> Based on some of the other emails, I guess kernel support for some of
> this is still WIP, so I guess there's not "easy" way to test this? Does
> QEMU have vector support yet?
>
> I've used a QEMU build that models RISC-V vectors, and tried out this GDB
patch interactively (mostly via "info reg vector" but also accesses through
dollar sign syntax with specific register values, reading and writing).
Though the QEMU I use for that is from a non-upstream fork, and I'm not
sure if upstream QEMU has all the capabilities for running RISCV-V vector
configurations yet. I'll ask the people who provided the QEMU build I've
been using.

Thanks Andrew, I'll take a closer look at your other review comments on
this.

--Greg