From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 45312 invoked by alias); 12 Jun 2017 20:23:30 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 45295 invoked by uid 89); 12 Jun 2017 20:23:30 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.1 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_NONE,SPF_PASS,T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=III X-HELO: mailapp01.imgtec.com Received: from mailapp01.imgtec.com (HELO mailapp01.imgtec.com) (195.59.15.196) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 12 Jun 2017 20:23:29 +0000 Received: from HHMAIL01.hh.imgtec.org (unknown [10.100.10.19]) by Forcepoint Email with ESMTPS id EDE3DFCFE252D; Mon, 12 Jun 2017 21:23:26 +0100 (IST) Received: from [10.20.78.196] (10.20.78.196) by HHMAIL01.hh.imgtec.org (10.100.10.21) with Microsoft SMTP Server id 14.3.294.0; Mon, 12 Jun 2017 21:23:30 +0100 Date: Mon, 12 Jun 2017 20:23:00 -0000 From: "Maciej W. Rozycki" To: John Baldwin CC: Subject: Re: [PATCH] Look for FIR in the last FreeBSD/mips floating-point register. In-Reply-To: <1648023.dfXdf8hDrr@ralph.baldwin.cx> Message-ID: References: <20170531165803.50633-1-jhb@FreeBSD.org> <1648023.dfXdf8hDrr@ralph.baldwin.cx> User-Agent: Alpine 2.00 (DEB 1167 2008-08-23) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" X-SW-Source: 2017-06/txt/msg00356.txt.bz2 On Mon, 12 Jun 2017, John Baldwin wrote: > > Well, CP1.FIR is generally expected to hold non zero; in particular in > > legacy MIPS processors (before CP0.Config1.FP was defined) checking for a > > non-zero value in CP1.FIR (bits 15:8 specifically) was the recommended way > > to detect the presence of FPU hardware[1]. And from MIPSr1 on there have > > to be floating-point formats supported reported in CP1.FIR, with D and S > > being mandatory, so you'll see non-zero bits at least in their positions > > (the W bit was only added with MIPSr2). > > Ah, I had been going off of my (probably stale) copy of See Mips Run which > only talks about comparing FIR with 0. FreeBSD requires MIPSr3, so it should > always see a non-zero FIR then. FAOD MIPSr3 (as in MIPS32r3/MIPS64r3) or MIPS III? I'm asking as I find it odd for anything to require MIPSr3 and not to handle MIPSr2 given that the main difference between the two is microMIPS and 2008-NaN support, both optional. Maciej