Re: [PATCH] Recognize branch instruction on MIPS in gdb.trace/entry-values.exp

Yao Qi
2015-01-04T08:42:21Z

"Maciej W. Rozycki" <macro@codesourcery.com> writes:

>> I'll update the pattern to {jalrc|(?:jal|bal)[^\r\n]+\r\n}
>
> I think {jalrc|[jb]al[^\r\n]+\r\n} will be a little bit more efficient,
> but please make sure too that the right-hand side branch does not swallow
> `jalrc' with its following instruction by greedy matching:
>
> "An RE consisting of two or more branches connected by the | operator
> prefers longest match."
>
> (from the TCL Reference Manual) -- so I think you'll have to modify your
> regexp further yet.

OK, I'll update the pattern to avoid this...

>
>> >> All tests in entry-values.exp are PASS.
>> >
>> > Which target and ABI(s) did you ran your testing on? Please try at least
>> > these: o32/MIPS, o32/MIPS16, o32/microMIPS, n64 on a Linux and a
>> > bare-metal target each; testing o32/MIPS16 with the `-mflip-mips16' GCC
>> > option too will be appreciated. These combinations should trigger some
>> > (although not all) of the other possible instructions.
>>
>> To avoid of misunderstanding, let me map them to the following concrete gcc
>> options (I don't find -mabi=o32 nor -mabi=n64 in
>> https://gcc.gnu.org/onlinedocs/gcc/MIPS-Options.html),
>>
>> -mabi=32
>> -mabi=32 -mips16
>> -mabi=32 -mips16 -mflip-mips16
>> -mabi=32 -mmicromips
>> -mabi=64 on both linux and bare-metal target
>>
>> are they what you want?
>
> Yes, except I meant both Linux and bare-metal across all the variations,
> not n64 only (missing comma after `n64' in my original sentence). Here
> n64 matters as it covers PIC calling sequences.

I did the tests with the following options on both bare metal and linux targets,

-mabi=64
-mabi=32
-mabi=32 -mips16
-mabi=32 -mmicromips

and test this on bare metal target only,

-mabi=32 -mips16 -mflip-mips16

instructions bal jal jals and jalx are generated in these combinations.

--
Yao (齐尧)

gdb/testsuite:

2015-01-04 Yao Qi <yao@codesourcery.com>

* gdb.trace/entry-values.exp: Set call_insn for MIPS target.
---
gdb/testsuite/gdb.trace/entry-values.exp | 13 +++++++++++++
1 file changed, 13 insertions(+)

diff --git a/gdb/testsuite/gdb.trace/entry-values.exp b/gdb/testsuite/gdb.trace/entry-values.exp
index 6bb0514..50e9636 100644
--- a/gdb/testsuite/gdb.trace/entry-values.exp
+++ b/gdb/testsuite/gdb.trace/entry-values.exp
@@ -43,6 +43,19 @@ if { [istarget "arm*-*-*"] || [istarget "aarch64*-*-*"] } {
set call_insn "brasl"
} elseif { [istarget "powerpc*-*-*"] } {
set call_insn "bl"
+} elseif { [istarget "mips*-*-*"] } {
+ # Skip the delay slot after jump or branch instruction if it has.
+ #
+ # JUMP (or BRANCH) foo
+ # insn1
+ # insn2
+ #
+ # All the jump or branch instructions except jalrc (jal, jals, jalx,
+ # jalr, jalrs, bal, bals) have the delay slot, so program goes to
+ # insn2 when it returns from foo. If it is jalrc, set
+ # RETURNED_FROM_FOO to insn1, otherwise set RETURNED_FROM_FOO to
+ # insn2.
+ set call_insn {jalrc|[jb]al[sxr]*[ \t][^\r\n]+\r\n}
} else {
set call_insn "call"
}
--
1.9.3