From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 7022 invoked by alias); 26 Apr 2012 19:04:03 -0000 Received: (qmail 7009 invoked by uid 22791); 26 Apr 2012 19:04:02 -0000 X-SWARE-Spam-Status: No, hits=-3.4 required=5.0 tests=AWL,BAYES_00,KAM_STOCKGEN,KHOP_RCVD_UNTRUST,KHOP_THREADED,RCVD_IN_HOSTKARMA_W,RCVD_IN_HOSTKARMA_WL X-Spam-Check-By: sourceware.org Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 26 Apr 2012 19:03:48 +0000 Received: from svr-orw-fem-01.mgc.mentorg.com ([147.34.98.93]) by relay1.mentorg.com with esmtp id 1SNTyl-00064W-Al from Maciej_Rozycki@mentor.com ; Thu, 26 Apr 2012 12:03:47 -0700 Received: from SVR-IES-FEM-01.mgc.mentorg.com ([137.202.0.104]) by svr-orw-fem-01.mgc.mentorg.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Thu, 26 Apr 2012 12:03:46 -0700 Received: from [172.30.0.84] (137.202.0.76) by SVR-IES-FEM-01.mgc.mentorg.com (137.202.0.104) with Microsoft SMTP Server id 14.1.289.1; Thu, 26 Apr 2012 20:03:44 +0100 Date: Thu, 26 Apr 2012 19:04:00 -0000 From: "Maciej W. Rozycki" To: Jan Kratochvil CC: Subject: Re: [PATCH] microMIPS support In-Reply-To: <20120426183713.GA21029@host2.jankratochvil.net> Message-ID: References: <20120426183713.GA21029@host2.jankratochvil.net> User-Agent: Alpine 1.10 (DEB 962 2008-03-14) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2012-04/txt/msg00955.txt.bz2 Hi Jan, > sure I have seen no MIPS arch bugs... Yeah... > > +/* For backwards compatibility we default to MIPS16. This flag is > > + overridden as soon as unambiguous ELF file flags tell us the > > + compressed ISA encoding used. */ > > +static const char mips_compression_mips16[] = "mips16"; > > +static const char mips_compression_micromips[] = "micromips"; > > +static const char *mips_compression_strings[] = { > > nitpick, be more readonly: > > static const char *const mips_compression_strings[] = { Hmm, no objection to your suggestion per se, but is it allowed by C89? > > + mips_compression_mips16, > > + mips_compression_micromips, > > + NULL > > +}; > [...] > > +/* Return one iff MSYM refers to standard ISA code. */ > > + > > static int > > -msymbol_is_special (struct minimal_symbol *msym) > > +msymbol_is_mips (struct minimal_symbol *msym) > > +{ > > + return !(MSYMBOL_TARGET_FLAG_1 (msym) | MSYMBOL_TARGET_FLAG_2 (msym)); > > (a) | -> || > (b) I have found here it is best to expand logical expressions for the patch > readers, despite author may see it more logical with the parentheses. > > return !MSYMBOL_TARGET_FLAG_1 (msym) && !MSYMBOL_TARGET_FLAG_2 (msym); Bitwise OR usually produces better code that has fewer branches (though hosts that support conditional move instructions may limit the impact here a bit), here's no harm to evaluate both sides of the expression in all cases. > > @@ -686,8 +779,8 @@ mips_ax_pseudo_register_push_stack (stru > > return 0; > > } > > > > -/* Table to translate MIPS16 register field to actual register number. */ > > -static int mips16_to_32_reg[8] = { 16, 17, 2, 3, 4, 5, 6, 7 }; > > +/* Table to translate 3-bit register field to actual register number. */ > > +static int mips_reg3_to_reg[8] = { 16, 17, 2, 3, 4, 5, 6, 7 }; > > It can be const. One change at a time. This lookup can also be transformed into a simple three-assembly-instruction calculation, but it's called in enough places that I think it's cheaper in the current form. But for this to stand this table should also be of the "unsigned char" type. Thanks for your notes. Maciej