From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 3724 invoked by alias); 11 Nov 2011 18:59:38 -0000 Received: (qmail 3711 invoked by uid 22791); 11 Nov 2011 18:59:36 -0000 X-SWARE-Spam-Status: No, hits=-1.3 required=5.0 tests=AWL,BAYES_00 X-Spam-Check-By: sourceware.org Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 11 Nov 2011 18:59:22 +0000 Received: from svr-orw-exc-10.mgc.mentorg.com ([147.34.98.58]) by relay1.mentorg.com with esmtp id 1ROwJt-0002Xx-KM from Maciej_Rozycki@mentor.com ; Fri, 11 Nov 2011 10:59:21 -0800 Received: from SVR-IES-FEM-01.mgc.mentorg.com ([137.202.0.104]) by SVR-ORW-EXC-10.mgc.mentorg.com with Microsoft SMTPSVC(6.0.3790.4675); Fri, 11 Nov 2011 10:57:20 -0800 Received: from [172.30.4.244] (137.202.0.76) by SVR-IES-FEM-01.mgc.mentorg.com (137.202.0.104) with Microsoft SMTP Server id 14.1.289.1; Fri, 11 Nov 2011 18:59:19 +0000 Date: Fri, 11 Nov 2011 18:59:00 -0000 From: "Maciej W. Rozycki" To: Joel Brobecker CC: Doug Evans , Subject: Re: [PATCH] testsuite: Add (extensive) hardware breakpoint testing In-Reply-To: <20111111174247.GF5390@adacore.com> Message-ID: References: <20111111174247.GF5390@adacore.com> User-Agent: Alpine 1.10 (DEB 962 2008-03-14) MIME-Version: 1.0 Content-Type: text/plain; charset="ISO-8859-15" Content-Transfer-Encoding: 8BIT Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2011-11/txt/msg00326.txt.bz2 On Fri, 11 Nov 2011, Joel Brobecker wrote: > > >  The consistency of failures between i686-linux-gnu and i686-mingw makes > > > me fairly sure that's a bug in x86 support in GDB of some sort rather than > > > a problem with my setup -- is that a known bug? > > > > OOC, have you tried amd64-linux? I have now, and the result is the same -- breakpoints silently missed. > > {i386,amd64}-linux are important enough targets that I think this > > should be fixed for 7.4. Joel? > > I think we should look at the context as well before making a decision: > - Is that a regression? If it's been like that in previous versions, > then maybe it's OK for it to fail for another version... > - Are hardware breakpoints used much? Probably by the people who > debug programs in ROM(/flash?). Plus self-modifying code -- although I agree that hardware execution breakpoints are less needed with hosted systems than on bare-iron targets. > We should probably try to investigate the problem quickly and determine > the extent of the problem. If we think we should fix that for 7.4, and > someone is willing to take responsibility for it, then let's make it > a high priority item on our list, and not release 7.4 without the fix. Well, OOC I looked at the relevant source and the bug (and consequently the fix) is quite obvious -- the debug registers are only actually pushed down to hardware on data breakpoints and not execution breakpoints. I'm getting: # of expected passes 69 # of unexpected failures 2 now on x86_64-linux-gnu. The two failures are some matching problems with my hbreak2.exp -- I'll investigate and fix that up. OK to apply? 2011-11-11 Maciej W. Rozycki gdb/ * i386-nat.c (i386_insert_hw_breakpoint): Call i386_update_inferior_debug_regs. (i386_remove_hw_breakpoint): Likewise. Maciej gdb-i386-hbreak.diff Index: gdb-fsf-trunk-quilt/gdb/i386-nat.c =================================================================== --- gdb-fsf-trunk-quilt.orig/gdb/i386-nat.c 2011-11-07 13:42:30.000000000 +0000 +++ gdb-fsf-trunk-quilt/gdb/i386-nat.c 2011-11-11 18:47:40.555635587 +0000 @@ -684,9 +684,15 @@ i386_insert_hw_breakpoint (struct gdbarc { unsigned len_rw = i386_length_and_rw_bits (1, hw_execute); CORE_ADDR addr = bp_tgt->placed_address; - int retval = i386_insert_aligned_watchpoint (&dr_mirror, + /* Work on a local copy of the debug registers, and on success, + commit the change back to the inferior. */ + struct i386_debug_reg_state local_state = dr_mirror; + int retval = i386_insert_aligned_watchpoint (&local_state, addr, len_rw) ? EBUSY : 0; + if (retval == 0) + i386_update_inferior_debug_regs (&local_state); + if (maint_show_dr) i386_show_dr (&dr_mirror, "insert_hwbp", addr, 1, hw_execute); @@ -702,9 +708,15 @@ i386_remove_hw_breakpoint (struct gdbarc { unsigned len_rw = i386_length_and_rw_bits (1, hw_execute); CORE_ADDR addr = bp_tgt->placed_address; - int retval = i386_remove_aligned_watchpoint (&dr_mirror, + /* Work on a local copy of the debug registers, and on success, + commit the change back to the inferior. */ + struct i386_debug_reg_state local_state = dr_mirror; + int retval = i386_remove_aligned_watchpoint (&local_state, addr, len_rw); + if (retval == 0) + i386_update_inferior_debug_regs (&local_state); + if (maint_show_dr) i386_show_dr (&dr_mirror, "remove_hwbp", addr, 1, hw_execute);