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Tue, 07 Jul 2026 10:53:45 -0700 (PDT) X-Received: by 2002:a17:902:ce92:b0:2cc:10c1:352e with SMTP id d9443c01a7336-2cccadba20cmr36076135ad.21.1783446824911; Tue, 07 Jul 2026 10:53:44 -0700 (PDT) Received: from [150.1.200.157] ([172.56.105.224]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ccc9d5bdddsm15762355ad.77.2026.07.07.10.53.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 07 Jul 2026 10:53:44 -0700 (PDT) Message-ID: Date: Tue, 7 Jul 2026 10:53:43 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] gdb, gdbserver: Add Intel APX register support To: "Schimpe, Christina" , "gdb-patches@sourceware.org" , Simon Marchi Cc: "hjl.tools@gmail.com" References: <20260602111122.3187712-1-christina.schimpe@intel.com> <20260602111122.3187712-3-christina.schimpe@intel.com> <5aff4c66-5d14-4e0c-ac43-1ac4af9babf4@redhat.com> From: Keith Seitz In-Reply-To: X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: dyr8WTgoOsOEXc7oN5gRrIdfCjo74f9EMfoJOWwQhto_1783446825 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces~public-inbox=simark.ca@sourceware.org On 7/7/26 10:15 AM, Schimpe, Christina wrote: >> -----Original Message----- >> From: Keith Seitz >> >> I have a (probably naive) question about 'apx_layout' in the various >> supported configurations. As patched, this member is set when XCR0 has a bit >> set for PKRU or AVX512 support. Does this mean that EGPR reads from core >> files with only "plain" AVX support will be incorrect (at offest 0 instead of >> 960)? AFAICT, the set of features described by XCR0 are independent of each >> other, e.g., having PKRU does not mean that APX is enabled/supported. > > Yes, in theory every xsave feature is totally independent from each other. > > However, our assumption for known Intel CPUs is that apx is possible > - with amx (this case is only implemented for gdb-oneapi, since amx is not yet merged upstream) > - with pkru (without amx) > - with avx512 (without pkru, amx) > >> This may be a paper-only issue, but perhaps a little defensive programming >> might be in order? > > This function should be replaced one day with a proper solution. > > See > "The long term solution is to pull the CPUID info from gdbserver in the form of NT_X86_CPUID, but in the short term we could just always use the Intel layout that GDB assumed before the XSAVE series. That is, we could pick a default layout based on the XCR0 mask that corresponds to one of the known sizes and use that to set both the layout and size. I'll see if I can't come up with a variant of that today or tomorrow." > https://sourceware.org/bugzilla/show_bug.cgi?id=30912 > > I believe for now we must live with that heuristic. Adding @Simon Marchi to confirm. > Ah, thank you for pointing me to previous context. I did not remember any of that. In which case, I don't have further concerns with the patch with the previous problems addressed. Thanks! Keith