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Tue, 06 May 2025 22:52:29 -0700 (PDT) Received: from ghost ([2601:647:6700:64d0:cb4f:7757:45cd:4e69]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-74058d7ad6csm10572079b3a.17.2025.05.06.22.52.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 May 2025 22:52:28 -0700 (PDT) Date: Tue, 6 May 2025 22:52:26 -0700 From: Charlie Jenkins To: Sameer Natu Cc: gdb-patches@sourceware.org, Greg Savin Subject: Re: [PATCH v4] RISC-V: support for vector register accesses via ptrace() in RISC-V Linux native Message-ID: References: <20250506123711.2243088-2-snatu@whileone.in> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250506123711.2243088-2-snatu@whileone.in> X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces~public-inbox=simark.ca@sourceware.org On Tue, May 06, 2025 at 12:37:09PM +0000, Sameer Natu wrote: > From: Sameer Natu > > A v4 re-spin of the original patch. Tested with latest kernel 6.14.2 on RISCV QEMU. > Removed Magic Numbers from v2 patch and worked on review comments of v2 patch. I should have left this on earlier versions of this patch, but this commit message isn't very useful. The commit message should contain what the patch does (add vector registers and CSRs), while meta-data like this would be more useful as a cover letter or as a note. You can leave this as a note to this patch by placing this text under the "---". The version numbers got messed up too, I believe this is v5, there were 2 v3s. > > Co-Authored-By: Greg Savin > --- Place the note here and add another "---" after: --- > gdb/arch/riscv.c | 180 ++++++++++++++++++++++++++++++++++- > gdb/nat/riscv-linux-tdesc.c | 68 +++++++++++++ > gdb/nat/riscv-linux-tdesc.h | 24 +++++ > gdb/riscv-linux-nat.c | 162 +++++++++++++++++++++++++++++++ > gdb/riscv-linux-tdep.c | 133 ++++++++++++++++++++++++++ > gdb/riscv-tdep.c | 49 +++++++++- > gdb/riscv-tdep.h | 6 ++ > gdbserver/linux-riscv-low.cc | 110 +++++++++++++++++++++ > include/elf/common.h | 1 + > 9 files changed, 726 insertions(+), 7 deletions(-) > > diff --git a/gdb/arch/riscv.c b/gdb/arch/riscv.c > index a6188ea3a8c..f1f5d83d60a 100644 > --- a/gdb/arch/riscv.c > +++ b/gdb/arch/riscv.c > @@ -25,12 +25,30 @@ > #include "../features/riscv/64bit-fpu.c" > #include "../features/riscv/rv32e-xregs.c" > > +#include "opcode/riscv-opc.h" > + > #ifndef GDBSERVER > #define STATIC_IN_GDB static > #else > #define STATIC_IN_GDB > #endif > > +#ifdef GDBSERVER > +/* Work around issue where trying to include riscv-tdep.h (to get access to canonical RISCV_V0_REGNUM declaration > + from that header) is problamtic for gdbserver build. */ > +#define RISCV_V0_REGNUM 4162 All of the uses of RISCV_V0_REGNUM in this file have been removed. This definition along with this whole ifdef block can be removed. Please remove this block. When you send the next version you can also append my reviewed and testing tags after the co-authored-by tag since these changes are small. Reviewed-by: Charlie Jenkins Tested-by: Charlie Jenkins - Charlie