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[109.154.20.215]) by smtp.gmail.com with ESMTPSA id q16sm2868683wrn.13.2020.12.02.09.39.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Dec 2020 09:39:44 -0800 (PST) From: Andrew Burgess To: binutils@sourceware.org, gdb-patches@sourceware.org Subject: [PATCH 7/8] gdb/riscv: make riscv target description names global Date: Wed, 2 Dec 2020 17:39:31 +0000 Message-Id: X-Mailer: git-send-email 2.25.4 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces@sourceware.org Sender: "Gdb-patches" A later commit will need the names of the RISC-V target description features in files other than riscv-tdep.c. This commit just makes the names global strings that can be accessed from other riscv-*.c files. There should be no user visible changes after this commit. gdb/ChangeLog: * riscv-tdep.c (riscv_feature_name_csr): Define. (riscv_feature_name_cpu): Define. (riscv_feature_name_fpu): Define. (riscv_feature_name_virtual): Define. (riscv_xreg_feature): Use riscv_feature_name_cpu. (riscv_freg_feature): Use riscv_feature_name_fpu. (riscv_virtual_feature): Use riscv_feature_name_virtual. (riscv_csr_feature): Use riscv_feature_name_csr. * riscv-tdep.h (riscv_feature_name_csr): Declare. --- gdb/ChangeLog | 12 ++++++++++++ gdb/riscv-tdep.c | 14 ++++++++++---- gdb/riscv-tdep.h | 3 +++ 3 files changed, 25 insertions(+), 4 deletions(-) diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c index a428f79940d..eb2ccb42d5e 100644 --- a/gdb/riscv-tdep.c +++ b/gdb/riscv-tdep.c @@ -74,6 +74,12 @@ static inline bool is_ ## INSN_NAME ## _insn (long insn) \ #include "opcode/riscv-opc.h" #undef DECLARE_INSN +/* The names of the RISC-V target description features. */ +const char *riscv_feature_name_csr = "org.gnu.gdb.riscv.csr"; +static const char *riscv_feature_name_cpu = "org.gnu.gdb.riscv.cpu"; +static const char *riscv_feature_name_fpu = "org.gnu.gdb.riscv.fpu"; +static const char *riscv_feature_name_virtual = "org.gnu.gdb.riscv.virtual"; + /* Cached information about a frame. */ struct riscv_unwind_cache @@ -252,7 +258,7 @@ riscv_register_feature::register_info::check static const struct riscv_register_feature riscv_xreg_feature = { - "org.gnu.gdb.riscv.cpu", true, + riscv_feature_name_cpu, true, { { RISCV_ZERO_REGNUM + 0, { "zero", "x0" }, RISCV_REG_REQUIRED }, { RISCV_ZERO_REGNUM + 1, { "ra", "x1" }, RISCV_REG_REQUIRED }, @@ -294,7 +300,7 @@ static const struct riscv_register_feature riscv_xreg_feature = static const struct riscv_register_feature riscv_freg_feature = { - "org.gnu.gdb.riscv.fpu", true, + riscv_feature_name_fpu, true, { { RISCV_FIRST_FP_REGNUM + 0, { "ft0", "f0" }, RISCV_REG_REQUIRED }, { RISCV_FIRST_FP_REGNUM + 1, { "ft1", "f1" }, RISCV_REG_REQUIRED }, @@ -344,7 +350,7 @@ static const struct riscv_register_feature riscv_freg_feature = static const struct riscv_register_feature riscv_virtual_feature = { - "org.gnu.gdb.riscv.virtual", false, + riscv_feature_name_virtual, false, { { RISCV_PRIV_REGNUM, { "priv" }, RISCV_REG_OPTIONAL } } @@ -356,7 +362,7 @@ static const struct riscv_register_feature riscv_virtual_feature = static struct riscv_register_feature riscv_csr_feature = { - "org.gnu.gdb.riscv.csr", false, + riscv_feature_name_csr, false, { #define DECLARE_CSR(NAME,VALUE,CLASS,DEFINE_VER,ABORT_VER) \ { RISCV_ ## VALUE ## _REGNUM, { # NAME }, RISCV_REG_OPTIONAL }, diff --git a/gdb/riscv-tdep.h b/gdb/riscv-tdep.h index 1064ced1192..fc8013cf417 100644 --- a/gdb/riscv-tdep.h +++ b/gdb/riscv-tdep.h @@ -155,4 +155,7 @@ extern void riscv_supply_regset (const struct regset *regset, struct regcache *regcache, int regnum, const void *regs, size_t len); +/* The names of the RISC-V target description features. */ +extern const char *riscv_feature_name_csr; + #endif /* RISCV_TDEP_H */ -- 2.25.4