From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id CGr2APRbFGMs+zIAWB0awg (envelope-from ) for ; Sun, 04 Sep 2022 04:04:04 -0400 Received: by simark.ca (Postfix, from userid 112) id 016451E4A7; Sun, 4 Sep 2022 04:04:04 -0400 (EDT) Authentication-Results: simark.ca; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.a=rsa-sha256 header.s=default header.b=ZKGm2DIJ; dkim-atps=neutral X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on simark.ca X-Spam-Level: X-Spam-Status: No, score=-3.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id A7FA11E13B for ; Sun, 4 Sep 2022 04:04:03 -0400 (EDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 3CC163857832 for ; Sun, 4 Sep 2022 08:04:03 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 3CC163857832 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1662278643; bh=hHkI4mVqd3xRq4prFHCd81Ficot4OnqDBcJvvxHFMa0=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=ZKGm2DIJLzCWJmrlYpVEtdLKwCuj5NNg7JfHZuLSLB801TaeMZTTNYQDlNpJsdM7N dYnoAJvZzttsEx7xKD9CJXQgPZ8IrAT4fk25+pMNf3AHQbXfITJV4Uc2GZBO+L0rHI AOSLjmkMjwb9E1qKkMN7BQpoE3BUbzphLx1gyFVo= Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 17BEE3857C4B; Sun, 4 Sep 2022 08:03:43 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 17BEE3857C4B Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 6F12B300089; Sun, 4 Sep 2022 08:03:41 +0000 (UTC) To: Tsukasa OI , Nick Clifton , Andrew Burgess Subject: [PATCH v2 1/2] opcodes: Add non-enum disassembler options Date: Sun, 4 Sep 2022 08:03:19 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Tsukasa OI via Gdb-patches Reply-To: Tsukasa OI Cc: binutils@sourceware.org, gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+public-inbox=simark.ca@sourceware.org Sender: "Gdb-patches" This is paired with "gdb: Add non-enum disassembler options". There is a portable mechanism for disassembler options and used on some architectures: - ARC - Arm - MIPS - PowerPC - RISC-V - S/390 However, it only supports following forms: - [NAME] - [NAME]=[ENUM_VALUE] Valid values for [ENUM_VALUE] must be predefined in disasm_option_arg_t.values. For instance, for -M cpu=[CPU] in ARC architecture, opcodes/arc-dis.c builds valid CPU model list from include/elf/arc-cpu.def. In this commit, it adds following format: - [NAME]=[ARBITRARY_VALUE] (cannot contain "," though) This is identified by NULL value of disasm_option_arg_t.values (normally, this is a non-NULL pointer to a NULL-terminated list). include/ChangeLog: * dis-asm.h (disasm_option_arg_t): Update comment of values to allow non-enum disassembler options. opcodes/ChangeLog: * riscv-dis.c (print_riscv_disassembler_options): Support non-enum disassembler options on printing disassembler help. * arc-dis.c (print_arc_disassembler_options): Likewise. * mips-dis.c (print_mips_disassembler_options): Likewise. --- include/dis-asm.h | 3 ++- opcodes/arc-dis.c | 2 ++ opcodes/mips-dis.c | 2 ++ opcodes/riscv-dis.c | 2 ++ 4 files changed, 8 insertions(+), 1 deletion(-) diff --git a/include/dis-asm.h b/include/dis-asm.h index f1a83dc84e5..4921c040710 100644 --- a/include/dis-asm.h +++ b/include/dis-asm.h @@ -318,7 +318,8 @@ typedef struct /* Option argument name to use in descriptions. */ const char *name; - /* Vector of acceptable option argument values, NULL-terminated. */ + /* Vector of acceptable option argument values, NULL-terminated. + NULL if any values are accepted. */ const char **values; } disasm_option_arg_t; diff --git a/opcodes/arc-dis.c b/opcodes/arc-dis.c index 3490bad4f66..c8dc525f64d 100644 --- a/opcodes/arc-dis.c +++ b/opcodes/arc-dis.c @@ -1611,6 +1611,8 @@ print_arc_disassembler_options (FILE *stream) for (i = 0; args[i].name != NULL; ++i) { size_t len = 3; + if (args[i].values == NULL) + continue; fprintf (stream, _("\n\ For the options above, the following values are supported for \"%s\":\n "), args[i].name); diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index 9db604ffb39..faeebccfc3b 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -2809,6 +2809,8 @@ with the -M switch (multiple options should be separated by commas):\n\n")); for (i = 0; args[i].name != NULL; i++) { + if (args[i].values == NULL) + continue; fprintf (stream, _("\n\ For the options above, the following values are supported for \"%s\":\n "), args[i].name); diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c index 160cc40f865..7ae6e709290 100644 --- a/opcodes/riscv-dis.c +++ b/opcodes/riscv-dis.c @@ -1195,6 +1195,8 @@ with the -M switch (multiple options should be separated by commas):\n")); for (i = 0; args[i].name != NULL; i++) { + if (args[i].values == NULL) + continue; fprintf (stream, _("\n\ For the options above, the following values are supported for \"%s\":\n "), args[i].name); -- 2.34.1