From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id idMPKfs6pWASPgAAWB0awg (envelope-from ) for ; Wed, 19 May 2021 12:21:15 -0400 Received: by simark.ca (Postfix, from userid 112) id 968121F11C; Wed, 19 May 2021 12:21:15 -0400 (EDT) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on simark.ca X-Spam-Level: X-Spam-Status: No, score=-1.1 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,MAILING_LIST_MULTI,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id 741531E54D for ; Wed, 19 May 2021 12:21:14 -0400 (EDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 94086393F875; Wed, 19 May 2021 16:21:13 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 94086393F875 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1621441273; bh=EwF/O2GsXcmr2jveuOXEhNH6zQGUW/CHIp9LzGluN6s=; h=Date:To:Subject:In-Reply-To:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:Cc:From; b=BHPVtvGboTQ8MC8SJkPppooCjaQ7+OcVdO0VX1bGA+khwR1SwFmqkUnKs2ZnxApNM jjyV+vUEYuRSm+2P3ix3S0bpC2PIdZuhV3T1Jg/WHk1ZIxwjhVuweLKUS7CGNyVfxH SPx1JhCjh6l4r5PpyD8ij+qeDyaZ1Crael7ni+bU= Received: from smtp.gentoo.org (mail.gentoo.org [IPv6:2001:470:ea4a:1:5054:ff:fec7:86e4]) by sourceware.org (Postfix) with ESMTP id 46CDE386FC00; Wed, 19 May 2021 16:21:09 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 46CDE386FC00 Received: from vapier (localhost [127.0.0.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.gentoo.org (Postfix) with ESMTPS id 521C7335D3D; Wed, 19 May 2021 16:21:08 +0000 (UTC) Date: Wed, 19 May 2021 12:21:07 -0400 To: binutils@sourceware.org Subject: [PATCH] opcodes: cris: move desc & opc files from sim/ Message-ID: Mail-Followup-To: binutils@sourceware.org, gdb-patches@sourceware.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20210519015635.16132-1-vapier@gentoo.org> X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Mike Frysinger via Gdb-patches Reply-To: Mike Frysinger Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces@sourceware.org Sender: "Gdb-patches" All other cgen ports keep their desc & opc files under opcodes/, so move the cris files over too. The cris-opc.c file is already here. --- opcodes/Makefile.am | 14 +++++++++++++- opcodes/Makefile.in | 15 ++++++++++++++- {sim/cris => opcodes}/cris-desc.c | 0 {sim/cris => opcodes}/cris-desc.h | 0 {sim/cris => opcodes}/cris-opc.h | 0 sim/cris/Makefile.in | 16 ++++------------ 6 files changed, 31 insertions(+), 14 deletions(-) rename {sim/cris => opcodes}/cris-desc.c (100%) rename {sim/cris => opcodes}/cris-desc.h (100%) rename {sim/cris => opcodes}/cris-opc.h (100%) diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am index 04980f36b113..2d6c6b8c1e93 100644 --- a/opcodes/Makefile.am +++ b/opcodes/Makefile.am @@ -60,6 +60,7 @@ BUILD_LIB_DEPS = @BUILD_LIB_DEPS@ HFILES = \ aarch64-asm.h aarch64-dis.h aarch64-opc.h aarch64-tbl.h \ bpf-desc.h bpf-opc.h \ + cris-desc.h cris-opc.h \ epiphany-desc.h epiphany-opc.h \ fr30-desc.h fr30-opc.h \ frv-desc.h frv-opc.h \ @@ -108,6 +109,7 @@ TARGET_LIBOPCODES_CFILES = \ cgen-opc.c \ cr16-dis.c \ cr16-opc.c \ + cris-desc.c \ cris-dis.c \ cris-opc.c \ crx-dis.c \ @@ -371,10 +373,11 @@ CGENDEPS = \ $(CGENDIR)/opc-opinst.scm \ cgen-asm.in cgen-dis.in cgen-ibld.in -CGEN_CPUS = epiphany fr30 frv ip2k iq2000 lm32 m32c m32r mep mt or1k xc16x xstormy16 +CGEN_CPUS = cris epiphany fr30 frv ip2k iq2000 lm32 m32c m32r mep mt or1k xc16x xstormy16 if CGEN_MAINT BPF_DEPS = stamp-bpf +CRIS_DEPS = stamp-cris EPIPHANY_DEPS = stamp-epiphany FR30_DEPS = stamp-fr30 FRV_DEPS = stamp-frv @@ -390,6 +393,7 @@ XC16X_DEPS = stamp-xc16x XSTORMY16_DEPS = stamp-xstormy16 else BPF_DEPS = +CRIS_DEPS = EPIPHANY_DEPS = FR30_DEPS = FRV_DEPS = @@ -431,6 +435,14 @@ stamp-bpf: $(CGENDEPS) $(CPUDIR)/bpf.cpu $(CPUDIR)/bpf.opc $(MAKE) run-cgen arch=bpf prefix=bpf \ archfile=$(CPUDIR)/bpf.cpu opcfile=$(CPUDIR)/bpf.opc +$(srcdir)/cris-desc.h $(srcdir)/cris-desc.c $(srcdir)/cris-opc.h \ + $(srcdir)/cris-opc.c $(srcdir)/cris-dis.c: $(CRIS_DEPS) + @true + +stamp-cris: $(CGENDEPS) $(CPUDIR)/cris.cpu + $(MAKE) run-cgen arch=cris prefix=cris \ + archfile=$(CPUDIR)/cris.cpu + $(srcdir)/epiphany-desc.h $(srcdir)/epiphany-desc.c $(srcdir)/epiphany-opc.h \ $(srcdir)/epiphany-opc.c $(srcdir)/epiphany-ibld.c \ $(srcdir)/epiphany-opinst.c $(srcdir)/epiphany-asm.c \ diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in index b2965ba70cd0..1a51190c1ab5 100644 --- a/opcodes/Makefile.in +++ b/opcodes/Makefile.in @@ -450,6 +450,7 @@ BFD_H = ../bfd/bfd.h HFILES = \ aarch64-asm.h aarch64-dis.h aarch64-opc.h aarch64-tbl.h \ bpf-desc.h bpf-opc.h \ + cris-desc.h cris-opc.h \ epiphany-desc.h epiphany-opc.h \ fr30-desc.h fr30-opc.h \ frv-desc.h frv-opc.h \ @@ -499,6 +500,7 @@ TARGET_LIBOPCODES_CFILES = \ cgen-opc.c \ cr16-dis.c \ cr16-opc.c \ + cris-desc.c \ cris-dis.c \ cris-opc.c \ crx-dis.c \ @@ -729,9 +731,11 @@ CGENDEPS = \ $(CGENDIR)/opc-opinst.scm \ cgen-asm.in cgen-dis.in cgen-ibld.in -CGEN_CPUS = epiphany fr30 frv ip2k iq2000 lm32 m32c m32r mep mt or1k xc16x xstormy16 +CGEN_CPUS = cris epiphany fr30 frv ip2k iq2000 lm32 m32c m32r mep mt or1k xc16x xstormy16 @CGEN_MAINT_FALSE@BPF_DEPS = @CGEN_MAINT_TRUE@BPF_DEPS = stamp-bpf +@CGEN_MAINT_FALSE@CRIS_DEPS = +@CGEN_MAINT_TRUE@CRIS_DEPS = stamp-cris @CGEN_MAINT_FALSE@EPIPHANY_DEPS = @CGEN_MAINT_TRUE@EPIPHANY_DEPS = stamp-epiphany @CGEN_MAINT_FALSE@FR30_DEPS = @@ -915,6 +919,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cgen-opc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cr16-dis.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cr16-opc.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cris-desc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cris-dis.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cris-opc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/crx-dis.Plo@am__quote@ @@ -1417,6 +1422,14 @@ stamp-bpf: $(CGENDEPS) $(CPUDIR)/bpf.cpu $(CPUDIR)/bpf.opc $(MAKE) run-cgen arch=bpf prefix=bpf \ archfile=$(CPUDIR)/bpf.cpu opcfile=$(CPUDIR)/bpf.opc +$(srcdir)/cris-desc.h $(srcdir)/cris-desc.c $(srcdir)/cris-opc.h \ + $(srcdir)/cris-opc.c $(srcdir)/cris-dis.c: $(CRIS_DEPS) + @true + +stamp-cris: $(CGENDEPS) $(CPUDIR)/cris.cpu + $(MAKE) run-cgen arch=cris prefix=cris \ + archfile=$(CPUDIR)/cris.cpu + $(srcdir)/epiphany-desc.h $(srcdir)/epiphany-desc.c $(srcdir)/epiphany-opc.h \ $(srcdir)/epiphany-opc.c $(srcdir)/epiphany-ibld.c \ $(srcdir)/epiphany-opinst.c $(srcdir)/epiphany-asm.c \ diff --git a/sim/cris/cris-desc.c b/opcodes/cris-desc.c similarity index 100% rename from sim/cris/cris-desc.c rename to opcodes/cris-desc.c diff --git a/sim/cris/cris-desc.h b/opcodes/cris-desc.h similarity index 100% rename from sim/cris/cris-desc.h rename to opcodes/cris-desc.h diff --git a/sim/cris/cris-opc.h b/opcodes/cris-opc.h similarity index 100% rename from sim/cris/cris-opc.h rename to opcodes/cris-opc.h diff --git a/sim/cris/Makefile.in b/sim/cris/Makefile.in index 3dcdbb2da022..d5e8a88f3a8a 100644 --- a/sim/cris/Makefile.in +++ b/sim/cris/Makefile.in @@ -29,14 +29,13 @@ SIM_OBJS = \ sim-if.o arch.o \ $(CRISV10F_OBJS) \ $(CRISV32F_OBJS) \ - traps.o \ - cris-desc.o + traps.o # Extra headers included by sim-main.h. # FIXME: $(srccom)/cgen-ops.h should be in CGEN_INCLUDE_DEPS. SIM_EXTRA_DEPS = \ $(CGEN_INCLUDE_DEPS) $(srccom)/cgen-ops.h \ - arch.h cpuall.h cris-sim.h cris-desc.h engv10.h engv32.h + arch.h cpuall.h cris-sim.h engv10.h engv32.h SIM_EXTRA_CLEAN = cris-clean @@ -97,7 +96,7 @@ cris-clean: rm -f mloopv$${v}f.c engv$${v}.h stamp-v$${v}fmloop; \ rm -f stamp-v$${v}fcpu; \ done - -rm -f stamp-arch stamp-desc + -rm -f stamp-arch -rm -f tmp-* # cgen support, enable with --enable-cgen-maint @@ -106,7 +105,7 @@ CGEN_MAINT = ; @true @CGEN_MAINT@CGEN_MAINT = # Useful when making CGEN-generated files manually, without --enable-cgen-maint. -stamps: stamp-v10fmloop stamp-v32fmloop stamp-arch stamp-v10fcpu stamp-v32fcpu stamp-desc +stamps: stamp-v10fmloop stamp-v32fmloop stamp-arch stamp-v10fcpu stamp-v32fcpu stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/cris.cpu Makefile $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=crisv10,crisv32 \ @@ -135,10 +134,3 @@ stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cr mv decodev32.c.tmp $(srcdir)/decodev32.c touch stamp-v32fcpu cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h: $(CGEN_MAINT) stamp-v32fcpu - -stamp-desc: $(CGEN_READ_SCM) $(CGEN_DESC_SCM) $(CPU_DIR)/cris.cpu Makefile - $(MAKE) cgen-desc $(CGEN_FLAGS_TO_PASS) \ - archfile=$(CPU_DIR)/cris.cpu \ - cpu=cris mach=all - touch stamp-desc -cris-desc.c cris-desc.h cris-opc.h: $(CGEN_MAINT) stamp-desc -- 2.31.1 ----- End forwarded message -----