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Date: Sun, 18 Apr 2021 23:41:28 -0400
To: Jim Wilson <jimw@sifive.com>
Subject: Re: [PATCH 02/24] RISC-V sim: Fix for jalr.
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On 17 Apr 2021 10:58, Jim Wilson wrote:
> When rd and rs1 are the same reg, must read rs1 before writing rd.
> Jal is also fixed for consistency.

lgtm, thanks
-mike