From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id My+fHo+SpWhZwAcAWB0awg (envelope-from ) for ; Wed, 20 Aug 2025 05:17:03 -0400 Authentication-Results: simark.ca; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=n9wYhdkI; dkim-atps=neutral Received: by simark.ca (Postfix, from userid 112) id 6CBAE1E048; Wed, 20 Aug 2025 05:17:03 -0400 (EDT) X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-25) on simark.ca X-Spam-Level: X-Spam-Status: No, score=-3.4 required=5.0 tests=ARC_SIGNED,ARC_VALID,BAYES_00, DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED,RCVD_IN_VALIDITY_CERTIFIED_BLOCKED, RCVD_IN_VALIDITY_RPBL_BLOCKED,RCVD_IN_VALIDITY_SAFE_BLOCKED autolearn=ham autolearn_force=no version=4.0.1 Received: from server2.sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id C7EA81E048 for ; Wed, 20 Aug 2025 05:17:01 -0400 (EDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 710A8385DDCE for ; Wed, 20 Aug 2025 09:17:01 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 710A8385DDCE Authentication-Results: sourceware.org; dkim=pass (2048-bit key, unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=n9wYhdkI Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) by sourceware.org (Postfix) with ESMTPS id 89134385DC27 for ; Wed, 20 Aug 2025 09:16:26 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 89134385DC27 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 89134385DC27 Authentication-Results: server2.sourceware.org; arc=fail smtp.remote-ip=192.198.163.17 ARC-Seal: i=2; a=rsa-sha256; d=sourceware.org; s=key; t=1755681386; cv=fail; b=fSx2GyfQuEamS5J189PCLWWzYhjQrGpVESFUXCFropDbz55ddnMdXgeMywV1ON/7l0R2XZxc7QhAvvBsWyIjPfFLuQDDqxpzLVl4byQ/yOBW47155lm6trBWpYApxq/kEhgZlOuF6Nx9AlpxC3wYeQMWCUBpr+DvYuqdXMYZeqQ= ARC-Message-Signature: i=2; a=rsa-sha256; d=sourceware.org; s=key; t=1755681386; c=relaxed/simple; bh=bUOUCWM7jOwY/yRXSWUUQRRIbVoCb9VvjEYXuG+7WQc=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=RMkKIx32pWuLWNc+vjrVRyb+lrUWKvrXFAceFIxn9KIK9iOegwMz2WkcL9p7pFu69ocACvyXsj2QNK1HV4E/WLjctnPqo/XLFWQNMD1WqAEMfPwF6fO9zbs53V84TuiuulBoojxCq4/8Wyr+K4/PaHNJ0qUeANLUW+bJs0+znS8= ARC-Authentication-Results: i=2; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 89134385DC27 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1755681386; x=1787217386; h=from:to:cc:subject:date:message-id:references: in-reply-to:mime-version:content-transfer-encoding; bh=bUOUCWM7jOwY/yRXSWUUQRRIbVoCb9VvjEYXuG+7WQc=; b=n9wYhdkIGX3N8zuHhBRB9v/bz5TWX+qU4b1b43jUjXer3Dmh7j4up3H4 WTF/F1GEH8yAGOMIiixMCoPWhu57ovJUN/gr1bc8FhVPeacnxEUy/suyK L+BDRgl1baBnhGyYkPsEBScm0tTPLMpew44UfkNNygVGryi17IyMUL/mh IYhjvr/o9qYQljciYSkiUSGQVblU4tPIRP006q4u9K1wqEnKjjyEulaCr nLdD5SyPoQFJ3VlJATst0Sba4dKQbnn/pX/QTH1L0xAGvvP0/E7L9+IsL 1xo1P/9LYwhwK47sKexggn2NtmVvusu6vU7qgxzO9EROb2TKc0Owskj0F w==; X-CSE-ConnectionGUID: LwueZ79gQbWqUfiyEHTtCw== X-CSE-MsgGUID: BAfn2TYuRuisoEfNRm7z4Q== X-IronPort-AV: E=McAfee;i="6800,10657,11527"; a="57872512" X-IronPort-AV: E=Sophos;i="6.17,302,1747724400"; d="scan'208";a="57872512" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Aug 2025 02:16:25 -0700 X-CSE-ConnectionGUID: VRNynqnoTzWZl9sdlfNO6A== X-CSE-MsgGUID: lwnyy7O/SlWuidikbRPeIw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.17,302,1747724400"; d="scan'208";a="167986407" Received: from fmsmsx902.amr.corp.intel.com ([10.18.126.91]) by fmviesa006.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Aug 2025 02:16:25 -0700 Received: from FMSMSX903.amr.corp.intel.com (10.18.126.92) by fmsmsx902.amr.corp.intel.com (10.18.126.91) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Wed, 20 Aug 2025 02:16:24 -0700 Received: from fmsedg901.ED.cps.intel.com (10.1.192.143) by FMSMSX903.amr.corp.intel.com (10.18.126.92) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17 via Frontend Transport; Wed, 20 Aug 2025 02:16:24 -0700 Received: from NAM04-MW2-obe.outbound.protection.outlook.com (40.107.101.70) by edgegateway.intel.com (192.55.55.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Wed, 20 Aug 2025 02:16:24 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=lvNBc3qRNxrjxioDrq0jjoXqdPZ70Wih52uhn6EB5QAqVxAbWotgT3Um494JUFi0u7nnaLxvXuh7tTNtv0FefJzbp2sKavGF0QOkNoCJ3wa9RJZ2aEsn1KI4Vcsy61vMJ9xfTl7e07vytjP5nqa3SyUMnwQVs639K+VEc141bXJSqqpb4XvyzY4XSFdgsBgNxDhIdz+JByH+FY5oX9FlBNsOjOhRy5HD+Yvcas09VNpmGjS6CFNgCqC8tZoB6eUDpqbEmw/B6o8r4iLmbuEx0xIjKF8STnkXDNCxjn7u9GMNZDF39YesBD++mo3sWxtmNqmXPYWtjJpl/YrtD+yVrA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=BXLmcwROFuD12FcnXZxV8ik+LDLT8twjBNr9Zxk9u9s=; b=qMQNDWFCeyXpvDQspsSreghPtyBu89a/OAW6yiwF1bgKLDOp1HshdMFkZwqfP6TwQtInaNpWPP94T+Rk4I8ARn7NfgdeoMPq7niOZE5NiJGiE/tVvWF3ND+IZwm+Ocj6lVtmWACfdBUo+RWHTK06u44LljNOl2ub6Cu1xAiOF4gzpGg/Jv88kawJz3h2gtJ034wRena9GeAVWt5XvrXqIu22aIjCjh76d7X4HRTnVgGPpgsCJ69BhIQ0mqmc0lsJchGjsp+h/v49e+7v9Jtcop/Ey84betUM3FZh28CZCrVOv4fQr7Ct7upeqedQa3YiuPIrdBYrfzmjb9NIRlU0LA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Received: from SN7PR11MB7638.namprd11.prod.outlook.com (2603:10b6:806:34b::22) by DS0PR11MB6472.namprd11.prod.outlook.com (2603:10b6:8:c0::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9031.24; Wed, 20 Aug 2025 09:16:22 +0000 Received: from SN7PR11MB7638.namprd11.prod.outlook.com ([fe80::25b8:16dc:755e:34d1]) by SN7PR11MB7638.namprd11.prod.outlook.com ([fe80::25b8:16dc:755e:34d1%5]) with mapi id 15.20.9031.023; Wed, 20 Aug 2025 09:16:22 +0000 From: "Schimpe, Christina" To: "tom@tromey.com" , "gdb-patches@sourceware.org" CC: "thiago.bauermann@linaro.org" , "luis.machado@arm.com" , Andrew Burgess Subject: RE: [PATCH v5 00/12] Add CET shadow stack support Thread-Topic: [PATCH v5 00/12] Add CET shadow stack support Thread-Index: AQHb6Ab9l+qATzhkEUSjG8AwKTocrrRrkEgA Date: Wed, 20 Aug 2025 09:16:22 +0000 Message-ID: References: <20250628082810.332526-1-christina.schimpe@intel.com> In-Reply-To: <20250628082810.332526-1-christina.schimpe@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: SN7PR11MB7638:EE_|DS0PR11MB6472:EE_ x-ms-office365-filtering-correlation-id: 903e32dc-c4d6-4a02-06be-08dddfca3b0c x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; ARA:13230040|366016|376014|1800799024|13003099007|38070700018; x-microsoft-antispam-message-info: =?us-ascii?Q?89xBkel023i8MOlp/wJOuVyQPu4r/3qyLDnggfOe6IUzV4ATJSX2V10pxqV9?= =?us-ascii?Q?t7sRhaBGcs2cSppLdhr0y4uPJwkW9MwlRC5zwDrKBX3V7S1dNeVaHPyG+qpV?= =?us-ascii?Q?J72WrlZQtV6n3utp5kGlpNDYzimZgI2E/aWLb7dcFqaNwTtryHgKON6BpxeD?= =?us-ascii?Q?WZoMgMIczYa8W8FeFNXBOMQwOPbdhrLCy3lU2XC8uWajcgU83X31LfGLF/5j?= =?us-ascii?Q?Lzqvj6LVS7rBrmYllYr2ZflIphyZ7zv1TRiezRmOJ7erDpgfTH8pwKy6c5j4?= =?us-ascii?Q?PAMVPAJk4cfTvdYXkEL8Oap9nWjyR6BnYQ0cUvozLZcz1zTP2+TbEVbPJCJI?= =?us-ascii?Q?gdTP1KV2ABvBoFSQ/1xbPUpoD9k4LQVqupEzHZfOfSd/il9jA/l/5+MHTsIz?= =?us-ascii?Q?EJOdWOHdb1uDrwEE0+zJnfRS/UO+DFdmwMRdLQ55nb0jho5Z2FJrSOkb58pq?= =?us-ascii?Q?2Z7O4ht48+M9+AlpLNMM+5u54tXLmcaaeDgKg4Q9ReLMXxYeZoeicxKTTJmb?= =?us-ascii?Q?SJCM04MxXXTm32lRQXUV5MQmmeV8X5EafyAw2aq6diLV2QV0p9KazQlWFgJu?= =?us-ascii?Q?IpgRqs9yxqcYuf6mO6MnEpsBvlzHF6bQG7yO5NBTbeq5430DJZVHx0UusL7c?= =?us-ascii?Q?k9CnQ7waH1GZJwOVmN3DxnvmsxJgVqZyZIvIjw1p27wRCy5DhVC+1iQ8Vofm?= =?us-ascii?Q?zGhYsShMEM6XCKdAhyhG88THxOo4ahKLpOySNMpkNu03shooOq66IaYfsOei?= =?us-ascii?Q?/QIdTBG42ezTPVwNsfKVCysEImBsD+NqAEByhf6aZV8Z9s6enXXQa3Dn1EIW?= =?us-ascii?Q?6BptG+t8RvcK2yNFnmWLPwBsHyYThhhUePfAWpGCnq27pfb0VTdSudgGhYOm?= =?us-ascii?Q?ESvX7vJTuuWMk9i0UljWq65tCHVyCyylXVQgQtCE4irbbn119c9olfNYTKlN?= =?us-ascii?Q?U6SvFjVLQXPscoHBJpBV3eDZHX8yb6juTiKq37S9vDStkBCHZG79RW3j4V7L?= =?us-ascii?Q?n0Kokk2abnG8kns2mc5g3XKBO1mGKkvKdNm9ObZZLYoQHrmg60eiAYidKM4j?= =?us-ascii?Q?AX2rBZIpfWYdIVq8lyT1C4hjDVk68EtmRRgVmuRHWBrWdOD+P3FYql40e4b8?= =?us-ascii?Q?kEPSgvsROFypPpjfSLrwDMCsC1L1MddR79UmE3kXw7RXjmP3ZSg699NQuB70?= =?us-ascii?Q?Io/KbFyv7wcOIR8HVYg9M53EdmnkD8TKjexvT6l6s3SvChcnofR5p/xmcjZk?= =?us-ascii?Q?MkV6qfjGMbPD33EfUTDSmo6EvajqS7qZEvLHeNplK+IJR7i6cRs9dfql5iwY?= =?us-ascii?Q?QVsWPmcKlAtgQutogGe3QZnJXhTBytfs71G5kLZ0cIy2Nhn+wvbjSPruoGda?= =?us-ascii?Q?OJNz5wKBBdvGZynK9AtJ1qDI6ERcG05mfBGeWUQ8QHI9FISWwTIFMPGxT7Xv?= =?us-ascii?Q?zjPGNtTP5aY=3D?= x-forefront-antispam-report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:SN7PR11MB7638.namprd11.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230040)(366016)(376014)(1800799024)(13003099007)(38070700018); DIR:OUT; SFP:1101; x-ms-exchange-antispam-messagedata-chunkcount: 1 x-ms-exchange-antispam-messagedata-0: =?us-ascii?Q?w/fnDkbkIrkBlHxD6uo2PZk6LEi630t6Ie5VDnR8rzfuqKkDAadohvS6x9LE?= =?us-ascii?Q?08PgJavae+EYUVbd2Mwa+59VtReyRSFUQthxqKorF2C2YJxNnn8DhWNZPAEc?= =?us-ascii?Q?4ajVORbgbYVcBlmcUyTmyXvRoeTODdSktqoo9UJRc9CBEY+SlfS60OibG3iW?= =?us-ascii?Q?fH3EVk2+zDDXk+YgyZq8tNuXG8UuvxrbSRtNqKbpOUU1n5P0jksCiUtOqOrI?= =?us-ascii?Q?at0iVF5vPyxVjKg6UK7bnuKs3wh+b1MU1E36y+bA4Xa/ZAvLmjCqR/daxoe0?= =?us-ascii?Q?sdiB2x/ZFmzrjHDkCK+C238yXkP2pn4ROk3kNQU3XBNCLPjdtkPngyaKJxmr?= =?us-ascii?Q?M55P6RvR/IcIrBJms9mQRO9+rYSSsPbjt9L3o6XxoRgRC4m9du6yc9kDVyG7?= =?us-ascii?Q?JZfEYazHMFb6Q83sjMjFSAXMYC2z/52CRD1HkyLCp+tSf9ATuTXm63+3B3Jh?= =?us-ascii?Q?Nv8FDATIo+dscOD22GBbl3RoRtoSZYTxwfQ4ObxDPkQozHzKkAZE/m5KeLrQ?= =?us-ascii?Q?zPE/g0L15K2VPcQs3t1q8h+KbzUJPa/ViD7Se0biRElqbUJgFOZndyo2G0sZ?= =?us-ascii?Q?nszKReAaZ2Uo0v0HqtK1BVS6+5gMwD3biiKjAiG6zjDGTsuzS5A+ceMzwoqu?= =?us-ascii?Q?jhFuvVhInbn3QIAKuL5wvkKimXhNtfgQysxNf5UIkz18UtYcBpQOI0GLHvSo?= =?us-ascii?Q?Xjf+Z1pFLA0jMKD5hKRkup/hWSwKuiynDlB+fuW5BEqq5uTfRJ76LPsqPyYW?= =?us-ascii?Q?6IwE19TBBzA/NY3bDnGdos9DsgZc6m76cbfttFv1S2C0d0KlinzlNTSPPOFD?= =?us-ascii?Q?v3CuhRVOKssStoeaHVCtecUd/RMAAABzbxgxjIURoDF6oJ1FqX/QzsHgBCxi?= =?us-ascii?Q?LOf4BHu0f03JAafAQwMxnxPONfV5woWxzJR5afxBpHumKYVD9KjpCy1QM6Px?= =?us-ascii?Q?ULnn8GYkQphgCQ0gdSNs/3RAehHGJtxWrKdlwJzug5vvdO67T93O7AYyQVzp?= =?us-ascii?Q?L0yfv3+pSsW15Mwb7jM3xcWhgW2jKstbH+LawRO+68aan5Nr2AENQN48OvD8?= =?us-ascii?Q?WfNMEoV+6UyZtJfudraNut+VceGUh2ZBzICmKAV4SmuLUd1Jt7BBVe4TjZrS?= =?us-ascii?Q?S6Xvml9iMZJgzXQDc4Vv5NERN79hjiIiGl+xyBkgGrZOXbcI32g+Bu8A4yMg?= =?us-ascii?Q?nRxDCsqCxHwPPWaLr/kOnG36uu6/f+OuK7/6jedvKwmA7cRo7gwHFEJrvZqD?= =?us-ascii?Q?FeN+wdOpVCfiQUXfRB2rPHDdOJSQt7tP17zRVOSDPdRV4vyHLy8f5TJdAwjz?= =?us-ascii?Q?qkqbBuwNPtNVdYw98ircsd4KuWZFqo+d7+Vp7/Dm+6hf26e9pa8FwHwiVC6F?= =?us-ascii?Q?icexWOL3keO78ZjSm/JzRfwSAa458Hx+2SmDcfiR1HzMfYbNX643ahcbv3um?= =?us-ascii?Q?xr822XfkLaAUz973+ukD3vrkZsdglQGM7stt7M16D1661lRiJAODhefNkl4L?= =?us-ascii?Q?U513Fas4RvgtrBuAsp+grpwSrRgw5rKd5Vo8JsMdLsOF/kCyVGLaa75VAwAQ?= =?us-ascii?Q?6dtfwsYN/RVf0AHL8QtjlsLKyRx6IG0VRgmdVh66yr8SiwXmoI6oiudfHZFW?= =?us-ascii?Q?MA=3D=3D?= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SN7PR11MB7638.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 903e32dc-c4d6-4a02-06be-08dddfca3b0c X-MS-Exchange-CrossTenant-originalarrivaltime: 20 Aug 2025 09:16:22.3301 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: fkZXkx8N5si3hSohbVAGYMRz9Zm/WrayCUJMa53F2x0MVRAXRCSVqFC/q1RbWxxH2GIKJTiMQn35tgfR0vplsbf8YBUvZ4ROTUVIV5SA6ew= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR11MB6472 X-OriginatorOrg: intel.com Content-Transfer-Encoding: quoted-printable X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces~public-inbox=simark.ca@sourceware.org Hi Tom, = I retested my CET shadow stack series and noticed a new fail in gdb.dap/sco= pes.exp, if I rebase the series on latest upstream master. Reason seems to be the patch that you added recently: 'Do not allow DAP cli= ents to dereference "void *"' and it's handling of unavailable registers. The shadow stack feature is disabled by default, so the pl3_ssp register wh= ich is added with my CET shadow stack series will be shown as unavailable a= nd we see a TCL error: ~~~ >>> {"seq": 12, "type": "request", "command": "variables", "arguments": {"v= ariablesReference": 2, "count": 85}} Content-Length: 129^M ^M {"request_seq": 12, "type": "response", "command": "variables", "success": = false, "message": "value is not available", "seq": 25}FAIL: gdb.dap/scopes.= exp: fetch all registers success ERROR: tcl error sourcing /tmp/gdb/testsuite/gdb.dap/scopes.exp. ERROR: tcl error code TCL LOOKUP DICT body ERROR: key "body" not known in dictionary while executing "dict get $val body variables" (file "/tmp/gdb/testsuite/gdb.dap/scopes.exp" line 152) invoked from within "source /tmp/gdb/testsuite/gdb.dap/scopes.exp" ("uplevel" body line 1) invoked from within "uplevel #0 source /tmp/gdb/testsuite/gdb.dap/scopes.exp" invoked from within "catch "uplevel #0 source $test_file_name" msg" UNRESOLVED: gdb.dap/scopes.exp: testcase '/tmp/gdb/testsuite/gdb.dap/scopes= .exp' aborted due to Tcl error ~~~ I could make this test pass by enabling the shadow stack feature in that sp= ecific test, if the HW supports CET shadow stack. = The enablement would be done similar to my CET shadow stack tests: ~~~ save_vars { ::env(GLIBC_TUNABLES) } { append_environment GLIBC_TUNABLES "glibc.cpu.hwcaps" "SHSTK" ~~~ An alternative would be that the test is able to handle unavailable registe= rs, which I think is better actually. But I don't have a proper fix available yet. What do you think ? = Thanks, Christina = > -----Original Message----- > From: Christina Schimpe > Sent: Saturday, June 28, 2025 10:28 AM > To: gdb-patches@sourceware.org > Cc: thiago.bauermann@linaro.org; luis.machado@arm.com > Subject: [PATCH v5 00/12] Add CET shadow stack support > = > Hi all, > = > this is my v5 of the series to add amd64 shadow stack support to GDB on > linux. > It addresses the feedback of Luis. > = > v4 can be found here: > https://sourceware.org/pipermail/gdb-patches/2025-June/218744.html > = > Changes since v4: > - Improve some comments. > - Change the test in "gdb: amd64 linux coredump support with shadow > stack." to also test core file generated by the linux kernel. This > requires changes for the core_find procedure to save program output, > that have been implemented by Thiago already, so we include this part > of the patch in this series: "gdb, testsuite: Extend core_find procedure > to save program output.". The test is now very similar to the test > implemented for Guarded Control Stack corefiles. Thanks to Thiago for > providing the input here! > = > I am looking forward to your feedback! > = > Regards, > = > Christina > = > Christina Schimpe (12): > gdb, testsuite: Extend core_find procedure to save program output. > gdbserver: Add optional runtime register set type. > gdbserver: Add assert in x86_linux_read_description. > gdb: Sync up x86-gcc-cpuid.h with cpuid.h from gcc 14 branch. > gdb, gdbserver: Use xstate_bv for target description creation on x86. > gdb, gdbserver: Add support of Intel shadow stack pointer register. > gdb: amd64 linux coredump support with shadow stack. > gdb: Handle shadow stack pointer register unwinding for amd64 linux. > gdb, gdbarch: Enable inferior calls for shadow stack support. > gdb: Implement amd64 linux shadow stack support for inferior calls. > gdb, gdbarch: Introduce gdbarch method to get the shadow stack > pointer. > gdb: Enable displaced stepping with shadow stack on amd64 linux. > = > gdb/NEWS | 6 + > gdb/amd64-linux-nat.c | 17 ++ > gdb/amd64-linux-tdep.c | 218 +++++++++++++++++- > gdb/amd64-tdep.c | 35 ++- > gdb/amd64-tdep.h | 9 +- > gdb/arch-utils.c | 10 + > gdb/arch-utils.h | 5 + > gdb/arch/amd64-linux-tdesc.c | 33 +-- > gdb/arch/amd64-linux-tdesc.h | 7 +- > gdb/arch/amd64.c | 25 +- > gdb/arch/amd64.h | 10 +- > gdb/arch/i386-linux-tdesc.c | 29 +-- > gdb/arch/i386-linux-tdesc.h | 5 +- > gdb/arch/i386.c | 19 +- > gdb/arch/i386.h | 8 +- > gdb/arch/x86-linux-tdesc-features.c | 60 ++--- > gdb/arch/x86-linux-tdesc-features.h | 25 +- > gdb/doc/gdb.texinfo | 42 ++++ > gdb/features/Makefile | 2 + > gdb/features/i386/32bit-ssp.c | 14 ++ > gdb/features/i386/32bit-ssp.xml | 11 + > gdb/features/i386/64bit-ssp.c | 14 ++ > gdb/features/i386/64bit-ssp.xml | 11 + > gdb/gdbarch-gen.c | 54 +++++ > gdb/gdbarch-gen.h | 24 ++ > gdb/gdbarch_components.py | 31 +++ > gdb/i386-tdep.c | 51 +++- > gdb/i386-tdep.h | 11 +- > gdb/infcall.c | 14 +- > gdb/linux-tdep.c | 47 ++++ > gdb/linux-tdep.h | 7 + > gdb/nat/x86-gcc-cpuid.h | 153 +++++++++--- > gdb/nat/x86-linux-tdesc.c | 20 +- > gdb/nat/x86-linux-tdesc.h | 7 +- > gdb/nat/x86-linux.c | 57 +++++ > gdb/nat/x86-linux.h | 4 + > .../gdb.arch/amd64-shadow-stack-cmds.exp | 141 +++++++++++ > .../gdb.arch/amd64-shadow-stack-corefile.c | 42 ++++ > .../gdb.arch/amd64-shadow-stack-corefile.exp | 110 +++++++++ > .../gdb.arch/amd64-shadow-stack-disp-step.exp | 92 ++++++++ > gdb/testsuite/gdb.arch/amd64-shadow-stack.c | 35 +++ > gdb/testsuite/gdb.arch/amd64-ssp.exp | 50 ++++ > .../gdb.base/inline-frame-cycle-unwind.py | 4 + > gdb/testsuite/lib/gdb.exp | 80 ++++++- > gdb/x86-linux-nat.c | 50 +++- > gdb/x86-linux-nat.h | 11 + > gdb/x86-tdep.c | 21 ++ > gdb/x86-tdep.h | 9 + > gdbserver/i387-fp.cc | 40 ++-- > gdbserver/linux-amd64-ipa.cc | 10 +- > gdbserver/linux-i386-ipa.cc | 6 +- > gdbserver/linux-low.cc | 50 ++-- > gdbserver/linux-low.h | 7 +- > gdbserver/linux-x86-low.cc | 44 +++- > gdbsupport/x86-xstate.h | 7 +- > 55 files changed, 1687 insertions(+), 217 deletions(-) create mode 1006= 44 > gdb/features/i386/32bit-ssp.c create mode 100644 > gdb/features/i386/32bit-ssp.xml create mode 100644 > gdb/features/i386/64bit-ssp.c create mode 100644 > gdb/features/i386/64bit-ssp.xml create mode 100644 > gdb/testsuite/gdb.arch/amd64-shadow-stack-cmds.exp > create mode 100644 gdb/testsuite/gdb.arch/amd64-shadow-stack- > corefile.c > create mode 100644 gdb/testsuite/gdb.arch/amd64-shadow-stack- > corefile.exp > create mode 100644 gdb/testsuite/gdb.arch/amd64-shadow-stack-disp- > step.exp > create mode 100644 gdb/testsuite/gdb.arch/amd64-shadow-stack.c > create mode 100644 gdb/testsuite/gdb.arch/amd64-ssp.exp > = > -- > 2.43.0 Intel Deutschland GmbH Registered Address: Am Campeon 10, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Sean Fennelly, Jeffrey Schneiderman, Tiffany Doon Silva Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928