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charset="us-ascii" MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SN7PR11MB7638.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 524922ad-8741-4cbc-b1c1-08dddffd31ee X-MS-Exchange-CrossTenant-originalarrivaltime: 20 Aug 2025 15:21:11.3840 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: KEitgReVagtb/y9Q9q5x2YE+pBjCrA0kVGuo5/SpWwOtDbJ4xI/YupW7yLDhtgHbxOSMInrJJIgJif3BeXhn3Skrt47VHf3U8H2XBWwWxAo= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR11MB4789 X-OriginatorOrg: intel.com Content-Transfer-Encoding: quoted-printable X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces~public-inbox=simark.ca@sourceware.org Hi Tom, I'll fix the issue in gdb.dap/scopes.exp described below as follows: ~~~~ save_vars { ::env(GLIBC_TUNABLES) } { # If x86 shadow stack is supported we need to configure GLIBC_TUNABLES # such that the feature is enabled and the register pl3_ssp is # available. Otherwise the request to fetch all registers in this test= will fail # with "message": "value is not available". if { [allow_ssp_tests] } { append_environment GLIBC_TUNABLES "glibc.cpu.hwcaps" "SHSTK" } if {[dap_initialize] =3D=3D ""} { return } [...} ~~~ Since to me it seems that the test dap_check_request_and_response "fetch all registers" requires all registers to be available. Please let me know if you think otherwise. Christina > -----Original Message----- > From: Schimpe, Christina > Sent: Wednesday, August 20, 2025 11:16 AM > To: tom@tromey.com; gdb-patches@sourceware.org > Cc: thiago.bauermann@linaro.org; luis.machado@arm.com; Andrew > Burgess > Subject: RE: [PATCH v5 00/12] Add CET shadow stack support > = > Hi Tom, > = > I retested my CET shadow stack series and noticed a new fail in > gdb.dap/scopes.exp, if I rebase the series on latest upstream master. > Reason seems to be the patch that you added recently: 'Do not allow DAP > clients to dereference "void *"' and it's handling of unavailable registe= rs. > = > The shadow stack feature is disabled by default, so the pl3_ssp register > which is added with my CET shadow stack series will be shown as > unavailable and we see a TCL error: > ~~~ > >>> {"seq": 12, "type": "request", "command": "variables", "arguments": > >>> {"variablesReference": 2, "count": 85}} > Content-Length: 129^M > ^M > {"request_seq": 12, "type": "response", "command": "variables", "success": > false, "message": "value is not available", "seq": 25}FAIL: > gdb.dap/scopes.exp: fetch all registers success > ERROR: tcl error sourcing /tmp/gdb/testsuite/gdb.dap/scopes.exp. > ERROR: tcl error code TCL LOOKUP DICT body > ERROR: key "body" not known in dictionary > while executing > "dict get $val body variables" > (file "/tmp/gdb/testsuite/gdb.dap/scopes.exp" line 152) > invoked from within > "source /tmp/gdb/testsuite/gdb.dap/scopes.exp" > ("uplevel" body line 1) > invoked from within > "uplevel #0 source /tmp/gdb/testsuite/gdb.dap/scopes.exp" > invoked from within > "catch "uplevel #0 source $test_file_name" msg" > UNRESOLVED: gdb.dap/scopes.exp: testcase > '/tmp/gdb/testsuite/gdb.dap/scopes.exp' aborted due to Tcl error ~~~ > = > I could make this test pass by enabling the shadow stack feature in that > specific test, if the HW supports CET shadow stack. > The enablement would be done similar to my CET shadow stack tests: > = > ~~~ > save_vars { ::env(GLIBC_TUNABLES) } { > = > append_environment GLIBC_TUNABLES "glibc.cpu.hwcaps" "SHSTK" > ~~~ > = > An alternative would be that the test is able to handle unavailable regis= ters, > which I think is better actually. > But I don't have a proper fix available yet. > = > What do you think ? > = > Thanks, > Christina > = > = > = > > -----Original Message----- > > From: Christina Schimpe > > Sent: Saturday, June 28, 2025 10:28 AM > > To: gdb-patches@sourceware.org > > Cc: thiago.bauermann@linaro.org; luis.machado@arm.com > > Subject: [PATCH v5 00/12] Add CET shadow stack support > > > > Hi all, > > > > this is my v5 of the series to add amd64 shadow stack support to GDB > > on linux. > > It addresses the feedback of Luis. > > > > v4 can be found here: > > https://sourceware.org/pipermail/gdb-patches/2025-June/218744.html > > > > Changes since v4: > > - Improve some comments. > > - Change the test in "gdb: amd64 linux coredump support with shadow > > stack." to also test core file generated by the linux kernel. This > > requires changes for the core_find procedure to save program output, > > that have been implemented by Thiago already, so we include this part > > of the patch in this series: "gdb, testsuite: Extend core_find proced= ure > > to save program output.". The test is now very similar to the test > > implemented for Guarded Control Stack corefiles. Thanks to Thiago for > > providing the input here! > > > > I am looking forward to your feedback! > > > > Regards, > > > > Christina > > > > Christina Schimpe (12): > > gdb, testsuite: Extend core_find procedure to save program output. > > gdbserver: Add optional runtime register set type. > > gdbserver: Add assert in x86_linux_read_description. > > gdb: Sync up x86-gcc-cpuid.h with cpuid.h from gcc 14 branch. > > gdb, gdbserver: Use xstate_bv for target description creation on x86. > > gdb, gdbserver: Add support of Intel shadow stack pointer register. > > gdb: amd64 linux coredump support with shadow stack. > > gdb: Handle shadow stack pointer register unwinding for amd64 linux. > > gdb, gdbarch: Enable inferior calls for shadow stack support. > > gdb: Implement amd64 linux shadow stack support for inferior calls. > > gdb, gdbarch: Introduce gdbarch method to get the shadow stack > > pointer. > > gdb: Enable displaced stepping with shadow stack on amd64 linux. > > > > gdb/NEWS | 6 + > > gdb/amd64-linux-nat.c | 17 ++ > > gdb/amd64-linux-tdep.c | 218 +++++++++++++++++- > > gdb/amd64-tdep.c | 35 ++- > > gdb/amd64-tdep.h | 9 +- > > gdb/arch-utils.c | 10 + > > gdb/arch-utils.h | 5 + > > gdb/arch/amd64-linux-tdesc.c | 33 +-- > > gdb/arch/amd64-linux-tdesc.h | 7 +- > > gdb/arch/amd64.c | 25 +- > > gdb/arch/amd64.h | 10 +- > > gdb/arch/i386-linux-tdesc.c | 29 +-- > > gdb/arch/i386-linux-tdesc.h | 5 +- > > gdb/arch/i386.c | 19 +- > > gdb/arch/i386.h | 8 +- > > gdb/arch/x86-linux-tdesc-features.c | 60 ++--- > > gdb/arch/x86-linux-tdesc-features.h | 25 +- > > gdb/doc/gdb.texinfo | 42 ++++ > > gdb/features/Makefile | 2 + > > gdb/features/i386/32bit-ssp.c | 14 ++ > > gdb/features/i386/32bit-ssp.xml | 11 + > > gdb/features/i386/64bit-ssp.c | 14 ++ > > gdb/features/i386/64bit-ssp.xml | 11 + > > gdb/gdbarch-gen.c | 54 +++++ > > gdb/gdbarch-gen.h | 24 ++ > > gdb/gdbarch_components.py | 31 +++ > > gdb/i386-tdep.c | 51 +++- > > gdb/i386-tdep.h | 11 +- > > gdb/infcall.c | 14 +- > > gdb/linux-tdep.c | 47 ++++ > > gdb/linux-tdep.h | 7 + > > gdb/nat/x86-gcc-cpuid.h | 153 +++++++++--- > > gdb/nat/x86-linux-tdesc.c | 20 +- > > gdb/nat/x86-linux-tdesc.h | 7 +- > > gdb/nat/x86-linux.c | 57 +++++ > > gdb/nat/x86-linux.h | 4 + > > .../gdb.arch/amd64-shadow-stack-cmds.exp | 141 +++++++++++ > > .../gdb.arch/amd64-shadow-stack-corefile.c | 42 ++++ > > .../gdb.arch/amd64-shadow-stack-corefile.exp | 110 +++++++++ > > .../gdb.arch/amd64-shadow-stack-disp-step.exp | 92 ++++++++ > > gdb/testsuite/gdb.arch/amd64-shadow-stack.c | 35 +++ > > gdb/testsuite/gdb.arch/amd64-ssp.exp | 50 ++++ > > .../gdb.base/inline-frame-cycle-unwind.py | 4 + > > gdb/testsuite/lib/gdb.exp | 80 ++++++- > > gdb/x86-linux-nat.c | 50 +++- > > gdb/x86-linux-nat.h | 11 + > > gdb/x86-tdep.c | 21 ++ > > gdb/x86-tdep.h | 9 + > > gdbserver/i387-fp.cc | 40 ++-- > > gdbserver/linux-amd64-ipa.cc | 10 +- > > gdbserver/linux-i386-ipa.cc | 6 +- > > gdbserver/linux-low.cc | 50 ++-- > > gdbserver/linux-low.h | 7 +- > > gdbserver/linux-x86-low.cc | 44 +++- > > gdbsupport/x86-xstate.h | 7 +- > > 55 files changed, 1687 insertions(+), 217 deletions(-) create mode > > 100644 gdb/features/i386/32bit-ssp.c create mode 100644 > > gdb/features/i386/32bit-ssp.xml create mode 100644 > > gdb/features/i386/64bit-ssp.c create mode 100644 > > gdb/features/i386/64bit-ssp.xml create mode 100644 > > gdb/testsuite/gdb.arch/amd64-shadow-stack-cmds.exp > > create mode 100644 gdb/testsuite/gdb.arch/amd64-shadow-stack- > > corefile.c > > create mode 100644 gdb/testsuite/gdb.arch/amd64-shadow-stack- > > corefile.exp > > create mode 100644 gdb/testsuite/gdb.arch/amd64-shadow-stack-disp- > > step.exp > > create mode 100644 gdb/testsuite/gdb.arch/amd64-shadow-stack.c > > create mode 100644 gdb/testsuite/gdb.arch/amd64-ssp.exp > > > > -- > > 2.43.0 > = > Intel Deutschland GmbH > Registered Address: Am Campeon 10, 85579 Neubiberg, Germany > Tel: +49 89 99 8853-0, www.intel.de > Managing Directors: Sean Fennelly, Jeffrey Schneiderman, Tiffany Doon Sil= va > Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich > Commercial Register: Amtsgericht Muenchen HRB 186928 Intel Deutschland GmbH Registered Address: Am Campeon 10, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Sean Fennelly, Jeffrey Schneiderman, Tiffany Doon Silva Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928