From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 5222 invoked by alias); 25 Jul 2008 21:46:18 -0000 Received: (qmail 5214 invoked by uid 22791); 25 Jul 2008 21:46:17 -0000 X-Spam-Check-By: sourceware.org Received: from mail.codesourcery.com (HELO mail.codesourcery.com) (65.74.133.4) by sourceware.org (qpsmtpd/0.31) with ESMTP; Fri, 25 Jul 2008 21:45:53 +0000 Received: (qmail 21878 invoked from network); 25 Jul 2008 21:45:52 -0000 Received: from unknown (HELO digraph.polyomino.org.uk) (joseph@127.0.0.2) by mail.codesourcery.com with ESMTPA; 25 Jul 2008 21:45:52 -0000 Received: from jsm28 (helo=localhost) by digraph.polyomino.org.uk with local-esmtp (Exim 4.68) (envelope-from ) id 1KMV6k-0003Df-IP; Fri, 25 Jul 2008 21:45:50 +0000 Date: Fri, 25 Jul 2008 21:46:00 -0000 From: "Joseph S. Myers" To: Thiago Jung Bauermann cc: Luis Machado , gdb-patches@sourceware.org Subject: Re: [PATCH-ppc 0/5] Add feature description for new VSX register set In-Reply-To: <1217021353.5922.121.camel@localhost.localdomain> Message-ID: References: <1217016935.29012.74.camel@gargoyle> <1217021353.5922.121.camel@localhost.localdomain> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2008-07/txt/msg00460.txt.bz2 On Fri, 25 Jul 2008, Thiago Jung Bauermann wrote: > On Fri, 2008-07-25 at 21:01 +0000, Joseph S. Myers wrote: > > On Fri, 25 Jul 2008, Luis Machado wrote: > > > This is a patch series to enable POWER7 VSX register set support in GDB. > > > The VSX registers' layout is as follows: > > > > Will IBM be making appropriate proposals regarding these registers in the > > Power.org ABI working group? The obvious things that need defining > > include DWARF debug/unwind information handling of the registers, and > > what's call-saved / call-clobbered, plus ABI handling of any new > > C-language datatypes. > > Regarding call-saved / call-clobbered there's no option really. VSX > registers follow the saved-ness of the registers they overlap with > (either floating point or altivec). So will some of the bits that don't overlap be call-saved? If so, they need setjmp/longjmp support and unwind support, including in the signal unwind code in GCC. I presume such patches to the other toolchain components will follow in due course if needed. -- Joseph S. Myers joseph@codesourcery.com