Re: 6.1: Fix gcc 3.5.0 failure in sim

["Maciej W. Rozycki" <macro@ds2.pg.gda.pl>]

On Mon, 19 Apr 2004 cgd@broadcom.com wrote:

> >  Building sim for mipsel-linux fails with gcc 3.5.0 with an "invalid
> > lvalue in assignment" error.  Here's a fix.
> 
> Did you test the simulator in any way, once you'd made this change?

 No I didn't.  Actually, I've never used the simulator at all.

> (I wouldn't expect a difference, but it's important to know what you
> tested, if anything.)

 Well, while in the silicon the BadVAddr register has the same width as
general purpose ones, decode_coproc() appears to decode dmfc0/dmtc0 as
32-bit, so perhaps the following change is needed as well (the code looks
messy, grrr).

 Here's an updated patch.  This wasn't tested either. ;-)

2004-04-20  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>

	* mips/interp.c (decode_coproc): Sign-extend the address retrieved 
	from COP0_BADVADDR.
	* mips/sim-main.h (COP0_BADVADDR): Remove a cast.

 Please apply.

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

gdb-6.1-sim-gcc3.patch
diff -up --recursive --new-file gdb-6.1.macro/sim/mips/interp.c gdb-6.1/sim/mips/interp.c
--- gdb-6.1.macro/sim/mips/interp.c	2003-02-27 23:26:34.000000000 +0000
+++ gdb-6.1/sim/mips/interp.c	2004-04-20 13:03:50.000000000 +0000
@@ -2102,7 +2102,7 @@ decode_coproc (SIM_DESC sd,
 	      case 8:
 		/* 8 = BadVAddr            R4000   VR4100  VR4300 */
 		if (code == 0x00)
-		  GPR[rt] = COP0_BADVADDR;
+		  GPR[rt] = (signed_word) (signed_address) COP0_BADVADDR;
 		else
 		  COP0_BADVADDR = GPR[rt];
 		break;
diff -up --recursive --new-file gdb-6.1.macro/sim/mips/sim-main.h gdb-6.1/sim/mips/sim-main.h
--- gdb-6.1.macro/sim/mips/sim-main.h	2003-01-05 07:56:59.000000000 +0000
+++ gdb-6.1/sim/mips/sim-main.h	2004-04-20 13:03:44.000000000 +0000
@@ -383,7 +383,7 @@ struct _sim_cpu {
 #define NR_COP0_GPR	32
   unsigned_word cop0_gpr[NR_COP0_GPR];
 #define COP0_GPR	((CPU)->cop0_gpr)
-#define COP0_BADVADDR ((unsigned32)(COP0_GPR[8]))
+#define COP0_BADVADDR	(COP0_GPR[8])
 
   /* While space is allocated for the floating point registers in the
      main registers array, they are stored separatly.  This is because