From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 116283 invoked by alias); 19 Jan 2017 14:01:23 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 116249 invoked by uid 89); 19 Jan 2017 14:01:22 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-5.1 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD,SPF_PASS autolearn=ham version=3.3.2 spammy=HTo:D*nl, HX-Envelope-From:sk:michael, sk:linuxx, sk:linux-x X-HELO: mga06.intel.com Received: from mga06.intel.com (HELO mga06.intel.com) (134.134.136.31) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 19 Jan 2017 14:01:11 +0000 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga104.jf.intel.com with ESMTP; 19 Jan 2017 06:01:09 -0800 X-ExtLoop1: 1 Received: from irsmsx103.ger.corp.intel.com ([163.33.3.157]) by orsmga002.jf.intel.com with ESMTP; 19 Jan 2017 06:01:07 -0800 Received: from irsmsx105.ger.corp.intel.com ([169.254.7.38]) by IRSMSX103.ger.corp.intel.com ([163.33.3.157]) with mapi id 14.03.0248.002; Thu, 19 Jan 2017 14:01:07 +0000 From: "Sturm, Michael" To: "mark.kettenis@xs4all.nl" , "palves@redhat.com" , "eliz@gnu.org" CC: "gdb-patches@sourceware.org" Subject: [ping][PATCH v3 0/5] Add support for PKRU register to GDB and GDBServer. Date: Thu, 19 Jan 2017 14:01:00 -0000 Message-ID: Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SW-Source: 2017-01/txt/msg00379.txt.bz2 ping -----Original Message----- From: Sturm, Michael=20 Sent: Tuesday, December 06, 2016 11:58 AM To: mark.kettenis@xs4all.nl; palves@redhat.com; eliz@gnu.org Cc: gdb-patches@sourceware.org; Sturm, Michael Subject: [PATCH v3 0/5] Add support for PKRU register to GDB and GDBServer. This patch series adds support for the registers added by the Memory Protec= tion Keys for Userspace (PKU aka PKEYs). Native and remote debugging are covered by this patch. The feedback I got during the first review of this patch raised questions r= egarding the naming of XSTATE masks and target descriptors. in addition, Walfred started working on patches that included renaming of X= STATE masks and target descriptors. These patches have been submitted by no= w. (https://sourceware.org/ml/gdb-patches/2016-04/msg00329.html) (https://sourceware.org/ml/gdb-patches/2016-04/msg00328.html) Adressed in V3: * [PATCH v2 1/5] Sync up x86-gcc-cpuid.h with cpuid.h from gcc-6 branch Added copyright blurb that got lost by accident. * PATCH v2 2/5] Change xstate_bv handling to use 8 bytes of data Shortened description of changes in Changelog. * [PATCH v2 5/5] Add support for Intel PKRU register to GDB and GDBserver Corrected spurious change in NEWS and some missing spaces in comments. Removed some code in the test and improved the output as pointed out by L= uis.. =20=20 Adressed in V2: * [Patch v2 1/5] New patch to sync cpuid bits with GCC as suggested by Pedro. * [PATCH v2 2/5] Change xstate_bv handling to use 8 bytes of data: Read/write xstate_bc values using endianess-aware functions. * [PATCH v2 3/5] Rename target descriptions to reflect actual content: Addressed comments by Pedro regarding wording in Changelog. * [PATCH v2 4/5] Add target description for avx-avx512: Addressed comments by Pedro regarding Changelog. Fixed wording of comments regarding MPX on x32. Removed MPX from comment in x32*.xml files. * [PATCH v2 5/5] Add support for Intel PKRU register to GDB and GDBserver: Adressed comments by Pedro regarding Changelog. Added missing renames in GDBserver ipa-related files. Changed test for PKU following comments by Pedro. =20=20 =20=20 I'd like to answer Pedro's question regarding the approach of adding PKRU to amd64-avx-mpx_avx512-* tdesc and renaming _without_ keeping a copy without PKU: Q: "Is that really the right thing to do? What about machines that _don't_ support pkru? Shouldn't we keep the older descriptions for those? A: The first machine to support PKU will have the xstate mask X86_XSTATE_AVX_MPX_AVX512_PKU_MASK.=20 The nearest existing xstate masks without PKU are X86_XSTATE_AVX_AVX512_MASK, which was introduced in patch 4 of this series, and X86_XSTATE_AVX_MPX_MASK. I've only kept X86_XSTATE_AVX_MPX_AVX512_MASK in patch 4, because it is reused in patch 5 to be renamed to X86_XSTATE_AVX_MPX_AVX512_PKU_MASK.=20 Michael Sturm (5): Sync up x86-gcc-cpuid.h with cpuid.h from gcc-6 branch. Change xstate_bv handling to use 8 bytes of data. Rename target descriptions to reflect actual content of description. Add target description for avx-avx512. Add support for Intel PKRU register to GDB and GDBserver. gdb/NEWS | 4 + gdb/amd64-linux-nat.c | 1 + gdb/amd64-linux-tdep.c | 30 ++- gdb/amd64-linux-tdep.h | 7 +- gdb/amd64-tdep.c | 28 +- gdb/amd64-tdep.h | 5 +- gdb/common/x86-xstate.h | 21 +- gdb/doc/gdb.texinfo | 4 + gdb/features/Makefile | 96 +++++-- gdb/features/i386/32bit-pkeys.xml | 13 + gdb/features/i386/64bit-pkeys.xml | 13 + gdb/features/i386/amd64-avx-avx512-linux.c | 284 +++++++++++++++++= ++++ ...avx512-linux.xml =3D> amd64-avx-avx512-linux.xml} | 3 +- gdb/features/i386/amd64-avx-avx512.c | 279 +++++++++++++++++= +++ .../{amd64-avx512.xml =3D> amd64-avx-avx512.xml} | 3 +- ...12-linux.c =3D> amd64-avx-mpx-avx512-pku-linux.c} | 11 +- .../i386/amd64-avx-mpx-avx512-pku-linux.xml | 22 ++ .../{amd64-avx512.c =3D> amd64-avx-mpx-avx512-pku.c} | 11 +- gdb/features/i386/amd64-avx-mpx-avx512-pku.xml | 19 ++ gdb/features/i386/i386-avx-avx512-linux.c | 170 ++++++++++++ ...-avx512-linux.xml =3D> i386-avx-avx512-linux.xml} | 3 +- gdb/features/i386/i386-avx-avx512.c | 165 ++++++++++++ .../i386/{i386-avx512.xml =3D> i386-avx-avx512.xml} | 3 +- ...512-linux.c =3D> i386-avx-mpx-avx512-pku-linux.c} | 11 +- .../i386/i386-avx-mpx-avx512-pku-linux.xml | 22 ++ .../{i386-avx512.c =3D> i386-avx-mpx-avx512-pku.c} | 11 +- gdb/features/i386/i386-avx-mpx-avx512-pku.xml | 19 ++ .../{x32-avx512-linux.c =3D> x32-avx-avx512-linux.c} | 192 ++++++-------- ...2-avx512-linux.xml =3D> x32-avx-avx512-linux.xml} | 3 +- .../i386/{x32-avx512.c =3D> x32-avx-avx512.c} | 190 ++++++-------- .../i386/{x32-avx512.xml =3D> x32-avx-avx512.xml} | 3 +- gdb/gdbserver/Makefile.in | 50 ++-- gdb/gdbserver/configure.srv | 25 +- gdb/gdbserver/i387-fp.c | 51 +++- gdb/gdbserver/linux-amd64-ipa.c | 15 +- gdb/gdbserver/linux-i386-ipa.c | 10 +- gdb/gdbserver/linux-x86-low.c | 45 +++- gdb/gdbserver/linux-x86-tdesc.h | 29 ++- gdb/i386-linux-nat.c | 2 +- gdb/i386-linux-tdep.c | 14 +- gdb/i386-linux-tdep.h | 6 +- gdb/i386-tdep.c | 76 +++++- gdb/i386-tdep.h | 14 +- gdb/i387-tdep.c | 116 ++++++++- gdb/i387-tdep.h | 5 + gdb/nat/x86-gcc-cpuid.h | 108 ++++---- .../{x32-avx512.dat =3D> amd64-avx-avx512-linux.dat} | 13 +- .../{amd64-avx512.dat =3D> amd64-avx-avx512.dat} | 12 +- ...inux.dat =3D> amd64-avx-mpx-avx512-pku-linux.dat} | 6 +- ...x512-linux.dat =3D> amd64-avx-mpx-avx512-pku.dat} | 8 +- gdb/regformats/i386/i386-avx-avx512-linux.dat | 71 ++++++ gdb/regformats/i386/i386-avx-avx512.dat | 70 +++++ ...vx512.dat =3D> i386-avx-mpx-avx512-pku-linux.dat} | 8 +- ...vx512-linux.dat =3D> i386-avx-mpx-avx512-pku.dat} | 8 +- gdb/regformats/i386/x32-avx-avx512-linux.dat | 151 +++++++++++ gdb/regformats/i386/x32-avx-avx512.dat | 150 +++++++++++ gdb/testsuite/gdb.arch/i386-pkru.c | 92 +++++++ gdb/testsuite/gdb.arch/i386-pkru.exp | 71 ++++++ gdb/x86-linux-nat.c | 20 +- 59 files changed, 2382 insertions(+), 510 deletions(-) create mode 100644= gdb/features/i386/32bit-pkeys.xml create mode 100644 gdb/features/i386/64= bit-pkeys.xml create mode 100644 gdb/features/i386/amd64-avx-avx512-linux.c rename gdb/features/i386/{amd64-avx512-linux.xml =3D> amd64-avx-avx512-lin= ux.xml} (84%) create mode 100644 gdb/features/i386/amd64-avx-avx512.c rename gdb/features/i386/{amd64-avx512.xml =3D> amd64-avx-avx512.xml} (89%= ) rename gdb/features/i386/{amd64-avx512-linux.c =3D> amd64-avx-mpx-avx512= -pku-linux.c} (97%) create mode 100644 gdb/features/i386/amd64-avx-mpx-avx= 512-pku-linux.xml rename gdb/features/i386/{amd64-avx512.c =3D> amd64-avx-mpx-avx512-pku.c} = (98%) create mode 100644 gdb/features/i386/amd64-avx-mpx-avx512-pku.xml create mode 100644 gdb/features/i386/i386-avx-avx512-linux.c rename gdb/features/i386/{i386-avx512-linux.xml =3D> i386-avx-avx512-linux= .xml} (84%) create mode 100644 gdb/features/i386/i386-avx-avx512.c rename gdb/features/i386/{i386-avx512.xml =3D> i386-avx-avx512.xml} (89%) = rename gdb/features/i386/{i386-avx512-linux.c =3D> i386-avx-mpx-avx512-pku= -linux.c} (96%) create mode 100644 gdb/features/i386/i386-avx-mpx-avx512-p= ku-linux.xml rename gdb/features/i386/{i386-avx512.c =3D> i386-avx-mpx-avx512-pku.c} (9= 6%) create mode 100644 gdb/features/i386/i386-avx-mpx-avx512-pku.xml rename gdb/features/i386/{x32-avx512-linux.c =3D> x32-avx-avx512-linux.c} = (61%) rename gdb/features/i386/{x32-avx512-linux.xml =3D> x32-avx-avx512-l= inux.xml} (85%) rename gdb/features/i386/{x32-avx512.c =3D> x32-avx-avx512= .c} (60%) rename gdb/features/i386/{x32-avx512.xml =3D> x32-avx-avx512.xml= } (89%) rename gdb/regformats/i386/{x32-avx512.dat =3D> amd64-avx-avx512-l= inux.dat} (90%) rename gdb/regformats/i386/{amd64-avx512.dat =3D> amd64-av= x-avx512.dat} (90%) rename gdb/regformats/i386/{x32-avx512-linux.dat =3D> = amd64-avx-mpx-avx512-pku-linux.dat} (91%) rename gdb/regformats/i386/{amd6= 4-avx512-linux.dat =3D> amd64-avx-mpx-avx512-pku.dat} (92%) create mode 10= 0644 gdb/regformats/i386/i386-avx-avx512-linux.dat create mode 100644 gdb/regformats/i386/i386-avx-avx512.dat rename gdb/regformats/i386/{i386-avx512.dat =3D> i386-avx-mpx-avx512-pku-l= inux.dat} (81%) rename gdb/regformats/i386/{i386-avx512-linux.dat =3D> i38= 6-avx-mpx-avx512-pku.dat} (84%) create mode 100644 gdb/regformats/i386/x32= -avx-avx512-linux.dat create mode 100644 gdb/regformats/i386/x32-avx-avx512.dat create mode 100644 gdb/testsuite/gdb.arch/i386-pkru.c create mode 100644 gdb/testsuite/gdb.arch/i386-pkru.exp -- 1.8.4.2 Intel Deutschland GmbH Registered Address: Am Campeon 10-12, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Christin Eisenschmid, Christian Lamprechter Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928