From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 14522 invoked by alias); 11 Apr 2014 13:45:27 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 14510 invoked by uid 89); 11 Apr 2014 13:45:26 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.1 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mga11.intel.com Received: from mga11.intel.com (HELO mga11.intel.com) (192.55.52.93) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 11 Apr 2014 13:45:24 +0000 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 11 Apr 2014 06:45:22 -0700 X-ExtLoop1: 1 Received: from irsmsx103.ger.corp.intel.com ([163.33.3.157]) by fmsmga002.fm.intel.com with ESMTP; 11 Apr 2014 06:45:16 -0700 Received: from irsmsx101.ger.corp.intel.com (163.33.3.153) by IRSMSX103.ger.corp.intel.com (163.33.3.157) with Microsoft SMTP Server (TLS) id 14.3.123.3; Fri, 11 Apr 2014 14:45:15 +0100 Received: from irsmsx105.ger.corp.intel.com ([169.254.7.78]) by IRSMSX101.ger.corp.intel.com ([169.254.1.171]) with mapi id 14.03.0123.003; Fri, 11 Apr 2014 14:45:15 +0100 From: "Sturm, Michael" To: "palves@redhat.com" , "eliz@gnu.org" , "mark.kettenis@xs4all.nl" , "Tedeschi, Walfred" CC: "gdb-patches@sourceware.org" Subject: [ping] [PATCH V4 0/3] Intel(R) AVX-512 register support Date: Fri, 11 Apr 2014 13:45:00 -0000 Message-ID: Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SW-Source: 2014-04/txt/msg00203.txt.bz2 Hi Pedro, Any comments regarding these changes? Thanks, Michael -----Original Message----- From: Sturm, Michael=20 Sent: Wednesday, April 02, 2014 2:24 PM To: palves@redhat.com; eliz@gnu.org; mark.kettenis@xs4all.nl; Tedeschi, Wal= fred Cc: gdb-patches@sourceware.org; Sturm, Michael Subject: [PATCH V4 0/3] Intel(R) AVX-512 register support Pedro, we've addressed the comments you made in V3. I've made changes to ensure th= at test result is "unsupported" on machines that do not support AVX-512. The test result is "untested" if compile step fails if gcc does not recogni= ze the AVX-512 machine option. I've also redesigned the test quite a bit, s= o I assumed that you may want to have another look before I push. Thanks and Regards, Michael This patch series adds support for the Intel(R) Advanced Vector Extensions = 512 (Intel(R) AVX-512) registers. Native and remote debugging are covered by th= is patch series. Intel(R) AVX-512 is an extension to AVX to support 512-bit wide SIMD regist= ers in 64-bit mode (XMM0-XMM31, YMM0-YMM31, ZMM0-ZMM31). The number of avai= lable registers in 32-bit mode is still 8 (XMM0-7, YMM0-7, ZMM0-7). The low= er 256-bits of the ZMM registers are aliased to the respective 256-bit YMM = registers. The lower 128-bits are aliased to the respective 128-bit XMM reg= isters. There are also 8 new, dedicated mask registers (K0-K7) in both 32-bit mode = and 64-bit mode. For more information please see Intel(R) Developer Zone: Intel(R) AVX http://software.intel.com/en-us/intel-isa-extensions#pid-16007-1495 Intel(R) Architecture Instruction Set Extensions Programming Reference: http://software.intel.com/en-us/file/319433-017pdf Changes between V3 and V4: * Addressed comments by Pedro: All: Fixed year in copyright notice . i386-linux-tdep.h: Added parens to I386_LINUX_ORIG_EAX_REGNUM defin= e. i386-tdep.c: Removed spurious new line. Several places: Compare return value of memcmp to 0. i386-avx512.exp: Chanegs to ensure test case returns "unsupported" = on=20 machines that don't have AVX-512. Redesigned test case. i386-avx512.c: Changes following redesign of test case. Changes between V2 and V3: * Following feeback by Mark Kettenis, the follwing changes were made in i386-tdep.c: Changed a reference to "amd64" to "in 64-bit mode" in the comment explaining the need for a constant. Also, refactored is_AVX512, is_AVX, is_SSE in i386_register_reggroup_p to avx512_p, avx_p, sse_= p. Changes between V1 and V2: * Following feedback by Pedro Alves, i386-avx512.exp now using gdb_test_multiple when checking if AVX512 is supported by the CPU. If CPU does not support AVX512, return unsupported. Simplified test as timeout is handled by framework. Added newline at the end of file. Note: * Documentation patch V1 already approved by Eli. * AVX512 register patch for GDB V3 pre-approved by Mark. * Add AVX512 register support to gdbserver V3 approved by Pedro. Michael Sturm (3): Add AVX512 registers support to GDB. Add AVX512 register support to gdbserver. Add AVX512 feature description to GDB manual gdb/NEWS | 5 + gdb/amd64-linux-nat.c | 19 +- gdb/amd64-linux-tdep.c | 23 +- gdb/amd64-linux-tdep.h | 5 +- gdb/amd64-tdep.c | 80 +++++ gdb/amd64-tdep.h | 12 +- gdb/common/i386-xstate.h | 20 +- gdb/doc/gdb.texinfo | 34 +++ gdb/features/Makefile | 22 ++ gdb/features/i386/32bit-avx512.xml | 30 ++ gdb/features/i386/64bit-avx512.xml | 102 +++++++ gdb/features/i386/amd64-avx512-linux.c | 321 ++++++++++++++++++++ gdb/features/i386/amd64-avx512-linux.xml | 20 ++ gdb/features/i386/amd64-avx512.c | 316 ++++++++++++++++++++ gdb/features/i386/amd64-avx512.xml | 18 ++ gdb/features/i386/i386-avx512-linux.c | 208 +++++++++++++ gdb/features/i386/i386-avx512-linux.xml | 20 ++ gdb/features/i386/i386-avx512.c | 203 +++++++++++++ gdb/features/i386/i386-avx512.xml | 18 ++ gdb/features/i386/x32-avx512-linux.c | 321 ++++++++++++++++++++ gdb/features/i386/x32-avx512-linux.xml | 20 ++ gdb/features/i386/x32-avx512.c | 316 ++++++++++++++++++++ gdb/features/i386/x32-avx512.xml | 18 ++ gdb/gdbserver/Makefile.in | 19 +- gdb/gdbserver/configure.srv | 20 +- gdb/gdbserver/i387-fp.c | 182 ++++++++++- gdb/gdbserver/linux-x86-low.c | 35 ++- gdb/i386-linux-nat.c | 5 +- gdb/i386-linux-tdep.c | 16 +- gdb/i386-linux-tdep.h | 7 +- gdb/i386-tdep.c | 465 +++++++++++++++++++++++++= ++-- gdb/i386-tdep.h | 64 +++- gdb/i387-tdep.c | 384 +++++++++++++++++++++++- gdb/i387-tdep.h | 21 ++ gdb/regformats/i386/amd64-avx512-linux.dat | 156 ++++++++++ gdb/regformats/i386/amd64-avx512.dat | 155 ++++++++++ gdb/regformats/i386/i386-avx512-linux.dat | 76 +++++ gdb/regformats/i386/i386-avx512.dat | 75 +++++ gdb/regformats/i386/x32-avx512-linux.dat | 156 ++++++++++ gdb/regformats/i386/x32-avx512.dat | 155 ++++++++++ gdb/testsuite/gdb.arch/Makefile.in | 2 +- gdb/testsuite/gdb.arch/i386-avx512.c | 249 +++++++++++++++ gdb/testsuite/gdb.arch/i386-avx512.exp | 175 +++++++++++ 43 files changed, 4507 insertions(+), 61 deletions(-) create mode 100644 = gdb/features/i386/32bit-avx512.xml create mode 100644 gdb/features/i386/64bit-avx512.xml create mode 100644 gdb/features/i386/amd64-avx512-linux.c create mode 100644 gdb/features/i386/amd64-avx512-linux.xml create mode 100644 gdb/features/i386/amd64-avx512.c create mode 100644 gd= b/features/i386/amd64-avx512.xml create mode 100644 gdb/features/i386/i386-avx512-linux.c create mode 100644 gdb/features/i386/i386-avx512-linux.xml create mode 100644 gdb/features/i386/i386-avx512.c create mode 100644 gdb= /features/i386/i386-avx512.xml create mode 100644 gdb/features/i386/x32-av= x512-linux.c create mode 100644 gdb/features/i386/x32-avx512-linux.xml create mode 100644 gdb/features/i386/x32-avx512.c create mode 100644 gdb/= features/i386/x32-avx512.xml create mode 100644 gdb/regformats/i386/amd64-= avx512-linux.dat create mode 100644 gdb/regformats/i386/amd64-avx512.dat create mode 100644 gdb/regformats/i386/i386-avx512-linux.dat create mode 100644 gdb/regformats/i386/i386-avx512.dat create mode 100644 gdb/regformats/i386/x32-avx512-linux.dat create mode 100644 gdb/regformats/i386/x32-avx512.dat create mode 100644 gdb/testsuite/gdb.arch/i386-avx512.c create mode 100644 gdb/testsuite/gdb.arch/i386-avx512.exp -- 1.8.4.2 Intel GmbH Dornacher Strasse 1 85622 Feldkirchen/Muenchen, Deutschland Sitz der Gesellschaft: Feldkirchen bei Muenchen Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk Registergericht: Muenchen HRB 47456 Ust.-IdNr./VAT Registration No.: DE129385895 Citibank Frankfurt a.M. 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