From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 95687 invoked by alias); 15 Dec 2015 11:44:25 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 95659 invoked by uid 89); 15 Dec 2015 11:44:24 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.1 required=5.0 tests=AWL,BAYES_00,KAM_LAZY_DOMAIN_SECURITY,RCVD_IN_DNSWL_LOW autolearn=no version=3.3.2 X-HELO: smtp.eu.adacore.com Received: from mel.act-europe.fr (HELO smtp.eu.adacore.com) (194.98.77.210) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Tue, 15 Dec 2015 11:44:23 +0000 Received: from localhost (localhost [127.0.0.1]) by filtered-smtp.eu.adacore.com (Postfix) with ESMTP id B9D4D2EE0003; Tue, 15 Dec 2015 12:44:20 +0100 (CET) Received: from smtp.eu.adacore.com ([127.0.0.1]) by localhost (smtp.eu.adacore.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id CeB8gGt6gJ05; Tue, 15 Dec 2015 12:44:20 +0100 (CET) Received: from dhcp-guest-231.act-europe.fr (dhcp-guest-231.act-europe.fr [10.10.127.231]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by smtp.eu.adacore.com (Postfix) with ESMTPSA id 4C01D2EE0018; Tue, 15 Dec 2015 12:44:20 +0100 (CET) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 8.2 \(2104\)) Subject: Re: cortex-m xml register descriptions for m-system From: Tristan Gingold In-Reply-To: Date: Tue, 15 Dec 2015 11:44:00 -0000 Cc: Pedro Alves , gdb-patches@sourceware.org Content-Transfer-Encoding: 7bit Message-Id: References: <566F108D.1000401@redhat.com> To: Christopher Friedt X-IsSubscribed: yes X-SW-Source: 2015-12/txt/msg00281.txt.bz2 > On 15 Dec 2015, at 00:11, Christopher Friedt wrote: > > On Dec 14, 2015 1:55 PM, "Pedro Alves" wrote: >> >> On 12/14/2015 05:04 PM, Christopher Friedt wrote: >>> Hi list, >>> >>> I've been using GDB and OpenOCD to debug ARM Cortex-M devices for >>> quite a while. One thing that I always noticed when using OpenOCD is >>> that the m-system registers are listed, which is *incredibly* useful >>> for writing code on just about any Cortex-M microcontroller. >>> >>> Somewhat recently, Qemu has also begun to support Cortex-M based >>> virtual devices, and it seems to be fairly usable. >>> >>> The down side, is that they do not expose the m-system registers, >>> simply because binutils-gdb does not (at this time) have an XML file >>> for them. >>> >>> Just to catch anyone up to speed who might be reading this, the >>> m-system registers are >>> >>> MSP (main stack pointer) >>> PSP (process stack pointer) >>> PRIMASK (1-bit register that says if interrupts are enabled) >>> BASEPRI (8-bit register that sets the NVIC base priority) >>> FAULTMASK (1-bit register that says if fault interrupts are enabled) >>> CONTROL (3-bit register that indicates presence of FP, whether PSP is >>> selected, and whether running in unprivileged mode) >>> >>> Now, these are "system" registers, and on a full blown microprocessor, >>> it might be unusual to expose them, but on a microcontroller, it's >>> quite important. The other debuggers that I have seen (IAR, >>> specifically) also list the m-system registers along with the general >>> purpose ones for Cortex-M. >>> >>> The following XML is sufficient to describe the m-system registers so >>> that they appear to the GDB client. >>> >>> >>> >>> >>> >>> >>> >>> >>> >> >> Does GDB need to be aware of these registers at all? That is, does gdb >> need to be aware of org.gnu.gdb.arm.m-system? Usually GDB needs to >> be aware of specific registers if for instance Dwarf can refer to them. >> Otherwise, the design of xml descriptions is such that you're free >> to send any additional registers you want without a specific feature. >> GDB will show them. > > Hmm... It's hard for me to say. The MSP and PSP are banked stack > pointers, control instructs the core which stack pointer to use, and > they are also tightly coupled to exception entry, so I would lean > towards yes? I do think so too. I have just written a patch so that gdb unwinds correctly on cortex-m exceptions, and this of course requires that gdb knows about at least psp. I plan to submit it early January. Tristan.