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AJvYcCV60Z1idoMzxAU41SzbZxTyN73ITtpleY4b0dLG/VChZPMK7gdCYzCy3lhTyMziVWApRkIHulbk8DtBhw==@sourceware.org X-Gm-Message-State: AOJu0YzyWdbiqPg68KPoWRHmV86f4Q47HOwNEVxORYO55y1vUkiN4ZHd KGPdMZuEtPndP5977OpgqXZlzrGF3HPLX4N1nlimlb327j5E54ZDaB7Vs5m6py6QqW3aE8iYsUk GcG8A8jy0qjoWwRaMlbMUiUGMTTfAmxPUCQI9RpEHqw== X-Gm-Gg: ASbGncujkxsGXza45GLc10Q13QvcSmveV91tRJMgXsFCO6qwiLaK6uT6hBJILP6KALB J4CAVmhmYh1hqmLt0Cnu++JpUzYPvq6MFT0GjyRtCsSGsMyraqXA7Yh5XcXY26lW6g1mBMlOurS NL3CYnBG6hjtmggaujkCoY6Wup70/ScmLCf11gAbKRCkI6dGa3hLr1QqVfs+NAtA4r8MdIDBmya wUEnAg= X-Google-Smtp-Source: AGHT+IGzv1wedbCJpbcpHNlfSLjo+Nysv9EEiD6LYj9ygxIdS0X53bCO/O1qJ4VrDjf4V1+Lb1vhIUSulBsm4L5+4kk= X-Received: by 2002:a17:90b:3145:b0:311:e605:f60e with SMTP id 98e67ed59e1d1-31f5de96a5cmr9560041a91.20.1753957990152; Thu, 31 Jul 2025 03:33:10 -0700 (PDT) MIME-Version: 1.0 References: <20250723104034.2324-2-sgargote@whileone.in> <87a54ldftg.fsf@redhat.com> In-Reply-To: From: Nelson Chu Date: Thu, 31 Jul 2025 18:32:59 +0800 X-Gm-Features: Ac12FXx2rE5yfixKLbZtRNs5E7Wx4UVWL-1LCzIt6DVHS4Iamww1KYCS8lc7YEo Message-ID: Subject: Re: [PATCH] Set rv64gcv as default to enable vector extension for disassembly To: Charlie Jenkins Cc: Andreas Schwab , Andrew Burgess , Soham Gargote , gdb-patches@sourceware.org, binutils@sourceware.org, Sameer Natu Content-Type: multipart/alternative; boundary="000000000000f4568c063b372a8d" X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces~public-inbox=simark.ca@sourceware.org --000000000000f4568c063b372a8d Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, Jul 31, 2025 at 3:21=E2=80=AFPM Charlie Jenkins wrote: > On Thu, Jul 31, 2025 at 10:37:16AM +0800, Nelson Chu wrote: > > On Wed, Jul 30, 2025 at 9:09=E2=80=AFPM Andreas Schwab = wrote: > > > > > Why is that needed? AFAICT, objdump will happily decode any extensio= n > > > without that change. > > > > > > > I guess maybe they are trying to dump an object which writes > > vector instructions by .insn directives, so the elf architecture > attribute > > or mapping symbols won't have v. I will suggest two solutions here > rather > > The goal here is to be able to use the disassembler from inside of > native riscv gdb to dump any instruction. Currently it seems like gdb > will only dump a subset of all instructions, even with the patch you > sent Nelson. Here is an example program: > My patch isn't used to resolve your problem, it just lets assembler and dis-assembler have the same default arch, so people can just update riscv_all_supported_ext. It's probably convenient to be maintained. Nelson --000000000000f4568c063b372a8d Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable


On Thu, Jul 31,= 2025 at 3:21=E2=80=AFPM Charlie Jenkins <charlie@rivosinc.com> wrote:
On Thu, Jul 31, 2025 at 10:37:16AM +0800, Nel= son Chu wrote:
> On Wed, Jul 30, 2025 at 9:09=E2=80=AFPM Andreas Schwab <schwab@suse.de> wrote:
>
> > Why is that needed?=C2=A0 AFAICT, objdump will happily decode any= extension
> > without that change.
> >
>
>=C2=A0 I guess maybe they are trying to dump an object which writes
> vector instructions by .insn directives, so the elf architecture attri= bute
> or mapping symbols won't have v.=C2=A0 I will suggest two solution= s here rather

The goal here is to be able to use the disassembler from inside of
native riscv gdb to dump any instruction. Currently it seems like gdb
will only dump a subset of all instructions, even with the patch you
sent Nelson. Here is an example program:

My patch isn't used to resolve your problem, it just lets assembler a= nd dis-assembler have the same default arch, so people can just update risc= v_all_supported_ext.=C2=A0 It's probably convenient=C2=A0to be maintain= ed.

Nelson
=C2=A0
--000000000000f4568c063b372a8d--