From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 84013 invoked by alias); 26 Apr 2018 08:11:53 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 83813 invoked by uid 89); 26 Apr 2018 08:11:38 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 spammy=Sounds, whilst, TTBRx, H*f:sk:TCF5sua X-HELO: mail-qt0-f195.google.com Received: from mail-qt0-f195.google.com (HELO mail-qt0-f195.google.com) (209.85.216.195) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 26 Apr 2018 08:11:36 +0000 Received: by mail-qt0-f195.google.com with SMTP id q6-v6so792315qtn.3 for ; Thu, 26 Apr 2018 01:11:36 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=ozl4gD8CJYovduxFEWKxPRTMj+8GVdRCnqXvQET6H+Y=; b=tR5xFE1m+KmGnFKYYQa98gNjvuzsSyGeyG6WHzig7Xhhm463+a5IlTokcj4otgz3YU Sn2Yr52fOGeogzbV+pX5irI8L2hpLiohruL4z5EFfsFFPorwq1bpc147OjPUYGmkh0gh 4bHtLQdLPeMN20No0yxRSSvXWc9ItTvoFU99p3Y0m4MKAwJb6rMsjX8KMbThuV6bBF4A iCul1/lF41jNN/ch8afJv276PqDmuj39NeTZxTe9d6Hr2018g4jdz7LcAJWXh4UbvjZk oe0WfF5EqlucQ6f+EAoJSTwJoGp5r2A3Ooz3nUxjI4GFYiGuRn8bWjGrvOyLT98VHd0Q BwgA== X-Gm-Message-State: ALQs6tD7XubC+qoJmroqXgHp6yqC1SvwWDQ6SMgYnVrMVpbz4OsIMcS0 LJIM00DpwSi2Z6k3DSfYQwUOYOkhmQ4gHtw5zNwyxA== X-Google-Smtp-Source: AB8JxZri3aE9bIbVkFzcExOlf0eqk194udndJ0iWfChowRWDmozLsA3NawIlr7HUJyvcO21tJ8xkZADZm6CZEsPhtZw= X-Received: by 2002:ac8:3f23:: with SMTP id c32-v6mr34927208qtk.286.1524730295113; Thu, 26 Apr 2018 01:11:35 -0700 (PDT) MIME-Version: 1.0 Received: by 10.200.39.46 with HTTP; Thu, 26 Apr 2018 01:11:04 -0700 (PDT) In-Reply-To: <20180425080432.kv4gagdcz7mhmx4x@holly.lan> References: <5e21c13b-9261-f947-e06c-dad9568278bf@redhat.com> <061e956c-72a7-2c2e-512b-3dfe42881818@redhat.com> <56373ed6-3a63-4508-61fa-54a3a456d785@redhat.com> <3f62b4ea-1f80-5faa-f372-b83b3e5de448@redhat.com> <20180424160538.kxvorrhvku4ukpj6@holly.lan> <20180425080432.kv4gagdcz7mhmx4x@holly.lan> From: Omair Javaid Date: Thu, 26 Apr 2018 08:11:00 -0000 Message-ID: Subject: Re: [PATCH 0/3 v3] [AArch64] Support tagged pointer To: Daniel Thompson Cc: Pedro Alves , Yao Qi , GDB Patches Content-Type: text/plain; charset="UTF-8" X-IsSubscribed: yes X-SW-Source: 2018-04/txt/msg00533.txt.bz2 On 25 April 2018 at 13:04, Daniel Thompson wrote: > On Wed, Apr 25, 2018 at 04:41:40AM +0500, Omair Javaid wrote: >> >> If everyone agrees that proper Linux kernel support benefits from >> >> its own osabi setting/name, then I don't see why we couldn't start by >> >> adding the osabi setting as soon as we have a use for it, even if >> >> the larger Linux Kernel patches aren't ready yet. >> > >> > Following on from the above, for aarch64-linux-tdep we can apply domain >> > knowledge regarding how things are configured. Here we know that TTBR0 >> > is guaranteed to have top byte ignore set, TTBR1 does not *and* we >> > also know (from memory-layout.txt) that TTBR0 is sufficiently small >> > that bit 55 can be used to discriminate between the two cases. >> > >> > In others words regardless of whether we are running at EL0 or EL1 then >> > I think we should mask the top byte from pointers if and only if bit 55 >> > is unset, otherwise leave them as they are. >> >> What I am understanding here is that you are basing your decision on >> the fact that: >> >> "User addresses have bits 63:48 set to 0 while the kernel addresses have >> the same bits set to 1. TTBRx selection is given by bit 63 of the >> virtual address." >> >> Sounds legitimate for now but are we ever going to use more than >> 48-bit virtual addresses in arm64 linux? > > Almost guaranteed I would have thought! > > However since the suggestion is *not* based on the assumption that bits > 63:48 are zero then I don't think this matters. > > It is based on the assumption that bits 63:56 are unknown and cannot be > used for decision making (because tag 0xff is not reserved) and also > that bit 55 is not part of the VA. Bits 54:48 are not involved at all. > > For 52-bit VAs (and any other number of bits <56) the hueristic remains > correct. > > For 56-bit VAs the pointer tagging feature cannot survive without being > changed because with bit 55 allocated there would be no way for the > hardware to discriminate between TTBR0 and TTBR1 pointers either. Thus > whilst I don't deny the possibility that 56-bit addresses may eventually > happen, *any* implementation of pointer tagging support in gdb would > need to be updated at that point anyway. Above discussion seems to have sufficient points in favor of using bit 55 as the indicator bit for pointer tagging on osabi Linux. While we should also remove tagging support from non linux osabi. Lets wait for a final agreement from Pedro on this. > > > Daniel.