From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 117396 invoked by alias); 2 Dec 2016 09:32:07 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 117381 invoked by uid 89); 2 Dec 2016 09:32:06 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.5 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,RCVD_IN_SORBS_SPAM,SPF_PASS autolearn=no version=3.3.2 spammy= X-HELO: mail-lf0-f68.google.com Received: from mail-lf0-f68.google.com (HELO mail-lf0-f68.google.com) (209.85.215.68) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 02 Dec 2016 09:32:05 +0000 Received: by mail-lf0-f68.google.com with SMTP id o20so21507108lfg.3 for ; Fri, 02 Dec 2016 01:32:05 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:sender:in-reply-to:references:from :date:message-id:subject:to:cc; bh=koyxGhbAntDY3O3ZYQ5hMBrl2j7PtMDbMKet1FkcRo0=; b=bE/mWP2gEavxyBiidE6gnyXKkfvI9GW5xB6cBcWjrElvJhxCmH5K7WoDuOrP332OII eFcpUCLJujLDuuMASJS6oa4fIEIcT6eLLc7fyXsDKmkrgdQdRPff+4HB0bRMEF8wiFdy ATD+FHTeSlxyoaZs3JDpy+PWn2M93iw/Qoo574VJnmxxbRjRiaxXrBfw+OFMnQwS1Rg9 uyGtLTRaLAeyEGBU8ShXyHOjsNrRM6KjlA9inRjWyWwDrqSaowL7B9pDor9MtDHTWY8b cJpgos968bjmEt4pNWNnaElvLXR48mSar8Ql+sI2SrWIAiZU8Y7p0oSGHwpx1NB5Tdw1 /fJQ== X-Gm-Message-State: AKaTC01z0i4yJgKyg1un8s8GPTORMW4WLmSguDLcqNDzLLsG/Sq7jb28b8JCt8TVkVYj7kPFA+Lw5IUJwxRtLA== X-Received: by 10.25.204.214 with SMTP id c205mr13697923lfg.107.1480671123320; Fri, 02 Dec 2016 01:32:03 -0800 (PST) MIME-Version: 1.0 Received: by 10.25.7.213 with HTTP; Fri, 2 Dec 2016 01:31:42 -0800 (PST) In-Reply-To: References: From: Mike Frysinger Date: Fri, 02 Dec 2016 09:32:00 -0000 Message-ID: Subject: Re: [PATCH] fix for aarch64 sim tbnz bug To: Jim Wilson Cc: "gdb-patches@sourceware.org" , Nick Clifton Content-Type: text/plain; charset=UTF-8 X-IsSubscribed: yes X-SW-Source: 2016-12/txt/msg00070.txt.bz2 On Thu, Dec 1, 2016 at 11:49 PM, Jim Wilson wrote: > Debugged another gcc testsuite failure, and found that tbnz/tbz are > broken when the bit position to test is greater than 31. There are > two problems. The high bit of the bit position is shifted left by the > wrong amount. And we need to use (uint64_t)1 to get a 64-bit shift > result. > > Tested with a gcc C testsuite run. This reduces failures from 2856 to 2710. can we please start getting tests added to sim too ? using gcc indirectly to validate the sim is a bit un -mike