From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id /h2mJpJje2HLUQAAWB0awg (envelope-from ) for ; Thu, 28 Oct 2021 22:59:30 -0400 Received: by simark.ca (Postfix, from userid 112) id 8E6731F0BB; Thu, 28 Oct 2021 22:59:30 -0400 (EDT) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on simark.ca X-Spam-Level: X-Spam-Status: No, score=-0.4 required=5.0 tests=DKIM_INVALID,DKIM_SIGNED, MAILING_LIST_MULTI,RDNS_DYNAMIC,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id 644C41EE18 for ; Thu, 28 Oct 2021 22:59:29 -0400 (EDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 5687B3857414 for ; Fri, 29 Oct 2021 02:59:28 +0000 (GMT) Received: from mail-io1-xd2e.google.com (mail-io1-xd2e.google.com [IPv6:2607:f8b0:4864:20::d2e]) by sourceware.org (Postfix) with ESMTPS id 847383858C39 for ; Fri, 29 Oct 2021 02:59:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 847383858C39 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=sifive.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=sifive.com Received: by mail-io1-xd2e.google.com with SMTP id v65so10855586ioe.5 for ; Thu, 28 Oct 2021 19:59:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=7xY/3PaK5VtetO+xY9hkcY8m115FBsZlrufzlm78qtE=; b=aLbbDPU+uo6PtCBo0Sky1WkZ5UBuHiZ76r1cYW257mwQjeBASngZVk9PcSVm4gJ/Jy 2WGWQQBO5HGiHsn2AARiSlxkL0AsvO6LXeUb9erRRf7n2BrMC6xcR9pSiiDaMMn/n44p IwHdhUgRqorO/99rLQ5b8afMeAF9C6hFC2JkHI6nuiGfJEL7qaY5K5V1S1TplQ4LrnaL o+ZqTxGsLKqT09ZxpiJPb+JEcUsHyhYptu1bq85muMT8TGOZ+BXcvBr8R36ypOT9kR6z x91lU0kqo9mwue/rrGA3d5tgNahHl8VNCX9sZCqGejbW4vjGWAyHP5Yxi7PzIk3tKYa1 BHDw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=7xY/3PaK5VtetO+xY9hkcY8m115FBsZlrufzlm78qtE=; b=n3dPxvd83UN8UY6ZuZU6Uyy/FWRRSWPg0R0YdoQLxSq7Jymld9S2gY8Xkz3KGmBz2W /l4thF07uoOw33hkeM54V8VX7LgyDoovFCOdIHOdzWJcYFCCzg3yNG9WTdphHA26PW44 orNFvBt0I8+SLlL/HO66F85m1EFsP1lhqO0Tgx//SP7487It/apAzS9YlQvImMNiHyAB pYUqu8L1s0gkQw2f3lf4M8ZCh218FgR6rr7SaFup7WH79YFrY4mIaPgqAWywEgcsCBGo jaVinCSMNFy0t8rtwRdp39Voc9yFP3zQkOW1sAlMnRx2u/uZQWf4Jpon5BXC8Ja4ytLm GnVA== X-Gm-Message-State: AOAM531lpaVTQWzB1wxap9bYev1W5uS2oqcjO1CoyJbesZatYPQcQkZD QjXNnb2YcsV3IYZaDk3H6OAsTB0h5AVVxDwxA79HKI72/AE= X-Google-Smtp-Source: ABdhPJx2fS30VGOgIAGCBqlUPESCOsdQq45vOKQ6fnr/hhsQb5tXRJpei9lmOCY4WBh/Cf7FW4/CBPknHIpghXqUVME= X-Received: by 2002:a05:6638:24cf:: with SMTP id y15mr2255297jat.110.1635476356955; Thu, 28 Oct 2021 19:59:16 -0700 (PDT) MIME-Version: 1.0 References: <20211028205408.2228904-1-vineetg@rivosinc.com> In-Reply-To: <20211028205408.2228904-1-vineetg@rivosinc.com> From: Nelson Chu Date: Fri, 29 Oct 2021 10:59:08 +0800 Message-ID: Subject: Re: [PATCH] sim: riscv: fix build breakage with rvv changes To: Vineet Gupta , gdb-patches@sourceware.org Content-Type: text/plain; charset="UTF-8" X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kito Cheng , Dylan Reid , Binutils Errors-To: gdb-patches-bounces+public-inbox=simark.ca@sourceware.org Sender: "Gdb-patches" Also send this patch to gdb mailing since there should be the right place for the issues of gdb and sim. I'm going to move the rvv stuff from the integration branch back to the mainline, so we should need this in the mainline later. But neither am I the developer or the maintainer of gdb, so we need the gdb experts' help. Thanks Nelson On Fri, Oct 29, 2021 at 4:54 AM Vineet Gupta wrote: > > The vector changes on binutils-integration-branch missed updates > to sim causing build failure when build sim/gdb. > > This patch is only for user/riscv/binutils-integration-branch > > Fixes: 144cceb058e "(RISC-V/rvv: Add rvv v0.10 instructions.)" > Reported-by: Dylan Reid > Signed-off-by: Vineet Gupta > --- > sim/riscv/ChangeLog-2021 | 4 ++++ > sim/riscv/sim-main.c | 3 ++- > 2 files changed, 6 insertions(+), 1 deletion(-) > > diff --git a/sim/riscv/ChangeLog-2021 b/sim/riscv/ChangeLog-2021 > index e9aa74490f12..420b1867913c 100644 > --- a/sim/riscv/ChangeLog-2021 > +++ b/sim/riscv/ChangeLog-2021 > @@ -1,3 +1,7 @@ > +2021-20-28 Vineet Gupta > + > + * sim-main.c (step_once): Fix match_func call per gas changes. > + > 2021-07-01 Mike Frysinger > > * configure: Regenerate. > diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c > index 0faf9395ae52..9b4f7c6c5aad 100644 > --- a/sim/riscv/sim-main.c > +++ b/sim/riscv/sim-main.c > @@ -956,6 +956,7 @@ void step_once (SIM_CPU *cpu) > sim_cia pc = cpu->pc; > const struct riscv_opcode *op; > int xlen = RISCV_XLEN (cpu); > + const char *error = NULL; > > if (TRACE_ANY_P (cpu)) > trace_prefix (sd, cpu, NULL_CIA, pc, TRACE_LINENUM_P (cpu), > @@ -985,7 +986,7 @@ void step_once (SIM_CPU *cpu) > for (; op->name; op++) > { > /* Does the opcode match? */ > - if (! op->match_func (op, iw)) > + if (! op->match_func (op, iw, 0, /* check_constraints */ &error)) > continue; > /* Is this a pseudo-instruction and may we print it as such? */ > if (op->pinfo & INSN_ALIAS) > -- > 2.30.2 >