From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 69108 invoked by alias); 5 Mar 2020 21:51:04 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 69099 invoked by uid 89); 5 Mar 2020 21:51:04 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-4.0 required=5.0 tests=AWL,BAYES_00,FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=no version=3.3.1 spammy=H*MI:sk:CAHEcG9, HX-Languages-Length:1984, D*freebsd.org X-HELO: mail-il1-f195.google.com Received: from mail-il1-f195.google.com (HELO mail-il1-f195.google.com) (209.85.166.195) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 05 Mar 2020 21:51:02 +0000 Received: by mail-il1-f195.google.com with SMTP id o18so122095ilg.10 for ; Thu, 05 Mar 2020 13:51:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=fF3LWiYFAsLlAnY52M4qXvu3qIiAUvHswu6Kw0DXv0E=; b=hBuJi1CODGi+KUSGEYCaHRAcAOhDZmcFfGqKr4kCa085rp1/jnicLu+v0TmPeyvqkA 2LHP6cyfYOFE8XPSNXjc2qYnf3suKlzKlUKXa3vMWs/vCq8xTTJE7dU69u7CZ4P9Z+sV LLsz7MQrTWxOtjFWHfszN45WTXA6Z/hqSvjjmn6x6i+9IVDk5hZr4VDg3deMgqkC80rC WL5QSiKb6m+kFGrfDtcS+bwEOMRTNXQ5nuAg4MAizM5XpGNcjuFAZGJ4RlUYxNOho0Lx 5rzKgXUBmUaHvlCRpDNUiDKlbFSpRhj/WWSY0vjk6UaBXz/vLuvaS22jXRPmleOWNS2F xSpw== MIME-Version: 1.0 References: <20200201184318.25049-1-b7.10110111@gmail.com> In-Reply-To: From: Ruslan Kabatsayev Date: Thu, 05 Mar 2020 21:51:00 -0000 Message-ID: Subject: Re: [PATCH] Fix sizes and types of x86 segment and x87 registers To: John Baldwin Cc: GDB Patches Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes X-SW-Source: 2020-03/txt/msg00130.txt On Fri, 6 Mar 2020 at 00:32, John Baldwin wrote: > > On 2/1/20 10:43 AM, Ruslan Kabatsayev wrote: > > Segment registers are actually 16-bit, and their upper bit doesn't have > > the meaning of sign. Currently GDB instead thinks they are signed > > 32-bit, which makes various debugger front-ends (e.g. QtCreator) display > > them in unnatural format like 00000023. > > > > Similar consideration applies to various x87 non-data registers. In > > addition, fioff and fooff on IA32 are conceptually pointers, so the > > command like "p $fioff" should show them as such, not as decimal > > integers. On x86-64 fioff and fooff are not as straightforward, being > > only the lower parts of the 48-bit offsets, upper part of which is in > > fiseg and foseg, respectively, so this easy type assignment can't be > > done. > > > > This patch fixes types and sizes of these 16-bit registers to unsigned > > 16-bit, and makes types of fioff and fooff on IA32 respectively code_ptr > > and data_ptr (on x86_64 both are made uint32). > > I'd be happy to see these fixed (segment regs in particular), but I had > worried that this might break any debug stubs that aren't using XML target > descriptions to describe the layout of 'g'? I'm not sure what exactly debug stubs you mean and what "layout of 'g'" means (I guess it's about remote debugging?). But since sending this patch I've discovered that it for some reason breaks debugging of some threaded(?) 32-bit apps, giving the following output: [Thread debugging using libthread_db enabled] Using host libthread_db library "/lib/libthread_db.so.1". Cannot find user-level thread for LWP 9577: generic error The culprit appears to be the size of GS register that this patch changes=E2=80=94the register which is used as TLS base. If I revert the cha= nge only to it, this breakage goes away. Do you have any idea where to look for the reason? > > -- > John Baldwin