Re: [RFC 2/3] Record function descriptor address instead of function address in value

Maciej W. Rozycki
2016-10-18T02:27:35Z

On Mon, 17 Oct 2016, Ulrich Weigand wrote:

> > This patch brings several user visible changes, which look more
> > accurate, shown by this table below,
> >
> > COMMAND BEFORE AFTER
> > p main main function address main function descriptor
> > address
> > disass main disassembly function main not changed
> > disass main+4,+4 disassembly 4 bytes from disassembly 4 bytes from
> > function main address + 4 main's function descriptor + 4
> > x/i main show one instruction on show one instruction on main's
> > function main address function descriptor

What about `info address main'?

> > Although the latter looks inconvenient, that is consistent to the
> > meaning on C language level. Due to these changes, test cases are
> > adjusted accordingly.
>
> Those are a bit annoying. I think the underlying problem is that operations
> like "disass" or "x/i" really don't work on "values" in the original sense
> but rather on "PC addresses". Maybe it would make sense to have those
> function enable a special "mode" in the expression evaluator that would
> change the conversion of functions to function pointers to use the code
> address instead of the descriptor address?

Agreed. I'd keep `disass main+4,+4' and `x/i main' (or `x/x main', etc.,
for that matter) as they are now and consistent with `disass main', if
possible. These would indeed have to be special as we don't actually want
to see the ISA bit set in instruction addresses in disassembly either, as
they are interpreted as memory data rather than execution addresses there.

For descriptor access, which may undoubtedly be useful sometimes I'd
suggest using `disass &main+4,+4' and `x/i &main', which would be
consistent with the interpretation of function pointers elsewhere (of
course `p main' and `p &main' would roughly be equivalent). Thoughts?

Overall I like the proposal and if this goes forward I will see if we can
adapt the MIPS backend to use this approach as well, addressing the issues
we still have remaining, such as confusing instruction addresses and wrong
instruction data shown with `disass /r'. We have a little complication in
that we have the ISA bit set in line information, so that would have to be
stripped in DWARF record processing, but it should be much easier to do
with a single hook in place than the complicated processing now required
to copy ISA bit annotation from the symbol table (msymbols), the hooks to
handle which we'll then be able to drop from our DWARF machinery.

Thanks, Yao; also for your persistence with addressing this general issue
in response to my previous critical comments!

Maciej