From: Jim Wilson <jimw@sifive.com>
To: Andrew Burgess <andrew.burgess@embecosm.com>
Cc: gdb-patches@sourceware.org
Subject: Re: [PATCH] RISC-V: Fix xlen to flen typo in FP reg handling.
Date: Sat, 03 Nov 2018 20:14:00 -0000 [thread overview]
Message-ID: <CAFyWVaYmGAhWWZk2T1OSbuhitpJDQM-Fpu5K=qqcTEMgds5EnQ@mail.gmail.com> (raw)
In-Reply-To: <20181103083453.GE16539@embecosm.com>
On Sat, Nov 3, 2018 at 1:34 AM Andrew Burgess
<andrew.burgess@embecosm.com> wrote:
> However, don't worry. I'm currently working on proper target
> description support.
Do you perhaps mean XML register set support? I started working on a
patch for that. This is needed for our OpenOCD and QEMU support.
Meanwhile, I can hold off on this patch.
Jim
prev parent reply other threads:[~2018-11-03 20:14 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-03 3:20 Jim Wilson
2018-11-03 8:35 ` Andrew Burgess
2018-11-03 20:14 ` Jim Wilson [this message]
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