From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 107337 invoked by alias); 14 Dec 2015 17:05:27 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 107327 invoked by uid 89); 14 Dec 2015 17:05:27 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=1.5 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-ob0-f178.google.com Received: from mail-ob0-f178.google.com (HELO mail-ob0-f178.google.com) (209.85.214.178) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Mon, 14 Dec 2015 17:05:18 +0000 Received: by obciw8 with SMTP id iw8so136395056obc.1 for ; Mon, 14 Dec 2015 09:05:16 -0800 (PST) X-Received: by 10.60.63.34 with SMTP id d2mr26576201oes.75.1450112716684; Mon, 14 Dec 2015 09:05:16 -0800 (PST) MIME-Version: 1.0 Received: by 10.76.69.69 with HTTP; Mon, 14 Dec 2015 09:04:57 -0800 (PST) From: Christopher Friedt Date: Mon, 14 Dec 2015 17:05:00 -0000 Message-ID: Subject: cortex-m xml register descriptions for m-system To: gdb-patches@sourceware.org Content-Type: text/plain; charset=UTF-8 X-IsSubscribed: yes X-SW-Source: 2015-12/txt/msg00263.txt.bz2 Hi list, I've been using GDB and OpenOCD to debug ARM Cortex-M devices for quite a while. One thing that I always noticed when using OpenOCD is that the m-system registers are listed, which is *incredibly* useful for writing code on just about any Cortex-M microcontroller. Somewhat recently, Qemu has also begun to support Cortex-M based virtual devices, and it seems to be fairly usable. The down side, is that they do not expose the m-system registers, simply because binutils-gdb does not (at this time) have an XML file for them. Just to catch anyone up to speed who might be reading this, the m-system registers are MSP (main stack pointer) PSP (process stack pointer) PRIMASK (1-bit register that says if interrupts are enabled) BASEPRI (8-bit register that sets the NVIC base priority) FAULTMASK (1-bit register that says if fault interrupts are enabled) CONTROL (3-bit register that indicates presence of FP, whether PSP is selected, and whether running in unprivileged mode) Now, these are "system" registers, and on a full blown microprocessor, it might be unusual to expose them, but on a microcontroller, it's quite important. The other debuggers that I have seen (IAR, specifically) also list the m-system registers along with the general purpose ones for Cortex-M. The following XML is sufficient to describe the m-system registers so that they appear to the GDB client. The first question I would ask for clarification from the binutils-gdb developers, is, which regnum is appropriate to assign to each of those m-system registers? Should these registers enumerate starting with 26 (resuming from the xpsr)? Just for comparison, the current binutils-gdb arm-m-profile.xml is here (https://goo.gl/hpTye8), and the openocd variant is here (http://goo.gl/FFn56X). The second question I would like to ask is, what is the best way to add this XML? Should it 1) Should it be inserted directly into arm-m-profile.xml? 2) Should it be included from arm-m-profile.xml as arm-m-system.xml? IMHO, the 1st or 2nd option would make sense, as all Cortex-M's contain these registers. I'm asking because I have a patch ready to submit for this on a whim's notice, but would just like to get some buy-in ahead of time. C