From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 16227 invoked by alias); 5 Feb 2017 01:55:21 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 14440 invoked by uid 89); 5 Feb 2017 01:55:20 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 spammy=Wilson, 2096, HX-HELO:sk:mail-yw, 0xe X-HELO: mail-yw0-f170.google.com Received: from mail-yw0-f170.google.com (HELO mail-yw0-f170.google.com) (209.85.161.170) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Sun, 05 Feb 2017 01:55:10 +0000 Received: by mail-yw0-f170.google.com with SMTP id u68so32641830ywg.0 for ; Sat, 04 Feb 2017 17:55:10 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=9iuaU98l2Mow51ieYzCdh6LnmZb4ogeYAMZdwWtH05U=; b=rF8F/+HfXzH1NmQMJ3fmsbEIAoX2KCfq/n2KPyuus2pd6PgLCQhStU8YMPknSraPmE BCaT9Xwk5Zu5LazbYW6eGjvn2b+P8+k5A7ZX04LT2nlj7QXNhjc9+c5MA8d4qTG7GmvV Ettxvn1sfrxax5j9CYBhzio7Nw4eN2jQA3EIkQMnznZK5jGPSmeVDbwGT/wXTYfopLEF 4JO8xXS1c73NNP/BzxGqSIWM2rB+Ag1D5ZBKe1Eq7+QjU7hxj1Aj9JitDjjeqOHKto3G pYqW/5mWAHWLOZvbJXNaf+b/KwNGKJFXLTeTGvluYyJ3Ky5zGrQyTFz89hUbeWWCMNgB sN1Q== X-Gm-Message-State: AIkVDXKIqeBhm2LtmcYqpki0woTGq4LAZPUD60FBAtU3bPyYUaJOYHLAmbi/78xFNHbgR53BuDmlPykXYKGeMRJJ X-Received: by 10.129.123.197 with SMTP id w188mr2771431ywc.267.1486259708623; Sat, 04 Feb 2017 17:55:08 -0800 (PST) MIME-Version: 1.0 Received: by 10.129.37.1 with HTTP; Sat, 4 Feb 2017 17:55:08 -0800 (PST) In-Reply-To: References: From: Jim Wilson Date: Sun, 05 Feb 2017 01:55:00 -0000 Message-ID: Subject: Re: [PATCH] aarch64 sim load/store single struct implementation w/ ldnr bug fixes To: gdb-patches@sourceware.org Cc: Nick Clifton Content-Type: text/plain; charset=UTF-8 X-SW-Source: 2017-02/txt/msg00109.txt.bz2 Ping. Forgot to cc Nick the first time. See https://sourceware.org/ml/gdb-patches/2017-01/msg00638.html for the attachment. Jim On Sat, Jan 28, 2017 at 4:01 PM, Jim Wilson wrote: > This started as an attempt to implement one of the missing load single > struct to one lane instructions, and by the time I figured out how get > ti right, it turned out to be simpler to just add all of the missing > ASIMD load and store instructions at the same time. So this is a > larger patch than my previous ones. > > The bulk of the changes involve handling instruction bit 24 correctly > in do_vec_load_store, by loading it into a variable called single, and > changing code to use it, calling new functions for the ldn single and > stn single instructions. This required re-indenting some code. The > existing ldnr support is for instructions with this bit set, so had to > be moved inside the new single support. Since I'm implementing all of > the missing ASIMD load and store instructions here, I changed a number > of HALT_NYI calls to HALT_UNALLOC. > > While doing this, I managed to find 4 bugs in the ldnr support. In > do_vec_LDnR, there are loops using i, but only the loops in case 0 > actually use i inside the loop. Cases 1 through 3 are broken. I > fixed this by replacing the switch with a loop, which also allows me > to remove a lot of duplicated code. As a result, I'm removing almost > as many lines as I'm adding. In do_vec_load_store, there is a check > that is using 0xE twice instead of 0xC and 0xE. This is fixed by > using the new single var instead. In the post indexed addressing mode > code, the 0xE case has 4 and 8 when it should be using 3 and 4 as > these are register counts not data sizes. Also here, the multiply by > 2 when full is set is wrong for ldnr, but this is fixed by moving it > into the new single code. > > I added testcases for the ldn single and stn single instruction > support that is new, and for the ldnr instruction support that is > being fixed by this patch. The new testcases fail without the patch, > and work with the patch. The GCC C testsuite unexpected failures drop > from 2096 to 1701 (-395). > > Jim