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From: James Bowman <james.bowman@ftdichip.com>
To: "gdb-patches@sourceware.org" <gdb-patches@sourceware.org>
Subject: [PATCH, FT32] sim: correct simulation of MEMCPY and MEMSET
Date: Tue, 29 Sep 2015 23:48:00 -0000	[thread overview]
Message-ID: <CA9BBF0458F83C4F9051448B941B57D11A267D50@glaexch1> (raw)

The MEMCPY and MEMSET instructions should only examine the low 15 bits of
their length arguments.

OK to apply?

[sim/ft32]

2015-09-28  James Bowman  <james.bowman@ftdichip.com>

	* interp.c (step_once): correct length for MEMSET and MEMCPY
	instructions.

diff --git a/sim/ft32/interp.c b/sim/ft32/interp.c
index a20907c..ed50b0e 100644
--- a/sim/ft32/interp.c
+++ b/sim/ft32/interp.c
@@ -598,7 +598,7 @@ step_once (SIM_DESC sd)
 	    uint32_t src = r_1v;
 	    uint32_t dst = cpu->state.regs[r_d];
 	    uint32_t i;
-	    for (i = 0; i < rimmv; i++)
+	    for (i = 0; i < (rimmv & 0x7fff); i++)
 	      PUT_BYTE (dst + i, GET_BYTE (src + i));
 	  }
 	  break;
@@ -617,7 +617,7 @@ step_once (SIM_DESC sd)
 	    /* memset instruction.  */
 	    uint32_t dst = cpu->state.regs[r_d];
 	    uint32_t i;
-	    for (i = 0; i < rimmv; i++)
+	    for (i = 0; i < (rimmv & 0x7fff); i++)
 	      PUT_BYTE (dst + i, r_1v);
 	  }
 	  break;


             reply	other threads:[~2015-09-29 23:48 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-29 23:48 James Bowman [this message]
2015-09-30  3:40 ` Mike Frysinger

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