From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 4885 invoked by alias); 8 Jan 2013 10:02:27 -0000 Received: (qmail 4863 invoked by uid 22791); 8 Jan 2013 10:02:23 -0000 X-SWARE-Spam-Status: No, hits=-4.7 required=5.0 tests=AWL,BAYES_00,KHOP_RCVD_UNTRUST,KHOP_THREADED,RCVD_IN_HOSTKARMA_NO,RCVD_IN_HOSTKARMA_W,RCVD_IN_HOSTKARMA_WL,RCVD_IN_HOSTKARMA_YE,TW_EG,TW_PV X-Spam-Check-By: sourceware.org Received: from tx2ehsobe003.messaging.microsoft.com (HELO tx2outboundpool.messaging.microsoft.com) (65.55.88.13) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 08 Jan 2013 10:02:07 +0000 Received: from mail177-tx2-R.bigfish.com (10.9.14.246) by TX2EHSOBE002.bigfish.com (10.9.40.22) with Microsoft SMTP Server id 14.1.225.23; Tue, 8 Jan 2013 10:02:06 +0000 Received: from mail177-tx2 (localhost [127.0.0.1]) by mail177-tx2-R.bigfish.com (Postfix) with ESMTP id 6613F20153; Tue, 8 Jan 2013 10:02:06 +0000 (UTC) X-Forefront-Antispam-Report: CIP:59.163.77.45;KIP:(null);UIP:(null);IPV:NLI;H:KCHJEXHC01.kpit.com;RD:59.163.77.45.static.vsnl.net.in;EFVD:NLI X-SpamScore: 1 X-BigFish: VPS1(zz936eIc85fh154dIc8kzz1de0h1202h1e76h1d1ah1d2ahzz8275bh8275dh177df4h17326ahz2dh2a8h668h839hd25hf0ah1288h12a5h12bdh137ah1441h14ddh1504h1537h153bh15d0h162dh1631h1758h34h1155h) Received: from mail177-tx2 (localhost.localdomain [127.0.0.1]) by mail177-tx2 (MessageSwitch) id 1357639321710307_7199; Tue, 8 Jan 2013 10:02:01 +0000 (UTC) Received: from TX2EHSMHS028.bigfish.com (unknown [10.9.14.235]) by mail177-tx2.bigfish.com (Postfix) with ESMTP id A85AD60049; Tue, 8 Jan 2013 10:02:01 +0000 (UTC) Received: from KCHJEXHC01.kpit.com (59.163.77.45) by TX2EHSMHS028.bigfish.com (10.9.99.128) with Microsoft SMTP Server (TLS) id 14.1.225.23; Tue, 8 Jan 2013 10:01:59 +0000 Received: from KCHJEXMB02.kpit.com ([169.254.2.126]) by KCHJEXHC01.kpit.com ([172.10.15.73]) with mapi id 14.02.0247.003; Tue, 8 Jan 2013 15:31:56 +0530 From: Kaushik Phatak To: Joel Brobecker CC: "gdb-patches@sourceware.org" , "binutils@sourceware.org" , Pedro Alves , Yao Qi , nick clifton , Tom Tromey Subject: RE: [RFA 3/5] New port: CR16: gdb port Date: Tue, 08 Jan 2013 10:02:00 -0000 Message-ID: References: <507279C7.8080401@codesourcery.com> <20121022224107.GB3713@adacore.com> <20121023135502.GA3555@adacore.com> <20121115174313.GC3790@adacore.com> <20121122175010.GG9964@adacore.com> In-Reply-To: <20121122175010.GG9964@adacore.com> Content-Type: multipart/mixed; boundary="_002_C6CA53A2A46BA7469348BDBD663AB65848565AB5KCHJEXMB02kpitc_" MIME-Version: 1.0 X-OriginatorOrg: kpitcummins.com Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2013-01/txt/msg00124.txt.bz2 --_002_C6CA53A2A46BA7469348BDBD663AB65848565AB5KCHJEXMB02kpitc_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Content-length: 34114 Hi Joel, Thanks for your review and helpful feedback on this port. > A couple of very very minor nits. Pre-approved with the changes > requested below. Once you get approval for the BFD bits, you may > commit this patch. The BFD related changes have been approved and checked in, http://sourceware.org/ml/gdb-patches/2013-01/msg00105.html The exported names have been prefixed by 'cr16_' as requested by Pedro and = Tom. These changes are also reflected in cr16-tdep.c which uses these variables and functions. The below patch is updated from the last post as below, - Fixed the requested formatting bits - Re-based it against the latest snapshot, gdb-7.5.50.20130108. - Use the new prefixed names for exported variables and functions - Set the Copyright year to 2013 The only part which is still under the scanner is my gdbserver port.=20 Pedro had some concerns about my usage of pseudo registers in this=20 port in 'gdb/regformats/reg-cr16.dat', http://sourceware.org/ml/gdb-patches/2012-12/msg00513.html I have tried to provide my justifications here, http://sourceware.org/ml/gdb-patches/2012-12/msg00832.html If Pedro is happy, I may not need to make further changes to the below=20 host side GDB patch. Please let me know if the below patch (also attached) can be committed. I do not have check-in rights here. Thanks & Best Regards, Kaushik 2013-01-08 Kaushik Phatak gdb/Changelog * configure.tgt: Handle cr16*-*-*linux and cr16*-*-*. * cr16-linux-tdep.c: New file. * cr16-tdep.c: New file. * cr16-tdep.h: New file. diff -uprN ./gdb_src.orig/gdb/configure.tgt ./gdb_src/gdb/configure.tgt --- ./gdb_src.orig/gdb/configure.tgt 2012-12-18 20:22:58.000000000 +0530 +++ ./gdb_src/gdb/configure.tgt 2013-01-08 12:56:31.000000000 +0530 @@ -116,6 +116,18 @@ bfin-*-*) gdb_sim=3D../sim/bfin/libsim.a ;; =20 +cr16*-*-*linux) + # Target: CR16 processor + gdb_target_obs=3D"cr16-tdep.o cr16-linux-tdep.o linux-tdep.o" + gdb_sim=3D../sim/cr16/libsim.a + ;; + +cr16*-*-*) + # Target: CR16 processor + gdb_target_obs=3D"cr16-tdep.o" + gdb_sim=3D../sim/cr16/libsim.a + ;; + cris*) # Target: CRIS gdb_target_obs=3D"cris-tdep.o solib-svr4.o" diff -uprN ./gdb_src.orig/gdb/cr16-linux-tdep.c ./gdb_src/gdb/cr16-linux-td= ep.c --- ./gdb_src.orig/gdb/cr16-linux-tdep.c 1970-01-01 05:30:00.000000000 +0530 +++ ./gdb_src/gdb/cr16-linux-tdep.c 2013-01-08 12:59:27.000000000 +0530 @@ -0,0 +1,107 @@ +/* Target-dependent code for GNU/Linux on the Sitel CR16 processors. + + Copyright (C) 2013 Free Software Foundation, Inc. + + Contributed by Kaushik Phatak (kaushik.phatak@kpitcummins.com) + KPIT Cummins Infosystems Limited, Pune India. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . = */ + +#include "defs.h" +#include "osabi.h" +#include "elf-bfd.h" +#include "elf/cr16.h" +#include "linux-tdep.h" +#include "symtab.h" +#include "cr16-tdep.h" + +/* Number of registers available for Linux targets */ +#define CR16_LINUX_NUM_REGS 21 + +/* The breakpoint instruction used by uClinux target */ +static const gdb_byte breakpoint_uclinux[] =3D { 0xC7, 0x00 }; + +static const char *const reg_names[] =3D +{ + "r0", + "r1", + "r2", + "r3", + "r4", + "r5", + "r6", + "r7", + "r8", + "r9", + "r10", + "r11", + "r12", + "r13", + "ra", + "psr", + "pc", + "r0r1_orig", + "intbase", + "usp", + "cfg" +}; + +/* Verify register array size is within hardware register limit. */ + +gdb_static_assert (ARRAY_SIZE (reg_names) <=3D CR16_LINUX_NUM_REGS); + +/* Implement the "register_name" gdbarch method. */ + +static const char * +cr16_linux_register_name (struct gdbarch *gdbarch, int regnr) +{ + gdb_assert (regnr >=3D 0 && regnr < CR16_LINUX_NUM_REGS); + return reg_names[regnr]; +} + +/* OS specific initialization of gdbarch. */ + +static void +cr16_uclinux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) +{ + struct gdbarch_tdep *tdep =3D gdbarch_tdep (gdbarch); + + linux_init_abi (info, gdbarch); + + set_gdbarch_num_regs (gdbarch, CR16_LINUX_NUM_REGS); + set_gdbarch_register_name (gdbarch, cr16_linux_register_name); + + /* The opcode of excp bpt is 0x00C8, however for uclinux we will + use the excp flg (0x00C7) to insert a breakpoint. The excp bpt + requires external hardware support for breakpoints to work on + CR16 target. Software based breakpoints are implemented in the + kernel using excp flg and tested on the SC14452 target. Use + 0x00C7 with gdbserver/kernel and 0x00C8 for sim/ELF. We + represent the breakpoint in little endian format since CR16 + supports only little endian. */ + tdep->breakpoint =3D breakpoint_uclinux; + +} + +/* Provide a prototype to silence -Wmissing-prototypes. */ +extern initialize_file_ftype _initialize_cr16_linux_tdep; + +void +_initialize_cr16_linux_tdep (void) +{ + gdbarch_register_osabi (bfd_arch_cr16, 0, GDB_OSABI_LINUX, + cr16_uclinux_init_abi); +} diff -uprN ./gdb_src.orig/gdb/cr16-tdep.c ./gdb_src/gdb/cr16-tdep.c --- ./gdb_src.orig/gdb/cr16-tdep.c 1970-01-01 05:30:00.000000000 +0530 +++ ./gdb_src/gdb/cr16-tdep.c 2013-01-08 12:59:13.000000000 +0530 @@ -0,0 +1,896 @@ +/* Target-dependent code for the Sitel CR16 for GDB, the GNU debugger. +=20 + Copyright (C) 2013 Free Software Foundation, Inc. +=20 + Contributed by Kaushik Phatak (kaushik.phatak@kpitcummins.com) + KPIT Cummins Infosystems Limited, Pune India. + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. +=20 + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. +=20 + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#include "defs.h" +#include "arch-utils.h" +#include "prologue-value.h" +#include "target.h" +#include "regcache.h" +#include "opcode/cr16.h" +#include "dis-asm.h" +#include "gdbtypes.h" +#include "frame.h" +#include "frame-unwind.h" +#include "frame-base.h" +#include "value.h" +#include "gdbcore.h" +#include "dwarf2-frame.h" +#include "gdb/sim-cr16.h" +#include "elf/cr16.h" +#include "elf-bfd.h" +#include "osabi.h" +#include "cr16-tdep.h" + +/* Number of registers available for ELF targets. */ +#define CR16_NUM_REGS 22 + +/* The breakpoint instruction used with sim for ELF targets. */ +static const gdb_byte breakpoint_elf[] =3D { 0xC8, 0x00 }; + +/* Certain important register numbers. */ +enum +{ + CR16_R0_REGNUM =3D 0, + CR16_R7_REGNUM =3D 7, + CR16_R12_REGNUM =3D 12, + CR16_FP_REGNUM =3D 13, + CR16_RA_REGNUM =3D 14, + CR16_SP_REGNUM =3D 15, + CR16_PC_REGNUM =3D 16, +}; + +/* This structure holds the results of a prologue analysis. */ +struct cr16_prologue +{ + /* The offset from the frame base to the stack pointer --- always + zero or negative. + + Calling this a "size" is a bit misleading, but given that the + stack grows downwards, using offsets for everything keeps one + from going completely sign-crazy: you never change anything's + sign for an ADD instruction; always change the second operand's + sign for a SUB instruction; and everything takes care of + itself. */ + int frame_size; + + /* Non-zero if this function has initialized the frame pointer from + the stack pointer, zero otherwise. */ + int has_frame_ptr; + + /* If has_frame_ptr is non-zero, this is the offset from the frame + base to where the frame pointer points. This is always zero or + negative. */ + int frame_ptr_offset; + + /* The address of the first instruction at which the frame has been + set up and the arguments are where the debug info says they are + --- as best as we can tell. */ + CORE_ADDR prologue_end; + + /* reg_offset[R] is the offset from the CFA at which register R is + saved, or 1 if register R has not been saved. (Real values are + always zero or negative.) */ + int reg_offset[CR16_NUM_REGS]; +}; + +/* Hardware register name declaration. */ +static const char *const reg_names[] =3D +{ + "r0", + "r1", + "r2", + "r3", + "r4", + "r5", + "r6", + "r7", + "r8", + "r9", + "r10", + "r11", + "r12", + "r13", + "ra", + "sp", + "pc", + "isp", + "usp", + "intbase", + "psr", + "cfg" +}; + +/* Verify register array size is within hardware register limit. */ + +gdb_static_assert (ARRAY_SIZE (reg_names) <=3D CR16_NUM_REGS); + +/* Implement the "register_name" gdbarch method. */ + +static const char * +cr16_register_name (struct gdbarch *gdbarch, int regnr) +{ + gdb_assert (regnr >=3D 0 && regnr < CR16_NUM_REGS); + return reg_names[regnr]; +} + +/* Implement the "register_type" gdbarch method. */ + +static struct type * +cr16_register_type (struct gdbarch *gdbarch, int reg_nr) +{ + switch (reg_nr) + { + case CR16_PC_REGNUM: /* Note: PC in CR16 is of 24 bits. */ + return builtin_type (gdbarch)->builtin_func_ptr; + + case CR16_RA_REGNUM: /* Return address reg. */ + return builtin_type (gdbarch)->builtin_data_ptr; + break; + + case CR16_FP_REGNUM: /* Frame Pointer reg. */ + case CR16_SP_REGNUM: /* Stack Pointer reg. */ + return builtin_type (gdbarch)->builtin_data_ptr; + break; + + case SIM_CR16_ISP_REGNUM: + case SIM_CR16_USP_REGNUM: + case SIM_CR16_INTBASE_REGNUM: + case SIM_CR16_PSR_REGNUM: + case SIM_CR16_CFG_REGNUM: + return builtin_type (gdbarch)->builtin_int32; + break; + + case SIM_CR16_R0_REGNUM: + case SIM_CR16_R1_REGNUM: + case SIM_CR16_R2_REGNUM: + case SIM_CR16_R3_REGNUM: + case SIM_CR16_R4_REGNUM: + case SIM_CR16_R5_REGNUM: + case SIM_CR16_R6_REGNUM: + case SIM_CR16_R7_REGNUM: + case SIM_CR16_R8_REGNUM: + case SIM_CR16_R9_REGNUM: + case SIM_CR16_R10_REGNUM: + case SIM_CR16_R11_REGNUM: + return builtin_type (gdbarch)->builtin_int16; + break; + + case SIM_CR16_R12_REGNUM: + return builtin_type (gdbarch)->builtin_int32; + break; + + default: + return builtin_type (gdbarch)->builtin_int32; + break; + } +} + +/* Function for finding saved registers in a 'struct pv_area'; this + function is passed to pv_area_scan. + + If VALUE is a saved register, ADDR says it was saved at a constant + offset from the frame base, and SIZE indicates that the whole + register was saved, record its offset. */ + +static void +check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t val= ue) +{ + struct cr16_prologue *result =3D (struct cr16_prologue *) result_untyped; + + if (value.kind =3D=3D pvk_register + && value.k =3D=3D 0 + && pv_is_register (addr, CR16_SP_REGNUM) + && size =3D=3D register_size (target_gdbarch(), value.reg)) + result->reg_offset[value.reg] =3D addr.k; +} + +/* Define a "handle" struct for fetching the next opcode. */ + +struct cr16_get_opcode_byte_handle +{ + CORE_ADDR pc; +}; + +/* Analyze a prologue starting at START_PC, going no further than + LIMIT_PC. Fill in RESULT as appropriate. */ + +static void +cr16_analyze_prologue (CORE_ADDR start_pc, + CORE_ADDR limit_pc, struct cr16_prologue *result) +{ + CORE_ADDR pc, next_pc; + gdb_byte insn_byte1, insn_byte2; + int rn; + int length; + pv_t reg[CR16_NUM_REGS]; + struct pv_area *stack; + struct cleanup *back_to; + CORE_ADDR after_last_frame_setup_insn =3D start_pc; + int is_decoded; + + memset (result, 0, sizeof (*result)); + + for (rn =3D 0; rn < CR16_NUM_REGS; rn++) + { + reg[rn] =3D pv_register (rn, 0); + result->reg_offset[rn] =3D 1; + } + + stack =3D make_pv_area (CR16_SP_REGNUM, gdbarch_addr_bit (target_gdbarch= ())); + back_to =3D make_cleanup_free_pv_area (stack); + + pc =3D start_pc; + while (pc < limit_pc) + { + gdb_byte buf[6]; + + /* Read 6 bytes, max 48 bit opcode. */ + target_read_memory (pc, buf, 6); + cr16_words[0] =3D buf[1] << 8 | buf[0]; + cr16_words[1] =3D buf[3] << 8 | buf[2]; + cr16_words[2] =3D buf[5] << 8 | buf[4]; + cr16_allWords =3D (((ULONGLONG) cr16_words[0] << 32) + + ((ULONGLONG) cr16_words[1] << 16) + + cr16_words[2]); + + /* Find a matching opcode in table. + Nonzero means instruction has a match. */ + is_decoded =3D cr16_match_opcode (); + cr16_make_instruction (); + length =3D cr16_currInsn.size; + next_pc =3D pc + length; + insn_byte1 =3D (cr16_words[0] >> 8) & 0xFF; + + /* If PUSH, then save RA and other regs. */ + if (insn_byte1 =3D=3D 0x01) + { + int r1, r2; + int r; + + insn_byte2 =3D cr16_words[0]; + + if (insn_byte2 & 0x80) + { + reg[CR16_SP_REGNUM] =3D pv_add_constant (reg[CR16_SP_REGNUM], -4); + pv_area_store (stack, reg[CR16_SP_REGNUM], 4, + reg[CR16_RA_REGNUM]); + } + /* Start Register=3Dr1, 3 bit imm count=3Dr2. */ + r1 =3D insn_byte2 & 0x0F; + r2 =3D ((insn_byte2 & 0x70) >> 4); + r2 =3D r2 + r1 + 1; + + for (r =3D r1; r < r2; r++) + { + if (r >=3D CR16_R12_REGNUM) + { + reg[CR16_SP_REGNUM] =3D + pv_add_constant (reg[CR16_SP_REGNUM], -4); + pv_area_store (stack, reg[CR16_SP_REGNUM], 4, reg[r]); + r++; + } + else + { + reg[CR16_SP_REGNUM] =3D + pv_add_constant (reg[CR16_SP_REGNUM], -2); + pv_area_store (stack, reg[CR16_SP_REGNUM], 2, reg[r]); + } + } + after_last_frame_setup_insn =3D next_pc; + } + /* Add constant to SP. */ + else if (insn_byte1 =3D=3D 0x60) + { + int rdst; + signed short addend; + + insn_byte2 =3D cr16_words[0]; + rdst =3D insn_byte2 & 0x0F; + if (rdst =3D=3D CR16_SP_REGNUM) + { + if (length =3D=3D 2) + { + addend =3D (insn_byte2 & 0xF0) >> 4; + reg[rdst] =3D pv_add_constant (reg[rdst], addend); + } + if (length =3D=3D 4) + { + addend =3D cr16_words[1]; + reg[rdst] =3D pv_add_constant (reg[rdst], addend); + } + after_last_frame_setup_insn =3D next_pc; + } + } + /* Check for MOVD insn. */ + else if (insn_byte1 =3D=3D 0x55) + { + int rdst, rsrc; + + insn_byte2 =3D cr16_words[0]; + rsrc =3D (insn_byte2 & 0xF0) >> 4; + rdst =3D (insn_byte2 & 0x0F); + reg[rdst] =3D reg[rsrc]; + if (rsrc =3D=3D CR16_SP_REGNUM && rdst =3D=3D CR16_FP_REGNUM) + after_last_frame_setup_insn =3D next_pc; + } + else if (((insn_byte1 >> 4) & 0x0F) =3D=3D 0xd) + { + /* This moves an argument register to the stack. Don't + record it, but allow it to be a part of the prologue. */ + after_last_frame_setup_insn =3D next_pc; + } + else + break; /* Terminate the prologue scan. */ + + pc =3D next_pc; + } + + /* Is the frame size (offset, really) a known constant? */ + if (pv_is_register (reg[CR16_SP_REGNUM], CR16_SP_REGNUM)) + result->frame_size =3D reg[CR16_SP_REGNUM].k; + + /* Was the frame pointer initialized? */ + if (pv_is_register (reg[CR16_FP_REGNUM], CR16_SP_REGNUM)) + { + result->has_frame_ptr =3D 1; + result->frame_ptr_offset =3D reg[CR16_FP_REGNUM].k; + } + + /* Record where all the registers were saved. */ + pv_area_scan (stack, check_for_saved, (void *) result); + + result->prologue_end =3D after_last_frame_setup_insn; + do_cleanups (back_to); +} + + +/* Implement the "skip_prologue" gdbarch method. */ + +static CORE_ADDR +cr16_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) +{ + const char *name; + CORE_ADDR func_addr, func_end; + struct cr16_prologue p; + + /* Try to find the extent of the function that contains PC. */ + if (!find_pc_partial_function (pc, &name, &func_addr, &func_end)) + return pc; + + cr16_analyze_prologue (pc, func_end, &p); + return p.prologue_end; +} + +/* Given a frame described by THIS_FRAME, decode the prologue of its + associated function if there is not cache entry as specified by + THIS_PROLOGUE_CACHE. Save the decoded prologue in the cache and + return that struct as the value of this function. */ + +static struct cr16_prologue * +cr16_analyze_frame_prologue (struct frame_info *this_frame, + void **this_prologue_cache) +{ + if (*this_prologue_cache) + return *this_prologue_cache; + + CORE_ADDR func_start, stop_addr; + + *this_prologue_cache =3D FRAME_OBSTACK_ZALLOC (struct cr16_prologue); + func_start =3D get_frame_func (this_frame); + stop_addr =3D get_frame_pc (this_frame); + + /* If we couldn't find any function containing the PC, then + just initialize the prologue cache, but don't do anything. */ + if (!func_start) + stop_addr =3D func_start; + + cr16_analyze_prologue (func_start, stop_addr, *this_prologue_cache); + + return *this_prologue_cache; +} + +/* Given the next frame and a prologue cache, return this frame's + base. */ + +static CORE_ADDR +cr16_frame_base (struct frame_info *this_frame, void **this_prologue_cache) +{ + struct cr16_prologue *p + =3D cr16_analyze_frame_prologue (this_frame, this_prologue_cache); + + /* In functions that use alloca, the distance between the stack + pointer and the frame base varies dynamically, so we can't use + the SP plus static information like prologue analysis to find the + frame base. However, such functions must have a frame pointer, + to be able to restore the SP on exit. So whenever we do have a + frame pointer, use that to find the base. */ + if (p->has_frame_ptr) + { + CORE_ADDR fp =3D get_frame_register_unsigned (this_frame, CR16_FP_RE= GNUM); + + return fp - p->frame_ptr_offset; + } + else + { + CORE_ADDR sp =3D get_frame_register_unsigned (this_frame, CR16_SP_RE= GNUM); + + return sp - p->frame_size; + } +} + +/* Implement the "frame_this_id" method for unwinding frames. */ + +static void +cr16_frame_this_id (struct frame_info *this_frame, + void **this_prologue_cache, struct frame_id *this_id) +{ + *this_id =3D + frame_id_build (cr16_frame_base (this_frame, this_prologue_cache), + get_frame_func (this_frame)); +} + +/* Implement the "frame_prev_register" method for unwinding frames. */ + +static struct value * +cr16_frame_prev_register (struct frame_info *this_frame, + void **this_prologue_cache, int regnum) +{ + struct cr16_prologue *p =3D + cr16_analyze_frame_prologue (this_frame, this_prologue_cache); + CORE_ADDR frame_base =3D cr16_frame_base (this_frame, this_prologue_cach= e); + + if (regnum =3D=3D CR16_SP_REGNUM) + return frame_unwind_got_constant (this_frame, regnum, frame_base); + + /* The call instruction has saved the return address on the RA + register, CR16_R13_REGNUM. So, we need not adjust anything + directly. We will analyze prologue as this RA register is + pushed onto stack for further leaf function calls to work. */ + else if (regnum =3D=3D CR16_PC_REGNUM) + { + ULONGEST ra_prev; + + ra_prev =3D frame_unwind_register_unsigned (this_frame, CR16_RA_REGN= UM); + ra_prev =3D ra_prev << 1; + return frame_unwind_got_constant (this_frame, CR16_PC_REGNUM, ra_pre= v); + } + + /* If prologue analysis says we saved this register somewhere, + return a description of the stack slot holding it. */ + else if (p->reg_offset[regnum] !=3D 1) + return frame_unwind_got_memory (this_frame, regnum, + frame_base + p->reg_offset[regnum]); + + /* Otherwise, presume we haven't changed the value of this + register, and get it from the next frame. */ + else + return frame_unwind_got_register (this_frame, regnum, regnum); +} + +static const struct frame_unwind cr16_frame_unwind =3D +{ + NORMAL_FRAME, + default_frame_unwind_stop_reason, + cr16_frame_this_id, + cr16_frame_prev_register, + NULL, + default_frame_sniffer +}; + +/* Implement the "unwind_pc" gdbarch method. */ + +static CORE_ADDR +cr16_unwind_pc (struct gdbarch *gdbarch, struct frame_info *this_frame) +{ + CORE_ADDR pc; + + pc =3D frame_unwind_register_unsigned (this_frame, CR16_PC_REGNUM); + return pc; +} + +/* Implement the "unwind_sp" gdbarch method. */ + +static CORE_ADDR +cr16_unwind_sp (struct gdbarch *gdbarch, struct frame_info *this_frame) +{ + CORE_ADDR sp; + + sp =3D frame_unwind_register_unsigned (this_frame, CR16_SP_REGNUM); + return sp; +} + +/* Implement the "dummy_id" gdbarch method. */ + +static struct frame_id +cr16_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) +{ + return + frame_id_build (get_frame_register_unsigned (this_frame, CR16_SP_REGNU= M), + get_frame_pc (this_frame)); +} + +/* Implement the "push_dummy_call" gdbarch method. */ + +static CORE_ADDR +cr16_push_dummy_call (struct gdbarch *gdbarch, struct value *function, + struct regcache *regcache, CORE_ADDR bp_addr, int nargs, + struct value **args, CORE_ADDR sp, int struct_return, + CORE_ADDR struct_addr) +{ + enum bfd_endian byte_order =3D gdbarch_byte_order (gdbarch); + int write_pass; + int sp_off =3D 0; + CORE_ADDR cfa; + int num_register_candidate_args; + + struct type *func_type =3D value_type (function); + + /* Dereference function pointer types. */ + while (TYPE_CODE (func_type) =3D=3D TYPE_CODE_PTR) + func_type =3D TYPE_TARGET_TYPE (func_type); + + /* The end result had better be a function or a method. */ + gdb_assert (TYPE_CODE (func_type) =3D=3D TYPE_CODE_FUNC + || TYPE_CODE (func_type) =3D=3D TYPE_CODE_METHOD); + + /* Functions with a variable number of arguments have all of their + variable arguments and the last non-variable argument passed + on the stack. + + Otherwise, we can pass up to four arguments on the stack. + + Once computed, we leave this value alone. I.e. we don't update + it in case of a struct return going in a register or an argument + requiring multiple registers, etc. We rely instead on the value + of the ``arg_reg'' variable to get these other details correct. */ + + if (TYPE_VARARGS (func_type)) + num_register_candidate_args =3D TYPE_NFIELDS (func_type) - 1; + else + num_register_candidate_args =3D 4; + + /* We make two passes; the first does the stack allocation, + the second actually stores the arguments. */ + for (write_pass =3D 0; write_pass <=3D 1; write_pass++) + { + int i; + int arg_reg =3D CR16_R0_REGNUM; + + if (write_pass) + sp =3D align_down (sp - sp_off, 4); + sp_off =3D 0; + + if (struct_return) + { + struct type *return_type =3D TYPE_TARGET_TYPE (func_type); + + gdb_assert (TYPE_CODE (return_type) =3D=3D TYPE_CODE_STRUCT + || TYPE_CODE (func_type) =3D=3D TYPE_CODE_UNION); + + if (TYPE_LENGTH (return_type) > 16 + || TYPE_LENGTH (return_type) % 4 !=3D 0) + { + if (write_pass) + regcache_cooked_write_unsigned (regcache, CR16_R12_REGNUM, + struct_addr); + } + } + + /* Push the arguments. */ + for (i =3D 0; i < nargs; i++) + { + struct value *arg =3D args[i]; + const gdb_byte *arg_bits =3D value_contents_all (arg); + struct type *arg_type =3D check_typedef (value_type (arg)); + ULONGEST arg_size =3D TYPE_LENGTH (arg_type); + + if (i =3D=3D 0 && struct_addr !=3D 0 && !struct_return + && TYPE_CODE (arg_type) =3D=3D TYPE_CODE_PTR + && extract_unsigned_integer (arg_bits, 4, + byte_order) =3D=3D struct_addr) + { + /* This argument represents the address at which C++ (and + possibly other languages) store their return value. + Put this value in R12. */ + if (write_pass) + regcache_cooked_write_unsigned (regcache, CR16_R12_REGNUM, + struct_addr); + } + else if (TYPE_CODE (arg_type) !=3D TYPE_CODE_STRUCT + && TYPE_CODE (arg_type) !=3D TYPE_CODE_UNION) + { + /* Argument is a scalar. */ + if (arg_size =3D=3D 8) + { + if (i < num_register_candidate_args + && arg_reg <=3D CR16_R7_REGNUM - 1) + { + /* If argument registers are going to be used to pass + an 8 byte scalar, the ABI specifies that two registers + must be available. */ + if (write_pass) + { + regcache_cooked_write_unsigned (regcache, arg_reg, + extract_unsigned_integer + (arg_bits, 4, + byte_order)); + regcache_cooked_write_unsigned (regcache, + arg_reg + 1, + extract_unsigned_integer + (arg_bits + 4, 4, + byte_order)); + } + arg_reg +=3D 2; + } + else + { + sp_off =3D align_up (sp_off, 4); + /* Otherwise, pass the 8 byte scalar on the stack. */ + if (write_pass) + write_memory (sp + sp_off, arg_bits, 8); + sp_off +=3D 8; + } + } + else + { + ULONGEST u; + + gdb_assert (arg_size <=3D 4); + + u =3D extract_unsigned_integer (arg_bits, arg_size, byte_order); + + if (i < num_register_candidate_args + && arg_reg <=3D CR16_R7_REGNUM) + { + if (write_pass) + regcache_cooked_write_unsigned (regcache, arg_reg, u); + arg_reg +=3D 1; + } + else + { + int p_arg_size =3D 4; + + if (TYPE_PROTOTYPED (func_type) + && i < TYPE_NFIELDS (func_type)) + { + struct type *p_arg_type =3D + TYPE_FIELD_TYPE (func_type, i); + p_arg_size =3D TYPE_LENGTH (p_arg_type); + } + + sp_off =3D align_up (sp_off, p_arg_size); + + if (write_pass) + write_memory_unsigned_integer (sp + sp_off, + p_arg_size, byte_order, + u); + sp_off +=3D p_arg_size; + } + } + } + else + { + /* Argument is a struct or union. Pass as much of the struct + in registers, as possible. Pass the rest on the stack. */ + while (arg_size > 0) + { + if (i < num_register_candidate_args + && arg_reg <=3D CR16_R7_REGNUM + && arg_size <=3D 4 * (CR16_R7_REGNUM - arg_reg + 1) + && arg_size % 4 =3D=3D 0) + { + int len =3D min (arg_size, 4); + + if (write_pass) + regcache_cooked_write_unsigned (regcache, arg_reg, + extract_unsigned_integer + (arg_bits, len, + byte_order)); + arg_bits +=3D len; + arg_size -=3D len; + arg_reg++; + } + else + { + sp_off =3D align_up (sp_off, 4); + if (write_pass) + write_memory (sp + sp_off, arg_bits, arg_size); + sp_off +=3D align_up (arg_size, 4); + arg_size =3D 0; + } + } + } + } + } + + /* Keep track of the stack address prior to pushing the return address. + This is the value that we'll return. */ + cfa =3D sp; + + /* Push the return address. */ + sp =3D sp - 4; + write_memory_unsigned_integer (sp, 4, byte_order, bp_addr); + + /* Update the stack pointer. */ + regcache_cooked_write_unsigned (regcache, CR16_SP_REGNUM, sp); + + return cfa; +} + +/* Implement the "return_value" gdbarch method. */ + +static enum return_value_convention +cr16_return_value (struct gdbarch *gdbarch, + struct type *func_type, + struct type *valtype, + struct regcache *regcache, + gdb_byte * readbuf, const gdb_byte * writebuf) +{ + enum bfd_endian byte_order =3D gdbarch_byte_order (gdbarch); + ULONGEST valtype_len =3D TYPE_LENGTH (valtype); + + if (TYPE_LENGTH (valtype) > 16 + || ((TYPE_CODE (valtype) =3D=3D TYPE_CODE_STRUCT + || TYPE_CODE (valtype) =3D=3D TYPE_CODE_UNION) + && TYPE_LENGTH (valtype) % 4 !=3D 0)) + return RETURN_VALUE_STRUCT_CONVENTION; + + if (readbuf) + { + ULONGEST u; + int argreg =3D CR16_R0_REGNUM; + int offset =3D 0; + + while (valtype_len > 0) + { + int len =3D min (valtype_len, 4); + + regcache_cooked_read_unsigned (regcache, argreg, &u); + store_unsigned_integer (readbuf + offset, len, byte_order, u); + valtype_len -=3D len; + offset +=3D len; + argreg++; + } + } + + if (writebuf) + { + ULONGEST u; + int argreg =3D CR16_R0_REGNUM; + int offset =3D 0; + + while (valtype_len > 0) + { + int len =3D min (valtype_len, 4); + + u =3D extract_unsigned_integer (writebuf + offset, len, byte_order); + regcache_cooked_write_unsigned (regcache, argreg, u); + valtype_len -=3D len; + offset +=3D len; + argreg++; + } + } + + return RETURN_VALUE_REGISTER_CONVENTION; +} + +/* Implement the "breakpoint_from_pc" gdbarch method. */ + +static const gdb_byte * +cr16_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR * pcptr, + int *lenptr) +{ + /* We use different breakpoint instructions for ELF and uClinux. + See cr16-linux-tdep.c for more details. */ + struct gdbarch_tdep *tdep =3D gdbarch_tdep (gdbarch); + + *lenptr =3D 2; + if (tdep =3D=3D NULL || tdep->breakpoint =3D=3D NULL) + return breakpoint_elf; + + return tdep->breakpoint; +} + +/* Allocate and initialize a gdbarch object. */ + +static struct gdbarch * +cr16_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) +{ + struct gdbarch *gdbarch; + struct gdbarch_tdep *tdep; + int elf_flags; + + /* Extract the elf_flags if available. */ + if (info.abfd !=3D NULL + && bfd_get_flavour (info.abfd) =3D=3D bfd_target_elf_flavour) + elf_flags =3D elf_elfheader (info.abfd)->e_flags; + else + elf_flags =3D 0; + + /* Try to find the architecture in the list of already defined + architectures. */ + for (arches =3D gdbarch_list_lookup_by_info (arches, &info); + arches !=3D NULL; + arches =3D gdbarch_list_lookup_by_info (arches->next, &info)) + { + if (gdbarch_tdep (arches->gdbarch)->elf_flags !=3D elf_flags) + continue; + + return arches->gdbarch; + } + /* None found, create a new architecture from the information + provided. */ + tdep =3D (struct gdbarch_tdep *) xcalloc (1, sizeof (struct gdbarch_tdep= )); + tdep->elf_flags =3D elf_flags; + gdbarch =3D gdbarch_alloc (&info, tdep); + + set_gdbarch_num_pseudo_regs (gdbarch, 0); + set_gdbarch_num_regs (gdbarch, CR16_NUM_REGS); + set_gdbarch_register_name (gdbarch, cr16_register_name); + set_gdbarch_register_type (gdbarch, cr16_register_type); + set_gdbarch_pc_regnum (gdbarch, CR16_PC_REGNUM); + set_gdbarch_sp_regnum (gdbarch, CR16_SP_REGNUM); + set_gdbarch_inner_than (gdbarch, core_addr_lessthan); + set_gdbarch_decr_pc_after_break (gdbarch, 2); + set_gdbarch_breakpoint_from_pc (gdbarch, cr16_breakpoint_from_pc); + set_gdbarch_skip_prologue (gdbarch, cr16_skip_prologue); + set_gdbarch_print_insn (gdbarch, print_insn_cr16); + set_gdbarch_unwind_pc (gdbarch, cr16_unwind_pc); + set_gdbarch_unwind_sp (gdbarch, cr16_unwind_sp); + + /* Methods for saving / extracting a dummy frame's ID. */ + set_gdbarch_dummy_id (gdbarch, cr16_dummy_id); + set_gdbarch_push_dummy_call (gdbarch, cr16_push_dummy_call); + /* Target builtin data types. */ + set_gdbarch_char_signed (gdbarch, 8); + set_gdbarch_short_bit (gdbarch, 16); + set_gdbarch_int_bit (gdbarch, 16); + set_gdbarch_long_bit (gdbarch, 32); + set_gdbarch_long_long_bit (gdbarch, 64); + set_gdbarch_float_bit (gdbarch, 32); + + set_gdbarch_ptr_bit (gdbarch, 32); + set_gdbarch_float_format (gdbarch, floatformats_ieee_single); + set_gdbarch_double_bit (gdbarch, 64); + set_gdbarch_long_double_bit (gdbarch, 64); + set_gdbarch_double_format (gdbarch, floatformats_ieee_double); + set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double); + + frame_unwind_append_unwinder (gdbarch, &cr16_frame_unwind); + set_gdbarch_return_value (gdbarch, cr16_return_value); + + /* Hook in ABI-specific overrides, if they have been registered. */ + gdbarch_init_osabi (info, gdbarch); + + return gdbarch; + +} + +/* -Wmissing-prototypes. */ +extern initialize_file_ftype _initialize_cr16_tdep; + +/* Register the above initialization routine. */ + +void +_initialize_cr16_tdep (void) +{ + register_gdbarch_init (bfd_arch_cr16, cr16_gdbarch_init); +} diff -uprN ./gdb_src.orig/gdb/cr16-tdep.h gdb_src/gdb/cr16-tdep.h --- ./gdb_src.orig/gdb/cr16-tdep.h 1970-01-01 05:30:00.000000000 +0530 +++ ./gdb_src/gdb/cr16-tdep.h 2013-01-08 12:59:20.000000000 +0530 @@ -0,0 +1,32 @@ +/* GNU/Linux on CR16 target support. + Copyright (C) 2013 Free Software Foundation, Inc. + + Contributed by Kaushik Phatak (kaushik.phatak@kpitcummins.com) + KPIT Cummins Infosystems Limited, Pune India. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . = */ + + +/* Target-dependent structure in gdbarch. */ + +struct gdbarch_tdep +{ + /* The ELF header flags specify the multilib used. */ + int elf_flags; + + /* Breakpoint instruction. */ + const gdb_byte *breakpoint; +}; --_002_C6CA53A2A46BA7469348BDBD663AB65848565AB5KCHJEXMB02kpitc_ Content-Type: application/octet-stream; name="cr16_gdb.diff" Content-Description: cr16_gdb.diff Content-Disposition: attachment; filename="cr16_gdb.diff"; size=32076; creation-date="Tue, 08 Jan 2013 08:43:42 GMT"; modification-date="Tue, 08 Jan 2013 09:40:55 GMT" Content-Transfer-Encoding: base64 Content-length: 43481 ZGlmZiAtdXByTiAuL2dkYl9zcmMub3JpZy9nZGIvY29uZmlndXJlLnRndCAu L2dkYl9zcmMvZ2RiL2NvbmZpZ3VyZS50Z3QKLS0tIC4vZ2RiX3NyYy5vcmln L2dkYi9jb25maWd1cmUudGd0CTIwMTItMTItMTggMjA6MjI6NTguMDAwMDAw MDAwICswNTMwCisrKyAuL2dkYl9zcmMvZ2RiL2NvbmZpZ3VyZS50Z3QJMjAx My0wMS0wOCAxMjo1NjozMS4wMDAwMDAwMDAgKzA1MzAKQEAgLTExNiw2ICsx MTYsMTggQEAgYmZpbi0qLSopCiAJZ2RiX3NpbT0uLi9zaW0vYmZpbi9saWJz aW0uYQogCTs7CiAKK2NyMTYqLSotKmxpbnV4KQorCSMgVGFyZ2V0OiBDUjE2 IHByb2Nlc3NvcgorCWdkYl90YXJnZXRfb2JzPSJjcjE2LXRkZXAubyBjcjE2 LWxpbnV4LXRkZXAubyBsaW51eC10ZGVwLm8iCisJZ2RiX3NpbT0uLi9zaW0v Y3IxNi9saWJzaW0uYQorCTs7CisKK2NyMTYqLSotKikKKwkjIFRhcmdldDog Q1IxNiBwcm9jZXNzb3IKKwlnZGJfdGFyZ2V0X29icz0iY3IxNi10ZGVwLm8i CisJZ2RiX3NpbT0uLi9zaW0vY3IxNi9saWJzaW0uYQorCTs7CisKIGNyaXMq KQogCSMgVGFyZ2V0OiBDUklTCiAJZ2RiX3RhcmdldF9vYnM9ImNyaXMtdGRl cC5vIHNvbGliLXN2cjQubyIKZGlmZiAtdXByTiAuL2dkYl9zcmMub3JpZy9n ZGIvY3IxNi1saW51eC10ZGVwLmMgLi9nZGJfc3JjL2dkYi9jcjE2LWxpbnV4 LXRkZXAuYwotLS0gLi9nZGJfc3JjLm9yaWcvZ2RiL2NyMTYtbGludXgtdGRl cC5jCTE5NzAtMDEtMDEgMDU6MzA6MDAuMDAwMDAwMDAwICswNTMwCisrKyAu L2dkYl9zcmMvZ2RiL2NyMTYtbGludXgtdGRlcC5jCTIwMTMtMDEtMDggMTI6 NTk6MjcuMDAwMDAwMDAwICswNTMwCkBAIC0wLDAgKzEsMTA3IEBACisvKiBU YXJnZXQtZGVwZW5kZW50IGNvZGUgZm9yIEdOVS9MaW51eCBvbiB0aGUgU2l0 ZWwgQ1IxNiBwcm9jZXNzb3JzLgorCisgICBDb3B5cmlnaHQgKEMpIDIwMTMg RnJlZSBTb2Z0d2FyZSBGb3VuZGF0aW9uLCBJbmMuCisKKyAgIENvbnRyaWJ1 dGVkIGJ5IEthdXNoaWsgUGhhdGFrIChrYXVzaGlrLnBoYXRha0BrcGl0Y3Vt bWlucy5jb20pCisgICBLUElUIEN1bW1pbnMgSW5mb3N5c3RlbXMgTGltaXRl ZCwgUHVuZSBJbmRpYS4KKworICAgVGhpcyBmaWxlIGlzIHBhcnQgb2YgR0RC LgorCisgICBUaGlzIHByb2dyYW0gaXMgZnJlZSBzb2Z0d2FyZTsgeW91IGNh biByZWRpc3RyaWJ1dGUgaXQgYW5kL29yIG1vZGlmeQorICAgaXQgdW5kZXIg dGhlIHRlcm1zIG9mIHRoZSBHTlUgR2VuZXJhbCBQdWJsaWMgTGljZW5zZSBh cyBwdWJsaXNoZWQgYnkKKyAgIHRoZSBGcmVlIFNvZnR3YXJlIEZvdW5kYXRp b247IGVpdGhlciB2ZXJzaW9uIDMgb2YgdGhlIExpY2Vuc2UsIG9yCisgICAo YXQgeW91ciBvcHRpb24pIGFueSBsYXRlciB2ZXJzaW9uLgorCisgICBUaGlz IHByb2dyYW0gaXMgZGlzdHJpYnV0ZWQgaW4gdGhlIGhvcGUgdGhhdCBpdCB3 aWxsIGJlIHVzZWZ1bCwKKyAgIGJ1dCBXSVRIT1VUIEFOWSBXQVJSQU5UWTsg d2l0aG91dCBldmVuIHRoZSBpbXBsaWVkIHdhcnJhbnR5IG9mCisgICBNRVJD SEFOVEFCSUxJVFkgb3IgRklUTkVTUyBGT1IgQSBQQVJUSUNVTEFSIFBVUlBP U0UuICBTZWUgdGhlCisgICBHTlUgR2VuZXJhbCBQdWJsaWMgTGljZW5zZSBm b3IgbW9yZSBkZXRhaWxzLgorCisgICBZb3Ugc2hvdWxkIGhhdmUgcmVjZWl2 ZWQgYSBjb3B5IG9mIHRoZSBHTlUgR2VuZXJhbCBQdWJsaWMgTGljZW5zZQor ICAgYWxvbmcgd2l0aCB0aGlzIHByb2dyYW0uICBJZiBub3QsIHNlZSA8aHR0 cDovL3d3dy5nbnUub3JnL2xpY2Vuc2VzLz4uICAqLworCisjaW5jbHVkZSAi ZGVmcy5oIgorI2luY2x1ZGUgIm9zYWJpLmgiCisjaW5jbHVkZSAiZWxmLWJm ZC5oIgorI2luY2x1ZGUgImVsZi9jcjE2LmgiCisjaW5jbHVkZSAibGludXgt dGRlcC5oIgorI2luY2x1ZGUgInN5bXRhYi5oIgorI2luY2x1ZGUgImNyMTYt dGRlcC5oIgorCisvKiBOdW1iZXIgb2YgcmVnaXN0ZXJzIGF2YWlsYWJsZSBm b3IgTGludXggdGFyZ2V0cyAgKi8KKyNkZWZpbmUgQ1IxNl9MSU5VWF9OVU1f UkVHUyAgMjEKKworLyogVGhlIGJyZWFrcG9pbnQgaW5zdHJ1Y3Rpb24gdXNl ZCBieSB1Q2xpbnV4IHRhcmdldCAgKi8KK3N0YXRpYyBjb25zdCBnZGJfYnl0 ZSBicmVha3BvaW50X3VjbGludXhbXSA9IHsgMHhDNywgMHgwMCB9OworCitz dGF0aWMgY29uc3QgY2hhciAqY29uc3QgcmVnX25hbWVzW10gPQoreworICAi cjAiLAorICAicjEiLAorICAicjIiLAorICAicjMiLAorICAicjQiLAorICAi cjUiLAorICAicjYiLAorICAicjciLAorICAicjgiLAorICAicjkiLAorICAi cjEwIiwKKyAgInIxMSIsCisgICJyMTIiLAorICAicjEzIiwKKyAgInJhIiwK KyAgInBzciIsCisgICJwYyIsCisgICJyMHIxX29yaWciLAorICAiaW50YmFz ZSIsCisgICJ1c3AiLAorICAiY2ZnIgorfTsKKworLyogVmVyaWZ5IHJlZ2lz dGVyIGFycmF5IHNpemUgaXMgd2l0aGluIGhhcmR3YXJlIHJlZ2lzdGVyIGxp bWl0LiAgKi8KKworZ2RiX3N0YXRpY19hc3NlcnQgKEFSUkFZX1NJWkUgKHJl Z19uYW1lcykgPD0gQ1IxNl9MSU5VWF9OVU1fUkVHUyk7CisKKy8qIEltcGxl bWVudCB0aGUgInJlZ2lzdGVyX25hbWUiIGdkYmFyY2ggbWV0aG9kLiAgKi8K Kworc3RhdGljIGNvbnN0IGNoYXIgKgorY3IxNl9saW51eF9yZWdpc3Rlcl9u YW1lIChzdHJ1Y3QgZ2RiYXJjaCAqZ2RiYXJjaCwgaW50IHJlZ25yKQorewor ICBnZGJfYXNzZXJ0IChyZWduciA+PSAwICYmIHJlZ25yIDwgQ1IxNl9MSU5V WF9OVU1fUkVHUyk7CisgIHJldHVybiByZWdfbmFtZXNbcmVnbnJdOworfQor CisvKiBPUyBzcGVjaWZpYyBpbml0aWFsaXphdGlvbiBvZiBnZGJhcmNoLiAg Ki8KKworc3RhdGljIHZvaWQKK2NyMTZfdWNsaW51eF9pbml0X2FiaSAoc3Ry dWN0IGdkYmFyY2hfaW5mbyBpbmZvLCBzdHJ1Y3QgZ2RiYXJjaCAqZ2RiYXJj aCkKK3sKKyAgc3RydWN0IGdkYmFyY2hfdGRlcCAqdGRlcCA9IGdkYmFyY2hf dGRlcCAoZ2RiYXJjaCk7CisKKyAgbGludXhfaW5pdF9hYmkgKGluZm8sIGdk YmFyY2gpOworCisgIHNldF9nZGJhcmNoX251bV9yZWdzIChnZGJhcmNoLCBD UjE2X0xJTlVYX05VTV9SRUdTKTsKKyAgc2V0X2dkYmFyY2hfcmVnaXN0ZXJf bmFtZSAoZ2RiYXJjaCwgY3IxNl9saW51eF9yZWdpc3Rlcl9uYW1lKTsKKwor ICAvKiBUaGUgb3Bjb2RlIG9mIGV4Y3AgYnB0IGlzIDB4MDBDOCwgaG93ZXZl ciBmb3IgdWNsaW51eCB3ZSB3aWxsCisgICAgIHVzZSB0aGUgZXhjcCBmbGcg KDB4MDBDNykgdG8gaW5zZXJ0IGEgYnJlYWtwb2ludC4gIFRoZSBleGNwIGJw dAorICAgICByZXF1aXJlcyBleHRlcm5hbCBoYXJkd2FyZSBzdXBwb3J0IGZv ciBicmVha3BvaW50cyB0byB3b3JrIG9uCisgICAgIENSMTYgdGFyZ2V0LiAg U29mdHdhcmUgYmFzZWQgYnJlYWtwb2ludHMgYXJlIGltcGxlbWVudGVkIGlu IHRoZQorICAgICBrZXJuZWwgdXNpbmcgZXhjcCBmbGcgYW5kIHRlc3RlZCBv biB0aGUgU0MxNDQ1MiB0YXJnZXQuICBVc2UKKyAgICAgMHgwMEM3IHdpdGgg Z2Ric2VydmVyL2tlcm5lbCBhbmQgMHgwMEM4IGZvciBzaW0vRUxGLiAgV2UK KyAgICAgcmVwcmVzZW50IHRoZSBicmVha3BvaW50IGluIGxpdHRsZSBlbmRp YW4gZm9ybWF0IHNpbmNlIENSMTYKKyAgICAgc3VwcG9ydHMgb25seSBsaXR0 bGUgZW5kaWFuLiAgKi8KKyAgdGRlcC0+YnJlYWtwb2ludCA9IGJyZWFrcG9p bnRfdWNsaW51eDsKKworfQorCisvKiBQcm92aWRlIGEgcHJvdG90eXBlIHRv IHNpbGVuY2UgLVdtaXNzaW5nLXByb3RvdHlwZXMuICAqLworZXh0ZXJuIGlu aXRpYWxpemVfZmlsZV9mdHlwZSBfaW5pdGlhbGl6ZV9jcjE2X2xpbnV4X3Rk ZXA7CisKK3ZvaWQKK19pbml0aWFsaXplX2NyMTZfbGludXhfdGRlcCAodm9p ZCkKK3sKKyAgZ2RiYXJjaF9yZWdpc3Rlcl9vc2FiaSAoYmZkX2FyY2hfY3Ix NiwgMCwgR0RCX09TQUJJX0xJTlVYLAorCQkJICBjcjE2X3VjbGludXhfaW5p dF9hYmkpOworfQpkaWZmIC11cHJOIC4vZ2RiX3NyYy5vcmlnL2dkYi9jcjE2 LXRkZXAuYyAuL2dkYl9zcmMvZ2RiL2NyMTYtdGRlcC5jCi0tLSAuL2dkYl9z cmMub3JpZy9nZGIvY3IxNi10ZGVwLmMJMTk3MC0wMS0wMSAwNTozMDowMC4w MDAwMDAwMDAgKzA1MzAKKysrIC4vZ2RiX3NyYy9nZGIvY3IxNi10ZGVwLmMJ MjAxMy0wMS0wOCAxMjo1OToxMy4wMDAwMDAwMDAgKzA1MzAKQEAgLTAsMCAr MSw4OTYgQEAKKy8qIFRhcmdldC1kZXBlbmRlbnQgY29kZSBmb3IgdGhlIFNp dGVsIENSMTYgZm9yIEdEQiwgdGhlIEdOVSBkZWJ1Z2dlci4KKyAKKyAgIENv cHlyaWdodCAoQykgMjAxMyBGcmVlIFNvZnR3YXJlIEZvdW5kYXRpb24sIElu Yy4KKyAKKyAgIENvbnRyaWJ1dGVkIGJ5IEthdXNoaWsgUGhhdGFrIChrYXVz aGlrLnBoYXRha0BrcGl0Y3VtbWlucy5jb20pCisgICBLUElUIEN1bW1pbnMg SW5mb3N5c3RlbXMgTGltaXRlZCwgUHVuZSBJbmRpYS4KKyAgIFRoaXMgZmls ZSBpcyBwYXJ0IG9mIEdEQi4KKworICBUaGlzIHByb2dyYW0gaXMgZnJlZSBz b2Z0d2FyZTsgeW91IGNhbiByZWRpc3RyaWJ1dGUgaXQgYW5kL29yIG1vZGlm eQorICBpdCB1bmRlciB0aGUgdGVybXMgb2YgdGhlIEdOVSBHZW5lcmFsIFB1 YmxpYyBMaWNlbnNlIGFzIHB1Ymxpc2hlZCBieQorICB0aGUgRnJlZSBTb2Z0 d2FyZSBGb3VuZGF0aW9uOyBlaXRoZXIgdmVyc2lvbiAzIG9mIHRoZSBMaWNl bnNlLCBvcgorICAoYXQgeW91ciBvcHRpb24pIGFueSBsYXRlciB2ZXJzaW9u LgorIAorICBUaGlzIHByb2dyYW0gaXMgZGlzdHJpYnV0ZWQgaW4gdGhlIGhv cGUgdGhhdCBpdCB3aWxsIGJlIHVzZWZ1bCwKKyAgYnV0IFdJVEhPVVQgQU5Z IFdBUlJBTlRZOyB3aXRob3V0IGV2ZW4gdGhlIGltcGxpZWQgd2FycmFudHkg b2YKKyAgTUVSQ0hBTlRBQklMSVRZIG9yIEZJVE5FU1MgRk9SIEEgUEFSVElD VUxBUiBQVVJQT1NFLiAgU2VlIHRoZQorICBHTlUgR2VuZXJhbCBQdWJsaWMg TGljZW5zZSBmb3IgbW9yZSBkZXRhaWxzLgorIAorICBZb3Ugc2hvdWxkIGhh dmUgcmVjZWl2ZWQgYSBjb3B5IG9mIHRoZSBHTlUgR2VuZXJhbCBQdWJsaWMg TGljZW5zZQorICBhbG9uZyB3aXRoIHRoaXMgcHJvZ3JhbS4gIElmIG5vdCwg c2VlIDxodHRwOi8vd3d3LmdudS5vcmcvbGljZW5zZXMvPi4gICovCisKKyNp bmNsdWRlICJkZWZzLmgiCisjaW5jbHVkZSAiYXJjaC11dGlscy5oIgorI2lu Y2x1ZGUgInByb2xvZ3VlLXZhbHVlLmgiCisjaW5jbHVkZSAidGFyZ2V0Lmgi CisjaW5jbHVkZSAicmVnY2FjaGUuaCIKKyNpbmNsdWRlICJvcGNvZGUvY3Ix Ni5oIgorI2luY2x1ZGUgImRpcy1hc20uaCIKKyNpbmNsdWRlICJnZGJ0eXBl cy5oIgorI2luY2x1ZGUgImZyYW1lLmgiCisjaW5jbHVkZSAiZnJhbWUtdW53 aW5kLmgiCisjaW5jbHVkZSAiZnJhbWUtYmFzZS5oIgorI2luY2x1ZGUgInZh bHVlLmgiCisjaW5jbHVkZSAiZ2RiY29yZS5oIgorI2luY2x1ZGUgImR3YXJm Mi1mcmFtZS5oIgorI2luY2x1ZGUgImdkYi9zaW0tY3IxNi5oIgorI2luY2x1 ZGUgImVsZi9jcjE2LmgiCisjaW5jbHVkZSAiZWxmLWJmZC5oIgorI2luY2x1 ZGUgIm9zYWJpLmgiCisjaW5jbHVkZSAiY3IxNi10ZGVwLmgiCisKKy8qIE51 bWJlciBvZiByZWdpc3RlcnMgYXZhaWxhYmxlIGZvciBFTEYgdGFyZ2V0cy4g ICovCisjZGVmaW5lIENSMTZfTlVNX1JFR1MgIDIyCisKKy8qIFRoZSBicmVh a3BvaW50IGluc3RydWN0aW9uIHVzZWQgd2l0aCBzaW0gZm9yIEVMRiB0YXJn ZXRzLiAgKi8KK3N0YXRpYyBjb25zdCBnZGJfYnl0ZSBicmVha3BvaW50X2Vs ZltdID0geyAweEM4LCAweDAwIH07CisKKy8qIENlcnRhaW4gaW1wb3J0YW50 IHJlZ2lzdGVyIG51bWJlcnMuICAqLworZW51bQoreworICBDUjE2X1IwX1JF R05VTSA9IDAsCisgIENSMTZfUjdfUkVHTlVNID0gNywKKyAgQ1IxNl9SMTJf UkVHTlVNID0gMTIsCisgIENSMTZfRlBfUkVHTlVNID0gMTMsCisgIENSMTZf UkFfUkVHTlVNID0gMTQsCisgIENSMTZfU1BfUkVHTlVNID0gMTUsCisgIENS MTZfUENfUkVHTlVNID0gMTYsCit9OworCisvKiBUaGlzIHN0cnVjdHVyZSBo b2xkcyB0aGUgcmVzdWx0cyBvZiBhIHByb2xvZ3VlIGFuYWx5c2lzLiAgKi8K K3N0cnVjdCBjcjE2X3Byb2xvZ3VlCit7CisgIC8qIFRoZSBvZmZzZXQgZnJv bSB0aGUgZnJhbWUgYmFzZSB0byB0aGUgc3RhY2sgcG9pbnRlciAtLS0gYWx3 YXlzCisgICAgIHplcm8gb3IgbmVnYXRpdmUuCisKKyAgICAgQ2FsbGluZyB0 aGlzIGEgInNpemUiIGlzIGEgYml0IG1pc2xlYWRpbmcsIGJ1dCBnaXZlbiB0 aGF0IHRoZQorICAgICBzdGFjayBncm93cyBkb3dud2FyZHMsIHVzaW5nIG9m ZnNldHMgZm9yIGV2ZXJ5dGhpbmcga2VlcHMgb25lCisgICAgIGZyb20gZ29p bmcgY29tcGxldGVseSBzaWduLWNyYXp5OiB5b3UgbmV2ZXIgY2hhbmdlIGFu eXRoaW5nJ3MKKyAgICAgc2lnbiBmb3IgYW4gQUREIGluc3RydWN0aW9uOyBh bHdheXMgY2hhbmdlIHRoZSBzZWNvbmQgb3BlcmFuZCdzCisgICAgIHNpZ24g Zm9yIGEgU1VCIGluc3RydWN0aW9uOyBhbmQgZXZlcnl0aGluZyB0YWtlcyBj YXJlIG9mCisgICAgIGl0c2VsZi4gICovCisgIGludCBmcmFtZV9zaXplOwor CisgIC8qIE5vbi16ZXJvIGlmIHRoaXMgZnVuY3Rpb24gaGFzIGluaXRpYWxp emVkIHRoZSBmcmFtZSBwb2ludGVyIGZyb20KKyAgICAgdGhlIHN0YWNrIHBv aW50ZXIsIHplcm8gb3RoZXJ3aXNlLiAgKi8KKyAgaW50IGhhc19mcmFtZV9w dHI7CisKKyAgLyogSWYgaGFzX2ZyYW1lX3B0ciBpcyBub24temVybywgdGhp cyBpcyB0aGUgb2Zmc2V0IGZyb20gdGhlIGZyYW1lCisgICAgIGJhc2UgdG8g d2hlcmUgdGhlIGZyYW1lIHBvaW50ZXIgcG9pbnRzLiAgVGhpcyBpcyBhbHdh eXMgemVybyBvcgorICAgICBuZWdhdGl2ZS4gICovCisgIGludCBmcmFtZV9w dHJfb2Zmc2V0OworCisgIC8qIFRoZSBhZGRyZXNzIG9mIHRoZSBmaXJzdCBp bnN0cnVjdGlvbiBhdCB3aGljaCB0aGUgZnJhbWUgaGFzIGJlZW4KKyAgICAg c2V0IHVwIGFuZCB0aGUgYXJndW1lbnRzIGFyZSB3aGVyZSB0aGUgZGVidWcg aW5mbyBzYXlzIHRoZXkgYXJlCisgICAgIC0tLSBhcyBiZXN0IGFzIHdlIGNh biB0ZWxsLiAgKi8KKyAgQ09SRV9BRERSIHByb2xvZ3VlX2VuZDsKKworICAv KiByZWdfb2Zmc2V0W1JdIGlzIHRoZSBvZmZzZXQgZnJvbSB0aGUgQ0ZBIGF0 IHdoaWNoIHJlZ2lzdGVyIFIgaXMKKyAgICAgc2F2ZWQsIG9yIDEgaWYgcmVn aXN0ZXIgUiBoYXMgbm90IGJlZW4gc2F2ZWQuICAoUmVhbCB2YWx1ZXMgYXJl CisgICAgIGFsd2F5cyB6ZXJvIG9yIG5lZ2F0aXZlLikgICovCisgIGludCBy ZWdfb2Zmc2V0W0NSMTZfTlVNX1JFR1NdOworfTsKKworLyogSGFyZHdhcmUg cmVnaXN0ZXIgbmFtZSBkZWNsYXJhdGlvbi4gICovCitzdGF0aWMgY29uc3Qg Y2hhciAqY29uc3QgcmVnX25hbWVzW10gPQoreworICAicjAiLAorICAicjEi LAorICAicjIiLAorICAicjMiLAorICAicjQiLAorICAicjUiLAorICAicjYi LAorICAicjciLAorICAicjgiLAorICAicjkiLAorICAicjEwIiwKKyAgInIx MSIsCisgICJyMTIiLAorICAicjEzIiwKKyAgInJhIiwKKyAgInNwIiwKKyAg InBjIiwKKyAgImlzcCIsCisgICJ1c3AiLAorICAiaW50YmFzZSIsCisgICJw c3IiLAorICAiY2ZnIgorfTsKKworLyogVmVyaWZ5IHJlZ2lzdGVyIGFycmF5 IHNpemUgaXMgd2l0aGluIGhhcmR3YXJlIHJlZ2lzdGVyIGxpbWl0LiAgKi8K KworZ2RiX3N0YXRpY19hc3NlcnQgKEFSUkFZX1NJWkUgKHJlZ19uYW1lcykg PD0gQ1IxNl9OVU1fUkVHUyk7CisKKy8qIEltcGxlbWVudCB0aGUgInJlZ2lz dGVyX25hbWUiIGdkYmFyY2ggbWV0aG9kLiAgKi8KKworc3RhdGljIGNvbnN0 IGNoYXIgKgorY3IxNl9yZWdpc3Rlcl9uYW1lIChzdHJ1Y3QgZ2RiYXJjaCAq Z2RiYXJjaCwgaW50IHJlZ25yKQoreworICBnZGJfYXNzZXJ0IChyZWduciA+ PSAwICYmIHJlZ25yIDwgQ1IxNl9OVU1fUkVHUyk7CisgIHJldHVybiByZWdf bmFtZXNbcmVnbnJdOworfQorCisvKiBJbXBsZW1lbnQgdGhlICJyZWdpc3Rl cl90eXBlIiBnZGJhcmNoIG1ldGhvZC4gICovCisKK3N0YXRpYyBzdHJ1Y3Qg dHlwZSAqCitjcjE2X3JlZ2lzdGVyX3R5cGUgKHN0cnVjdCBnZGJhcmNoICpn ZGJhcmNoLCBpbnQgcmVnX25yKQoreworICBzd2l0Y2ggKHJlZ19ucikKKyAg ICB7CisgICAgY2FzZSBDUjE2X1BDX1JFR05VTToJLyogTm90ZTogUEMgaW4g Q1IxNiBpcyBvZiAyNCBiaXRzLiAgKi8KKyAgICAgIHJldHVybiBidWlsdGlu X3R5cGUgKGdkYmFyY2gpLT5idWlsdGluX2Z1bmNfcHRyOworCisgICAgY2Fz ZSBDUjE2X1JBX1JFR05VTToJLyogUmV0dXJuIGFkZHJlc3MgcmVnLiAgKi8K KyAgICAgIHJldHVybiBidWlsdGluX3R5cGUgKGdkYmFyY2gpLT5idWlsdGlu X2RhdGFfcHRyOworICAgICAgYnJlYWs7CisKKyAgICBjYXNlIENSMTZfRlBf UkVHTlVNOgkvKiBGcmFtZSBQb2ludGVyIHJlZy4gICovCisgICAgY2FzZSBD UjE2X1NQX1JFR05VTToJLyogU3RhY2sgUG9pbnRlciByZWcuICAqLworICAg ICAgcmV0dXJuIGJ1aWx0aW5fdHlwZSAoZ2RiYXJjaCktPmJ1aWx0aW5fZGF0 YV9wdHI7CisgICAgICBicmVhazsKKworICAgIGNhc2UgU0lNX0NSMTZfSVNQ X1JFR05VTToKKyAgICBjYXNlIFNJTV9DUjE2X1VTUF9SRUdOVU06CisgICAg Y2FzZSBTSU1fQ1IxNl9JTlRCQVNFX1JFR05VTToKKyAgICBjYXNlIFNJTV9D UjE2X1BTUl9SRUdOVU06CisgICAgY2FzZSBTSU1fQ1IxNl9DRkdfUkVHTlVN OgorICAgICAgcmV0dXJuIGJ1aWx0aW5fdHlwZSAoZ2RiYXJjaCktPmJ1aWx0 aW5faW50MzI7CisgICAgICBicmVhazsKKworICAgIGNhc2UgU0lNX0NSMTZf UjBfUkVHTlVNOgorICAgIGNhc2UgU0lNX0NSMTZfUjFfUkVHTlVNOgorICAg IGNhc2UgU0lNX0NSMTZfUjJfUkVHTlVNOgorICAgIGNhc2UgU0lNX0NSMTZf UjNfUkVHTlVNOgorICAgIGNhc2UgU0lNX0NSMTZfUjRfUkVHTlVNOgorICAg IGNhc2UgU0lNX0NSMTZfUjVfUkVHTlVNOgorICAgIGNhc2UgU0lNX0NSMTZf UjZfUkVHTlVNOgorICAgIGNhc2UgU0lNX0NSMTZfUjdfUkVHTlVNOgorICAg IGNhc2UgU0lNX0NSMTZfUjhfUkVHTlVNOgorICAgIGNhc2UgU0lNX0NSMTZf UjlfUkVHTlVNOgorICAgIGNhc2UgU0lNX0NSMTZfUjEwX1JFR05VTToKKyAg ICBjYXNlIFNJTV9DUjE2X1IxMV9SRUdOVU06CisgICAgICByZXR1cm4gYnVp bHRpbl90eXBlIChnZGJhcmNoKS0+YnVpbHRpbl9pbnQxNjsKKyAgICAgIGJy ZWFrOworCisgICAgY2FzZSBTSU1fQ1IxNl9SMTJfUkVHTlVNOgorICAgICAg cmV0dXJuIGJ1aWx0aW5fdHlwZSAoZ2RiYXJjaCktPmJ1aWx0aW5faW50MzI7 CisgICAgICBicmVhazsKKworICAgIGRlZmF1bHQ6CisgICAgICByZXR1cm4g YnVpbHRpbl90eXBlIChnZGJhcmNoKS0+YnVpbHRpbl9pbnQzMjsKKyAgICAg IGJyZWFrOworICAgIH0KK30KKworLyogRnVuY3Rpb24gZm9yIGZpbmRpbmcg c2F2ZWQgcmVnaXN0ZXJzIGluIGEgJ3N0cnVjdCBwdl9hcmVhJzsgdGhpcwor ICAgZnVuY3Rpb24gaXMgcGFzc2VkIHRvIHB2X2FyZWFfc2Nhbi4KKworICAg SWYgVkFMVUUgaXMgYSBzYXZlZCByZWdpc3RlciwgQUREUiBzYXlzIGl0IHdh cyBzYXZlZCBhdCBhIGNvbnN0YW50CisgICBvZmZzZXQgZnJvbSB0aGUgZnJh bWUgYmFzZSwgYW5kIFNJWkUgaW5kaWNhdGVzIHRoYXQgdGhlIHdob2xlCisg ICByZWdpc3RlciB3YXMgc2F2ZWQsIHJlY29yZCBpdHMgb2Zmc2V0LiAgKi8K Kworc3RhdGljIHZvaWQKK2NoZWNrX2Zvcl9zYXZlZCAodm9pZCAqcmVzdWx0 X3VudHlwZWQsIHB2X3QgYWRkciwgQ09SRV9BRERSIHNpemUsIHB2X3QgdmFs dWUpCit7CisgIHN0cnVjdCBjcjE2X3Byb2xvZ3VlICpyZXN1bHQgPSAoc3Ry dWN0IGNyMTZfcHJvbG9ndWUgKikgcmVzdWx0X3VudHlwZWQ7CisKKyAgaWYg KHZhbHVlLmtpbmQgPT0gcHZrX3JlZ2lzdGVyCisgICAgICAmJiB2YWx1ZS5r ID09IDAKKyAgICAgICYmIHB2X2lzX3JlZ2lzdGVyIChhZGRyLCBDUjE2X1NQ X1JFR05VTSkKKyAgICAgICYmIHNpemUgPT0gcmVnaXN0ZXJfc2l6ZSAodGFy Z2V0X2dkYmFyY2goKSwgdmFsdWUucmVnKSkKKyAgICByZXN1bHQtPnJlZ19v ZmZzZXRbdmFsdWUucmVnXSA9IGFkZHIuazsKK30KKworLyogRGVmaW5lIGEg ImhhbmRsZSIgc3RydWN0IGZvciBmZXRjaGluZyB0aGUgbmV4dCBvcGNvZGUu ICAqLworCitzdHJ1Y3QgY3IxNl9nZXRfb3Bjb2RlX2J5dGVfaGFuZGxlCit7 CisgIENPUkVfQUREUiBwYzsKK307CisKKy8qIEFuYWx5emUgYSBwcm9sb2d1 ZSBzdGFydGluZyBhdCBTVEFSVF9QQywgZ29pbmcgbm8gZnVydGhlciB0aGFu CisgICBMSU1JVF9QQy4gIEZpbGwgaW4gUkVTVUxUIGFzIGFwcHJvcHJpYXRl LiAgKi8KKworc3RhdGljIHZvaWQKK2NyMTZfYW5hbHl6ZV9wcm9sb2d1ZSAo Q09SRV9BRERSIHN0YXJ0X3BjLAorCQkgICAgICAgQ09SRV9BRERSIGxpbWl0 X3BjLCBzdHJ1Y3QgY3IxNl9wcm9sb2d1ZSAqcmVzdWx0KQoreworICBDT1JF X0FERFIgcGMsIG5leHRfcGM7CisgIGdkYl9ieXRlIGluc25fYnl0ZTEsIGlu c25fYnl0ZTI7CisgIGludCBybjsKKyAgaW50IGxlbmd0aDsKKyAgcHZfdCBy ZWdbQ1IxNl9OVU1fUkVHU107CisgIHN0cnVjdCBwdl9hcmVhICpzdGFjazsK KyAgc3RydWN0IGNsZWFudXAgKmJhY2tfdG87CisgIENPUkVfQUREUiBhZnRl cl9sYXN0X2ZyYW1lX3NldHVwX2luc24gPSBzdGFydF9wYzsKKyAgaW50IGlz X2RlY29kZWQ7CisKKyAgbWVtc2V0IChyZXN1bHQsIDAsIHNpemVvZiAoKnJl c3VsdCkpOworCisgIGZvciAocm4gPSAwOyBybiA8IENSMTZfTlVNX1JFR1M7 IHJuKyspCisgICAgeworICAgICAgcmVnW3JuXSA9IHB2X3JlZ2lzdGVyIChy biwgMCk7CisgICAgICByZXN1bHQtPnJlZ19vZmZzZXRbcm5dID0gMTsKKyAg ICB9CisKKyAgc3RhY2sgPSBtYWtlX3B2X2FyZWEgKENSMTZfU1BfUkVHTlVN LCBnZGJhcmNoX2FkZHJfYml0ICh0YXJnZXRfZ2RiYXJjaCgpKSk7CisgIGJh Y2tfdG8gPSBtYWtlX2NsZWFudXBfZnJlZV9wdl9hcmVhIChzdGFjayk7CisK KyAgcGMgPSBzdGFydF9wYzsKKyAgd2hpbGUgKHBjIDwgbGltaXRfcGMpCisg ICAgeworICAgICAgZ2RiX2J5dGUgYnVmWzZdOworCisgICAgICAvKiBSZWFk IDYgYnl0ZXMsIG1heCA0OCBiaXQgb3Bjb2RlLiAgKi8KKyAgICAgIHRhcmdl dF9yZWFkX21lbW9yeSAocGMsIGJ1ZiwgNik7CisgICAgICBjcjE2X3dvcmRz WzBdID0gYnVmWzFdIDw8IDggfCBidWZbMF07CisgICAgICBjcjE2X3dvcmRz WzFdID0gYnVmWzNdIDw8IDggfCBidWZbMl07CisgICAgICBjcjE2X3dvcmRz WzJdID0gYnVmWzVdIDw8IDggfCBidWZbNF07CisgICAgICBjcjE2X2FsbFdv cmRzID0gKCgoVUxPTkdMT05HKSBjcjE2X3dvcmRzWzBdIDw8IDMyKQorCQkg ICAgICArICgoVUxPTkdMT05HKSBjcjE2X3dvcmRzWzFdIDw8IDE2KQorCQkg ICAgICArIGNyMTZfd29yZHNbMl0pOworCisgICAgICAvKiBGaW5kIGEgbWF0 Y2hpbmcgb3Bjb2RlIGluIHRhYmxlLgorICAgICAgICAgTm9uemVybyBtZWFu cyBpbnN0cnVjdGlvbiBoYXMgYSBtYXRjaC4gICovCisgICAgICBpc19kZWNv ZGVkID0gY3IxNl9tYXRjaF9vcGNvZGUgKCk7CisgICAgICBjcjE2X21ha2Vf aW5zdHJ1Y3Rpb24gKCk7CisgICAgICBsZW5ndGggPSBjcjE2X2N1cnJJbnNu LnNpemU7CisgICAgICBuZXh0X3BjID0gcGMgKyBsZW5ndGg7CisgICAgICBp bnNuX2J5dGUxID0gKGNyMTZfd29yZHNbMF0gPj4gOCkgJiAweEZGOworCisg ICAgICAvKiBJZiBQVVNILCB0aGVuIHNhdmUgUkEgYW5kIG90aGVyIHJlZ3Mu ICAqLworICAgICAgaWYgKGluc25fYnl0ZTEgPT0gMHgwMSkKKwl7CisJICBp bnQgcjEsIHIyOworCSAgaW50IHI7CisKKwkgIGluc25fYnl0ZTIgPSBjcjE2 X3dvcmRzWzBdOworCisJICBpZiAoaW5zbl9ieXRlMiAmIDB4ODApCisJICAg IHsKKwkgICAgICByZWdbQ1IxNl9TUF9SRUdOVU1dID0gcHZfYWRkX2NvbnN0 YW50IChyZWdbQ1IxNl9TUF9SRUdOVU1dLCAtNCk7CisJICAgICAgcHZfYXJl YV9zdG9yZSAoc3RhY2ssIHJlZ1tDUjE2X1NQX1JFR05VTV0sIDQsCisJCQkg ICAgIHJlZ1tDUjE2X1JBX1JFR05VTV0pOworCSAgICB9CisJICAvKiBTdGFy dCBSZWdpc3Rlcj1yMSwgMyBiaXQgaW1tIGNvdW50PXIyLiAgKi8KKwkgIHIx ID0gaW5zbl9ieXRlMiAmIDB4MEY7CisJICByMiA9ICgoaW5zbl9ieXRlMiAm IDB4NzApID4+IDQpOworCSAgcjIgPSByMiArIHIxICsgMTsKKworCSAgZm9y IChyID0gcjE7IHIgPCByMjsgcisrKQorCSAgICB7CisJICAgICAgaWYgKHIg Pj0gQ1IxNl9SMTJfUkVHTlVNKQorCQl7CisJCSAgcmVnW0NSMTZfU1BfUkVH TlVNXSA9CisJCSAgICBwdl9hZGRfY29uc3RhbnQgKHJlZ1tDUjE2X1NQX1JF R05VTV0sIC00KTsKKwkJICBwdl9hcmVhX3N0b3JlIChzdGFjaywgcmVnW0NS MTZfU1BfUkVHTlVNXSwgNCwgcmVnW3JdKTsKKwkJICByKys7CisJCX0KKwkg ICAgICBlbHNlCisJCXsKKwkJICByZWdbQ1IxNl9TUF9SRUdOVU1dID0KKwkJ ICAgIHB2X2FkZF9jb25zdGFudCAocmVnW0NSMTZfU1BfUkVHTlVNXSwgLTIp OworCQkgIHB2X2FyZWFfc3RvcmUgKHN0YWNrLCByZWdbQ1IxNl9TUF9SRUdO VU1dLCAyLCByZWdbcl0pOworCQl9CisJICAgIH0KKwkgIGFmdGVyX2xhc3Rf ZnJhbWVfc2V0dXBfaW5zbiA9IG5leHRfcGM7CisJfQorICAgICAgLyogQWRk IGNvbnN0YW50IHRvIFNQLiAgKi8KKyAgICAgIGVsc2UgaWYgKGluc25fYnl0 ZTEgPT0gMHg2MCkKKwl7CisJICBpbnQgcmRzdDsKKwkgIHNpZ25lZCBzaG9y dCBhZGRlbmQ7CisKKwkgIGluc25fYnl0ZTIgPSBjcjE2X3dvcmRzWzBdOwor CSAgcmRzdCA9IGluc25fYnl0ZTIgJiAweDBGOworCSAgaWYgKHJkc3QgPT0g Q1IxNl9TUF9SRUdOVU0pCisJICAgIHsKKwkgICAgICBpZiAobGVuZ3RoID09 IDIpCisJCXsKKwkJICBhZGRlbmQgPSAoaW5zbl9ieXRlMiAmIDB4RjApID4+ IDQ7CisJCSAgcmVnW3Jkc3RdID0gcHZfYWRkX2NvbnN0YW50IChyZWdbcmRz dF0sIGFkZGVuZCk7CisJCX0KKwkgICAgICBpZiAobGVuZ3RoID09IDQpCisJ CXsKKwkJICBhZGRlbmQgPSBjcjE2X3dvcmRzWzFdOworCQkgIHJlZ1tyZHN0 XSA9IHB2X2FkZF9jb25zdGFudCAocmVnW3Jkc3RdLCBhZGRlbmQpOworCQl9 CisJICAgICAgYWZ0ZXJfbGFzdF9mcmFtZV9zZXR1cF9pbnNuID0gbmV4dF9w YzsKKwkgICAgfQorCX0KKyAgICAgIC8qIENoZWNrIGZvciBNT1ZEIGluc24u ICAqLworICAgICAgZWxzZSBpZiAoaW5zbl9ieXRlMSA9PSAweDU1KQorCXsK KwkgIGludCByZHN0LCByc3JjOworCisJICBpbnNuX2J5dGUyID0gY3IxNl93 b3Jkc1swXTsKKwkgIHJzcmMgPSAoaW5zbl9ieXRlMiAmIDB4RjApID4+IDQ7 CisJICByZHN0ID0gKGluc25fYnl0ZTIgJiAweDBGKTsKKwkgIHJlZ1tyZHN0 XSA9IHJlZ1tyc3JjXTsKKwkgIGlmIChyc3JjID09IENSMTZfU1BfUkVHTlVN ICYmIHJkc3QgPT0gQ1IxNl9GUF9SRUdOVU0pCisJICAgIGFmdGVyX2xhc3Rf ZnJhbWVfc2V0dXBfaW5zbiA9IG5leHRfcGM7CisJfQorICAgICAgZWxzZSBp ZiAoKChpbnNuX2J5dGUxID4+IDQpICYgMHgwRikgPT0gMHhkKQorCXsKKwkg IC8qIFRoaXMgbW92ZXMgYW4gYXJndW1lbnQgcmVnaXN0ZXIgdG8gdGhlIHN0 YWNrLiAgRG9uJ3QKKwkgICAgIHJlY29yZCBpdCwgYnV0IGFsbG93IGl0IHRv IGJlIGEgcGFydCBvZiB0aGUgcHJvbG9ndWUuICAqLworCSAgYWZ0ZXJfbGFz dF9mcmFtZV9zZXR1cF9pbnNuID0gbmV4dF9wYzsKKwl9CisgICAgICBlbHNl CisJYnJlYWs7CQkvKiBUZXJtaW5hdGUgdGhlIHByb2xvZ3VlIHNjYW4uICAq LworCisgICAgICBwYyA9IG5leHRfcGM7CisgICAgfQorCisgIC8qIElzIHRo ZSBmcmFtZSBzaXplIChvZmZzZXQsIHJlYWxseSkgYSBrbm93biBjb25zdGFu dD8gICovCisgIGlmIChwdl9pc19yZWdpc3RlciAocmVnW0NSMTZfU1BfUkVH TlVNXSwgQ1IxNl9TUF9SRUdOVU0pKQorICAgIHJlc3VsdC0+ZnJhbWVfc2l6 ZSA9IHJlZ1tDUjE2X1NQX1JFR05VTV0uazsKKworICAvKiBXYXMgdGhlIGZy YW1lIHBvaW50ZXIgaW5pdGlhbGl6ZWQ/ICAqLworICBpZiAocHZfaXNfcmVn aXN0ZXIgKHJlZ1tDUjE2X0ZQX1JFR05VTV0sIENSMTZfU1BfUkVHTlVNKSkK KyAgICB7CisgICAgICByZXN1bHQtPmhhc19mcmFtZV9wdHIgPSAxOworICAg ICAgcmVzdWx0LT5mcmFtZV9wdHJfb2Zmc2V0ID0gcmVnW0NSMTZfRlBfUkVH TlVNXS5rOworICAgIH0KKworICAvKiBSZWNvcmQgd2hlcmUgYWxsIHRoZSBy ZWdpc3RlcnMgd2VyZSBzYXZlZC4gICovCisgIHB2X2FyZWFfc2NhbiAoc3Rh Y2ssIGNoZWNrX2Zvcl9zYXZlZCwgKHZvaWQgKikgcmVzdWx0KTsKKworICBy ZXN1bHQtPnByb2xvZ3VlX2VuZCA9IGFmdGVyX2xhc3RfZnJhbWVfc2V0dXBf aW5zbjsKKyAgZG9fY2xlYW51cHMgKGJhY2tfdG8pOworfQorCisKKy8qIElt cGxlbWVudCB0aGUgInNraXBfcHJvbG9ndWUiIGdkYmFyY2ggbWV0aG9kLiAg Ki8KKworc3RhdGljIENPUkVfQUREUgorY3IxNl9za2lwX3Byb2xvZ3VlIChz dHJ1Y3QgZ2RiYXJjaCAqZ2RiYXJjaCwgQ09SRV9BRERSIHBjKQoreworICBj b25zdCBjaGFyICpuYW1lOworICBDT1JFX0FERFIgZnVuY19hZGRyLCBmdW5j X2VuZDsKKyAgc3RydWN0IGNyMTZfcHJvbG9ndWUgcDsKKworICAvKiBUcnkg dG8gZmluZCB0aGUgZXh0ZW50IG9mIHRoZSBmdW5jdGlvbiB0aGF0IGNvbnRh aW5zIFBDLiAgKi8KKyAgaWYgKCFmaW5kX3BjX3BhcnRpYWxfZnVuY3Rpb24g KHBjLCAmbmFtZSwgJmZ1bmNfYWRkciwgJmZ1bmNfZW5kKSkKKyAgICByZXR1 cm4gcGM7CisKKyAgY3IxNl9hbmFseXplX3Byb2xvZ3VlIChwYywgZnVuY19l bmQsICZwKTsKKyAgcmV0dXJuIHAucHJvbG9ndWVfZW5kOworfQorCisvKiBH aXZlbiBhIGZyYW1lIGRlc2NyaWJlZCBieSBUSElTX0ZSQU1FLCBkZWNvZGUg dGhlIHByb2xvZ3VlIG9mIGl0cworICAgYXNzb2NpYXRlZCBmdW5jdGlvbiBp ZiB0aGVyZSBpcyBub3QgY2FjaGUgZW50cnkgYXMgc3BlY2lmaWVkIGJ5Cisg ICBUSElTX1BST0xPR1VFX0NBQ0hFLiAgU2F2ZSB0aGUgZGVjb2RlZCBwcm9s b2d1ZSBpbiB0aGUgY2FjaGUgYW5kCisgICByZXR1cm4gdGhhdCBzdHJ1Y3Qg YXMgdGhlIHZhbHVlIG9mIHRoaXMgZnVuY3Rpb24uICAqLworCitzdGF0aWMg c3RydWN0IGNyMTZfcHJvbG9ndWUgKgorY3IxNl9hbmFseXplX2ZyYW1lX3By b2xvZ3VlIChzdHJ1Y3QgZnJhbWVfaW5mbyAqdGhpc19mcmFtZSwKKwkJCSAg ICAgdm9pZCAqKnRoaXNfcHJvbG9ndWVfY2FjaGUpCit7CisgIGlmICgqdGhp c19wcm9sb2d1ZV9jYWNoZSkKKyAgICByZXR1cm4gKnRoaXNfcHJvbG9ndWVf Y2FjaGU7CisKKyAgQ09SRV9BRERSIGZ1bmNfc3RhcnQsIHN0b3BfYWRkcjsK KworICAqdGhpc19wcm9sb2d1ZV9jYWNoZSA9IEZSQU1FX09CU1RBQ0tfWkFM TE9DIChzdHJ1Y3QgY3IxNl9wcm9sb2d1ZSk7CisgIGZ1bmNfc3RhcnQgPSBn ZXRfZnJhbWVfZnVuYyAodGhpc19mcmFtZSk7CisgIHN0b3BfYWRkciA9IGdl dF9mcmFtZV9wYyAodGhpc19mcmFtZSk7CisKKyAvKiBJZiB3ZSBjb3VsZG4n dCBmaW5kIGFueSBmdW5jdGlvbiBjb250YWluaW5nIHRoZSBQQywgdGhlbgor ICAgICBqdXN0IGluaXRpYWxpemUgdGhlIHByb2xvZ3VlIGNhY2hlLCBidXQg ZG9uJ3QgZG8gYW55dGhpbmcuICAqLworICBpZiAoIWZ1bmNfc3RhcnQpCisg ICAgc3RvcF9hZGRyID0gZnVuY19zdGFydDsKKworICBjcjE2X2FuYWx5emVf cHJvbG9ndWUgKGZ1bmNfc3RhcnQsIHN0b3BfYWRkciwgKnRoaXNfcHJvbG9n dWVfY2FjaGUpOworCisgIHJldHVybiAqdGhpc19wcm9sb2d1ZV9jYWNoZTsK K30KKworLyogR2l2ZW4gdGhlIG5leHQgZnJhbWUgYW5kIGEgcHJvbG9ndWUg Y2FjaGUsIHJldHVybiB0aGlzIGZyYW1lJ3MKKyAgIGJhc2UuICAqLworCitz dGF0aWMgQ09SRV9BRERSCitjcjE2X2ZyYW1lX2Jhc2UgKHN0cnVjdCBmcmFt ZV9pbmZvICp0aGlzX2ZyYW1lLCB2b2lkICoqdGhpc19wcm9sb2d1ZV9jYWNo ZSkKK3sKKyAgc3RydWN0IGNyMTZfcHJvbG9ndWUgKnAKKyAgICA9IGNyMTZf YW5hbHl6ZV9mcmFtZV9wcm9sb2d1ZSAodGhpc19mcmFtZSwgdGhpc19wcm9s b2d1ZV9jYWNoZSk7CisKKyAgLyogSW4gZnVuY3Rpb25zIHRoYXQgdXNlIGFs bG9jYSwgdGhlIGRpc3RhbmNlIGJldHdlZW4gdGhlIHN0YWNrCisgICAgIHBv aW50ZXIgYW5kIHRoZSBmcmFtZSBiYXNlIHZhcmllcyBkeW5hbWljYWxseSwg c28gd2UgY2FuJ3QgdXNlCisgICAgIHRoZSBTUCBwbHVzIHN0YXRpYyBpbmZv cm1hdGlvbiBsaWtlIHByb2xvZ3VlIGFuYWx5c2lzIHRvIGZpbmQgdGhlCisg ICAgIGZyYW1lIGJhc2UuICBIb3dldmVyLCBzdWNoIGZ1bmN0aW9ucyBtdXN0 IGhhdmUgYSBmcmFtZSBwb2ludGVyLAorICAgICB0byBiZSBhYmxlIHRvIHJl c3RvcmUgdGhlIFNQIG9uIGV4aXQuICBTbyB3aGVuZXZlciB3ZSBkbyBoYXZl IGEKKyAgICAgZnJhbWUgcG9pbnRlciwgdXNlIHRoYXQgdG8gZmluZCB0aGUg YmFzZS4gICovCisgIGlmIChwLT5oYXNfZnJhbWVfcHRyKQorICAgIHsKKyAg ICAgIENPUkVfQUREUiBmcCA9IGdldF9mcmFtZV9yZWdpc3Rlcl91bnNpZ25l ZCAodGhpc19mcmFtZSwgQ1IxNl9GUF9SRUdOVU0pOworCisgICAgICByZXR1 cm4gZnAgLSBwLT5mcmFtZV9wdHJfb2Zmc2V0OworICAgIH0KKyAgZWxzZQor ICAgIHsKKyAgICAgIENPUkVfQUREUiBzcCA9IGdldF9mcmFtZV9yZWdpc3Rl cl91bnNpZ25lZCAodGhpc19mcmFtZSwgQ1IxNl9TUF9SRUdOVU0pOworCisg ICAgICByZXR1cm4gc3AgLSBwLT5mcmFtZV9zaXplOworICAgIH0KK30KKwor LyogSW1wbGVtZW50IHRoZSAiZnJhbWVfdGhpc19pZCIgbWV0aG9kIGZvciB1 bndpbmRpbmcgZnJhbWVzLiAgKi8KKworc3RhdGljIHZvaWQKK2NyMTZfZnJh bWVfdGhpc19pZCAoc3RydWN0IGZyYW1lX2luZm8gKnRoaXNfZnJhbWUsCisJ CSAgICB2b2lkICoqdGhpc19wcm9sb2d1ZV9jYWNoZSwgc3RydWN0IGZyYW1l X2lkICp0aGlzX2lkKQoreworICAqdGhpc19pZCA9CisgICAgZnJhbWVfaWRf YnVpbGQgKGNyMTZfZnJhbWVfYmFzZSAodGhpc19mcmFtZSwgdGhpc19wcm9s b2d1ZV9jYWNoZSksCisJCSAgICBnZXRfZnJhbWVfZnVuYyAodGhpc19mcmFt ZSkpOworfQorCisvKiBJbXBsZW1lbnQgdGhlICJmcmFtZV9wcmV2X3JlZ2lz dGVyIiBtZXRob2QgZm9yIHVud2luZGluZyBmcmFtZXMuICAqLworCitzdGF0 aWMgc3RydWN0IHZhbHVlICoKK2NyMTZfZnJhbWVfcHJldl9yZWdpc3RlciAo c3RydWN0IGZyYW1lX2luZm8gKnRoaXNfZnJhbWUsCisJCQkgIHZvaWQgKip0 aGlzX3Byb2xvZ3VlX2NhY2hlLCBpbnQgcmVnbnVtKQoreworICBzdHJ1Y3Qg Y3IxNl9wcm9sb2d1ZSAqcCA9CisgICAgY3IxNl9hbmFseXplX2ZyYW1lX3By b2xvZ3VlICh0aGlzX2ZyYW1lLCB0aGlzX3Byb2xvZ3VlX2NhY2hlKTsKKyAg Q09SRV9BRERSIGZyYW1lX2Jhc2UgPSBjcjE2X2ZyYW1lX2Jhc2UgKHRoaXNf ZnJhbWUsIHRoaXNfcHJvbG9ndWVfY2FjaGUpOworCisgIGlmIChyZWdudW0g PT0gQ1IxNl9TUF9SRUdOVU0pCisgICAgcmV0dXJuIGZyYW1lX3Vud2luZF9n b3RfY29uc3RhbnQgKHRoaXNfZnJhbWUsIHJlZ251bSwgZnJhbWVfYmFzZSk7 CisKKyAgLyogVGhlIGNhbGwgaW5zdHJ1Y3Rpb24gaGFzIHNhdmVkIHRoZSBy ZXR1cm4gYWRkcmVzcyBvbiB0aGUgUkEKKyAgICAgcmVnaXN0ZXIsIENSMTZf UjEzX1JFR05VTS4gIFNvLCB3ZSBuZWVkIG5vdCBhZGp1c3QgYW55dGhpbmcK KyAgICAgZGlyZWN0bHkuICBXZSB3aWxsIGFuYWx5emUgcHJvbG9ndWUgYXMg dGhpcyBSQSByZWdpc3RlciBpcworICAgICBwdXNoZWQgb250byBzdGFjayBm b3IgZnVydGhlciBsZWFmIGZ1bmN0aW9uIGNhbGxzIHRvIHdvcmsuICAqLwor ICBlbHNlIGlmIChyZWdudW0gPT0gQ1IxNl9QQ19SRUdOVU0pCisgICAgewor ICAgICAgVUxPTkdFU1QgcmFfcHJldjsKKworICAgICAgcmFfcHJldiA9IGZy YW1lX3Vud2luZF9yZWdpc3Rlcl91bnNpZ25lZCAodGhpc19mcmFtZSwgQ1Ix Nl9SQV9SRUdOVU0pOworICAgICAgcmFfcHJldiA9IHJhX3ByZXYgPDwgMTsK KyAgICAgIHJldHVybiBmcmFtZV91bndpbmRfZ290X2NvbnN0YW50ICh0aGlz X2ZyYW1lLCBDUjE2X1BDX1JFR05VTSwgcmFfcHJldik7CisgICAgfQorCisg IC8qIElmIHByb2xvZ3VlIGFuYWx5c2lzIHNheXMgd2Ugc2F2ZWQgdGhpcyBy ZWdpc3RlciBzb21ld2hlcmUsCisgICAgIHJldHVybiBhIGRlc2NyaXB0aW9u IG9mIHRoZSBzdGFjayBzbG90IGhvbGRpbmcgaXQuICAqLworICBlbHNlIGlm IChwLT5yZWdfb2Zmc2V0W3JlZ251bV0gIT0gMSkKKyAgICAgIHJldHVybiBm cmFtZV91bndpbmRfZ290X21lbW9yeSAodGhpc19mcmFtZSwgcmVnbnVtLAor CQkJCSAgICAgIGZyYW1lX2Jhc2UgKyBwLT5yZWdfb2Zmc2V0W3JlZ251bV0p OworCisgIC8qIE90aGVyd2lzZSwgcHJlc3VtZSB3ZSBoYXZlbid0IGNoYW5n ZWQgdGhlIHZhbHVlIG9mIHRoaXMKKyAgICAgcmVnaXN0ZXIsIGFuZCBnZXQg aXQgZnJvbSB0aGUgbmV4dCBmcmFtZS4gICovCisgIGVsc2UKKyAgICAgIHJl dHVybiBmcmFtZV91bndpbmRfZ290X3JlZ2lzdGVyICh0aGlzX2ZyYW1lLCBy ZWdudW0sIHJlZ251bSk7Cit9CisKK3N0YXRpYyBjb25zdCBzdHJ1Y3QgZnJh bWVfdW53aW5kIGNyMTZfZnJhbWVfdW53aW5kID0KK3sKKyAgTk9STUFMX0ZS QU1FLAorICBkZWZhdWx0X2ZyYW1lX3Vud2luZF9zdG9wX3JlYXNvbiwKKyAg Y3IxNl9mcmFtZV90aGlzX2lkLAorICBjcjE2X2ZyYW1lX3ByZXZfcmVnaXN0 ZXIsCisgIE5VTEwsCisgIGRlZmF1bHRfZnJhbWVfc25pZmZlcgorfTsKKwor LyogSW1wbGVtZW50IHRoZSAidW53aW5kX3BjIiBnZGJhcmNoIG1ldGhvZC4g ICovCisKK3N0YXRpYyBDT1JFX0FERFIKK2NyMTZfdW53aW5kX3BjIChzdHJ1 Y3QgZ2RiYXJjaCAqZ2RiYXJjaCwgc3RydWN0IGZyYW1lX2luZm8gKnRoaXNf ZnJhbWUpCit7CisgIENPUkVfQUREUiBwYzsKKworICBwYyA9IGZyYW1lX3Vu d2luZF9yZWdpc3Rlcl91bnNpZ25lZCAodGhpc19mcmFtZSwgQ1IxNl9QQ19S RUdOVU0pOworICByZXR1cm4gcGM7Cit9CisKKy8qIEltcGxlbWVudCB0aGUg InVud2luZF9zcCIgZ2RiYXJjaCBtZXRob2QuICAqLworCitzdGF0aWMgQ09S RV9BRERSCitjcjE2X3Vud2luZF9zcCAoc3RydWN0IGdkYmFyY2ggKmdkYmFy Y2gsIHN0cnVjdCBmcmFtZV9pbmZvICp0aGlzX2ZyYW1lKQoreworICBDT1JF X0FERFIgc3A7CisKKyAgc3AgPSBmcmFtZV91bndpbmRfcmVnaXN0ZXJfdW5z aWduZWQgKHRoaXNfZnJhbWUsIENSMTZfU1BfUkVHTlVNKTsKKyAgcmV0dXJu IHNwOworfQorCisvKiBJbXBsZW1lbnQgdGhlICJkdW1teV9pZCIgZ2RiYXJj aCBtZXRob2QuICAqLworCitzdGF0aWMgc3RydWN0IGZyYW1lX2lkCitjcjE2 X2R1bW15X2lkIChzdHJ1Y3QgZ2RiYXJjaCAqZ2RiYXJjaCwgc3RydWN0IGZy YW1lX2luZm8gKnRoaXNfZnJhbWUpCit7CisgIHJldHVybgorICAgIGZyYW1l X2lkX2J1aWxkIChnZXRfZnJhbWVfcmVnaXN0ZXJfdW5zaWduZWQgKHRoaXNf ZnJhbWUsIENSMTZfU1BfUkVHTlVNKSwKKwkJICAgIGdldF9mcmFtZV9wYyAo dGhpc19mcmFtZSkpOworfQorCisvKiBJbXBsZW1lbnQgdGhlICJwdXNoX2R1 bW15X2NhbGwiIGdkYmFyY2ggbWV0aG9kLiAgKi8KKworc3RhdGljIENPUkVf QUREUgorY3IxNl9wdXNoX2R1bW15X2NhbGwgKHN0cnVjdCBnZGJhcmNoICpn ZGJhcmNoLCBzdHJ1Y3QgdmFsdWUgKmZ1bmN0aW9uLAorCQkgICAgICBzdHJ1 Y3QgcmVnY2FjaGUgKnJlZ2NhY2hlLCBDT1JFX0FERFIgYnBfYWRkciwgaW50 IG5hcmdzLAorCQkgICAgICBzdHJ1Y3QgdmFsdWUgKiphcmdzLCBDT1JFX0FE RFIgc3AsIGludCBzdHJ1Y3RfcmV0dXJuLAorCQkgICAgICBDT1JFX0FERFIg c3RydWN0X2FkZHIpCit7CisgIGVudW0gYmZkX2VuZGlhbiBieXRlX29yZGVy ID0gZ2RiYXJjaF9ieXRlX29yZGVyIChnZGJhcmNoKTsKKyAgaW50IHdyaXRl X3Bhc3M7CisgIGludCBzcF9vZmYgPSAwOworICBDT1JFX0FERFIgY2ZhOwor ICBpbnQgbnVtX3JlZ2lzdGVyX2NhbmRpZGF0ZV9hcmdzOworCisgIHN0cnVj dCB0eXBlICpmdW5jX3R5cGUgPSB2YWx1ZV90eXBlIChmdW5jdGlvbik7CisK KyAgLyogRGVyZWZlcmVuY2UgZnVuY3Rpb24gcG9pbnRlciB0eXBlcy4gICov CisgIHdoaWxlIChUWVBFX0NPREUgKGZ1bmNfdHlwZSkgPT0gVFlQRV9DT0RF X1BUUikKKyAgICBmdW5jX3R5cGUgPSBUWVBFX1RBUkdFVF9UWVBFIChmdW5j X3R5cGUpOworCisgIC8qIFRoZSBlbmQgcmVzdWx0IGhhZCBiZXR0ZXIgYmUg YSBmdW5jdGlvbiBvciBhIG1ldGhvZC4gICovCisgIGdkYl9hc3NlcnQgKFRZ UEVfQ09ERSAoZnVuY190eXBlKSA9PSBUWVBFX0NPREVfRlVOQworCSAgICAg IHx8IFRZUEVfQ09ERSAoZnVuY190eXBlKSA9PSBUWVBFX0NPREVfTUVUSE9E KTsKKworICAvKiBGdW5jdGlvbnMgd2l0aCBhIHZhcmlhYmxlIG51bWJlciBv ZiBhcmd1bWVudHMgaGF2ZSBhbGwgb2YgdGhlaXIKKyAgICAgdmFyaWFibGUg YXJndW1lbnRzIGFuZCB0aGUgbGFzdCBub24tdmFyaWFibGUgYXJndW1lbnQg cGFzc2VkCisgICAgIG9uIHRoZSBzdGFjay4KKworICAgICBPdGhlcndpc2Us IHdlIGNhbiBwYXNzIHVwIHRvIGZvdXIgYXJndW1lbnRzIG9uIHRoZSBzdGFj ay4KKworICAgICBPbmNlIGNvbXB1dGVkLCB3ZSBsZWF2ZSB0aGlzIHZhbHVl IGFsb25lLiAgSS5lLiB3ZSBkb24ndCB1cGRhdGUKKyAgICAgaXQgaW4gY2Fz ZSBvZiBhIHN0cnVjdCByZXR1cm4gZ29pbmcgaW4gYSByZWdpc3RlciBvciBh biBhcmd1bWVudAorICAgICByZXF1aXJpbmcgbXVsdGlwbGUgcmVnaXN0ZXJz LCBldGMuICBXZSByZWx5IGluc3RlYWQgb24gdGhlIHZhbHVlCisgICAgIG9m IHRoZSBgYGFyZ19yZWcnJyB2YXJpYWJsZSB0byBnZXQgdGhlc2Ugb3RoZXIg ZGV0YWlscyBjb3JyZWN0LiAgKi8KKworICBpZiAoVFlQRV9WQVJBUkdTIChm dW5jX3R5cGUpKQorICAgIG51bV9yZWdpc3Rlcl9jYW5kaWRhdGVfYXJncyA9 IFRZUEVfTkZJRUxEUyAoZnVuY190eXBlKSAtIDE7CisgIGVsc2UKKyAgICBu dW1fcmVnaXN0ZXJfY2FuZGlkYXRlX2FyZ3MgPSA0OworCisgIC8qIFdlIG1h a2UgdHdvIHBhc3NlczsgdGhlIGZpcnN0IGRvZXMgdGhlIHN0YWNrIGFsbG9j YXRpb24sCisgICAgIHRoZSBzZWNvbmQgYWN0dWFsbHkgc3RvcmVzIHRoZSBh cmd1bWVudHMuICAqLworICBmb3IgKHdyaXRlX3Bhc3MgPSAwOyB3cml0ZV9w YXNzIDw9IDE7IHdyaXRlX3Bhc3MrKykKKyAgICB7CisgICAgICBpbnQgaTsK KyAgICAgIGludCBhcmdfcmVnID0gQ1IxNl9SMF9SRUdOVU07CisKKyAgICAg IGlmICh3cml0ZV9wYXNzKQorCXNwID0gYWxpZ25fZG93biAoc3AgLSBzcF9v ZmYsIDQpOworICAgICAgc3Bfb2ZmID0gMDsKKworICAgICAgaWYgKHN0cnVj dF9yZXR1cm4pCisJeworCSAgc3RydWN0IHR5cGUgKnJldHVybl90eXBlID0g VFlQRV9UQVJHRVRfVFlQRSAoZnVuY190eXBlKTsKKworCSAgZ2RiX2Fzc2Vy dCAoVFlQRV9DT0RFIChyZXR1cm5fdHlwZSkgPT0gVFlQRV9DT0RFX1NUUlVD VAorCQkgICAgICB8fCBUWVBFX0NPREUgKGZ1bmNfdHlwZSkgPT0gVFlQRV9D T0RFX1VOSU9OKTsKKworCSAgaWYgKFRZUEVfTEVOR1RIIChyZXR1cm5fdHlw ZSkgPiAxNgorCSAgICAgIHx8IFRZUEVfTEVOR1RIIChyZXR1cm5fdHlwZSkg JSA0ICE9IDApCisJICAgIHsKKwkgICAgICBpZiAod3JpdGVfcGFzcykKKwkJ cmVnY2FjaGVfY29va2VkX3dyaXRlX3Vuc2lnbmVkIChyZWdjYWNoZSwgQ1Ix Nl9SMTJfUkVHTlVNLAorCQkJCQkJc3RydWN0X2FkZHIpOworCSAgICB9CisJ fQorCisgICAgICAvKiBQdXNoIHRoZSBhcmd1bWVudHMuICAqLworICAgICAg Zm9yIChpID0gMDsgaSA8IG5hcmdzOyBpKyspCisJeworCSAgc3RydWN0IHZh bHVlICphcmcgPSBhcmdzW2ldOworCSAgY29uc3QgZ2RiX2J5dGUgKmFyZ19i aXRzID0gdmFsdWVfY29udGVudHNfYWxsIChhcmcpOworCSAgc3RydWN0IHR5 cGUgKmFyZ190eXBlID0gY2hlY2tfdHlwZWRlZiAodmFsdWVfdHlwZSAoYXJn KSk7CisJICBVTE9OR0VTVCBhcmdfc2l6ZSA9IFRZUEVfTEVOR1RIIChhcmdf dHlwZSk7CisKKwkgIGlmIChpID09IDAgJiYgc3RydWN0X2FkZHIgIT0gMCAm JiAhc3RydWN0X3JldHVybgorCSAgICAgICYmIFRZUEVfQ09ERSAoYXJnX3R5 cGUpID09IFRZUEVfQ09ERV9QVFIKKwkgICAgICAmJiBleHRyYWN0X3Vuc2ln bmVkX2ludGVnZXIgKGFyZ19iaXRzLCA0LAorCQkJCQkgICBieXRlX29yZGVy KSA9PSBzdHJ1Y3RfYWRkcikKKwkgICAgeworCSAgICAgIC8qIFRoaXMgYXJn dW1lbnQgcmVwcmVzZW50cyB0aGUgYWRkcmVzcyBhdCB3aGljaCBDKysgKGFu ZAorCSAgICAgICAgIHBvc3NpYmx5IG90aGVyIGxhbmd1YWdlcykgc3RvcmUg dGhlaXIgcmV0dXJuIHZhbHVlLgorCSAgICAgICAgIFB1dCB0aGlzIHZhbHVl IGluIFIxMi4gICovCisJICAgICAgaWYgKHdyaXRlX3Bhc3MpCisJCXJlZ2Nh Y2hlX2Nvb2tlZF93cml0ZV91bnNpZ25lZCAocmVnY2FjaGUsIENSMTZfUjEy X1JFR05VTSwKKwkJCQkJCXN0cnVjdF9hZGRyKTsKKwkgICAgfQorCSAgZWxz ZSBpZiAoVFlQRV9DT0RFIChhcmdfdHlwZSkgIT0gVFlQRV9DT0RFX1NUUlVD VAorCQkgICAmJiBUWVBFX0NPREUgKGFyZ190eXBlKSAhPSBUWVBFX0NPREVf VU5JT04pCisJICAgIHsKKwkgICAgICAvKiBBcmd1bWVudCBpcyBhIHNjYWxh ci4gICovCisJICAgICAgaWYgKGFyZ19zaXplID09IDgpCisJCXsKKwkJICBp ZiAoaSA8IG51bV9yZWdpc3Rlcl9jYW5kaWRhdGVfYXJncworCQkgICAgICAm JiBhcmdfcmVnIDw9IENSMTZfUjdfUkVHTlVNIC0gMSkKKwkJICAgIHsKKwkJ ICAgICAgLyogSWYgYXJndW1lbnQgcmVnaXN0ZXJzIGFyZSBnb2luZyB0byBi ZSB1c2VkIHRvIHBhc3MKKwkJICAgICAgICAgYW4gOCBieXRlIHNjYWxhciwg dGhlIEFCSSBzcGVjaWZpZXMgdGhhdCB0d28gcmVnaXN0ZXJzCisJCSAgICAg ICAgIG11c3QgYmUgYXZhaWxhYmxlLiAgKi8KKwkJICAgICAgaWYgKHdyaXRl X3Bhc3MpCisJCQl7CisJCQkgIHJlZ2NhY2hlX2Nvb2tlZF93cml0ZV91bnNp Z25lZCAocmVnY2FjaGUsIGFyZ19yZWcsCisJCQkJCQkJICBleHRyYWN0X3Vu c2lnbmVkX2ludGVnZXIKKwkJCQkJCQkgIChhcmdfYml0cywgNCwKKwkJCQkJ CQkgICBieXRlX29yZGVyKSk7CisJCQkgIHJlZ2NhY2hlX2Nvb2tlZF93cml0 ZV91bnNpZ25lZCAocmVnY2FjaGUsCisJCQkJCQkJICBhcmdfcmVnICsgMSwK KwkJCQkJCQkgIGV4dHJhY3RfdW5zaWduZWRfaW50ZWdlcgorCQkJCQkJCSAg KGFyZ19iaXRzICsgNCwgNCwKKwkJCQkJCQkgICBieXRlX29yZGVyKSk7CisJ CQl9CisJCSAgICAgIGFyZ19yZWcgKz0gMjsKKwkJICAgIH0KKwkJICBlbHNl CisJCSAgICB7CisJCSAgICAgIHNwX29mZiA9IGFsaWduX3VwIChzcF9vZmYs IDQpOworCQkgICAgICAvKiBPdGhlcndpc2UsIHBhc3MgdGhlIDggYnl0ZSBz Y2FsYXIgb24gdGhlIHN0YWNrLiAgKi8KKwkJICAgICAgaWYgKHdyaXRlX3Bh c3MpCisJCQl3cml0ZV9tZW1vcnkgKHNwICsgc3Bfb2ZmLCBhcmdfYml0cywg OCk7CisJCSAgICAgIHNwX29mZiArPSA4OworCQkgICAgfQorCQl9CisJICAg ICAgZWxzZQorCQl7CisJCSAgVUxPTkdFU1QgdTsKKworCQkgIGdkYl9hc3Nl cnQgKGFyZ19zaXplIDw9IDQpOworCisJCSAgdSA9IGV4dHJhY3RfdW5zaWdu ZWRfaW50ZWdlciAoYXJnX2JpdHMsIGFyZ19zaXplLCBieXRlX29yZGVyKTsK KworCQkgIGlmIChpIDwgbnVtX3JlZ2lzdGVyX2NhbmRpZGF0ZV9hcmdzCisJ CSAgICAgICYmIGFyZ19yZWcgPD0gQ1IxNl9SN19SRUdOVU0pCisJCSAgICB7 CisJCSAgICAgIGlmICh3cml0ZV9wYXNzKQorCQkJcmVnY2FjaGVfY29va2Vk X3dyaXRlX3Vuc2lnbmVkIChyZWdjYWNoZSwgYXJnX3JlZywgdSk7CisJCSAg ICAgIGFyZ19yZWcgKz0gMTsKKwkJICAgIH0KKwkJICBlbHNlCisJCSAgICB7 CisJCSAgICAgIGludCBwX2FyZ19zaXplID0gNDsKKworCQkgICAgICBpZiAo VFlQRV9QUk9UT1RZUEVEIChmdW5jX3R5cGUpCisJCQkgICYmIGkgPCBUWVBF X05GSUVMRFMgKGZ1bmNfdHlwZSkpCisJCQl7CisJCQkgIHN0cnVjdCB0eXBl ICpwX2FyZ190eXBlID0KKwkJCSAgICBUWVBFX0ZJRUxEX1RZUEUgKGZ1bmNf dHlwZSwgaSk7CisJCQkgIHBfYXJnX3NpemUgPSBUWVBFX0xFTkdUSCAocF9h cmdfdHlwZSk7CisJCQl9CisKKwkJICAgICAgc3Bfb2ZmID0gYWxpZ25fdXAg KHNwX29mZiwgcF9hcmdfc2l6ZSk7CisKKwkJICAgICAgaWYgKHdyaXRlX3Bh c3MpCisJCQl3cml0ZV9tZW1vcnlfdW5zaWduZWRfaW50ZWdlciAoc3AgKyBz cF9vZmYsCisJCQkJCQkgICAgICAgcF9hcmdfc2l6ZSwgYnl0ZV9vcmRlciwK KwkJCQkJCSAgICAgICB1KTsKKwkJICAgICAgc3Bfb2ZmICs9IHBfYXJnX3Np emU7CisJCSAgICB9CisJCX0KKwkgICAgfQorCSAgZWxzZQorCSAgICB7CisJ ICAgICAgLyogQXJndW1lbnQgaXMgYSBzdHJ1Y3Qgb3IgdW5pb24uICBQYXNz IGFzIG11Y2ggb2YgdGhlIHN0cnVjdAorCSAgICAgICAgIGluIHJlZ2lzdGVy cywgYXMgcG9zc2libGUuICBQYXNzIHRoZSByZXN0IG9uIHRoZSBzdGFjay4g ICovCisJICAgICAgd2hpbGUgKGFyZ19zaXplID4gMCkKKwkJeworCQkgIGlm IChpIDwgbnVtX3JlZ2lzdGVyX2NhbmRpZGF0ZV9hcmdzCisJCSAgICAgICYm IGFyZ19yZWcgPD0gQ1IxNl9SN19SRUdOVU0KKwkJICAgICAgJiYgYXJnX3Np emUgPD0gNCAqIChDUjE2X1I3X1JFR05VTSAtIGFyZ19yZWcgKyAxKQorCQkg ICAgICAmJiBhcmdfc2l6ZSAlIDQgPT0gMCkKKwkJICAgIHsKKwkJICAgICAg aW50IGxlbiA9IG1pbiAoYXJnX3NpemUsIDQpOworCisJCSAgICAgIGlmICh3 cml0ZV9wYXNzKQorCQkJcmVnY2FjaGVfY29va2VkX3dyaXRlX3Vuc2lnbmVk IChyZWdjYWNoZSwgYXJnX3JlZywKKwkJCQkJCQlleHRyYWN0X3Vuc2lnbmVk X2ludGVnZXIKKwkJCQkJCQkoYXJnX2JpdHMsIGxlbiwKKwkJCQkJCQkgYnl0 ZV9vcmRlcikpOworCQkgICAgICBhcmdfYml0cyArPSBsZW47CisJCSAgICAg IGFyZ19zaXplIC09IGxlbjsKKwkJICAgICAgYXJnX3JlZysrOworCQkgICAg fQorCQkgIGVsc2UKKwkJICAgIHsKKwkJICAgICAgc3Bfb2ZmID0gYWxpZ25f dXAgKHNwX29mZiwgNCk7CisJCSAgICAgIGlmICh3cml0ZV9wYXNzKQorCQkJ d3JpdGVfbWVtb3J5IChzcCArIHNwX29mZiwgYXJnX2JpdHMsIGFyZ19zaXpl KTsKKwkJICAgICAgc3Bfb2ZmICs9IGFsaWduX3VwIChhcmdfc2l6ZSwgNCk7 CisJCSAgICAgIGFyZ19zaXplID0gMDsKKwkJICAgIH0KKwkJfQorCSAgICB9 CisJfQorICAgIH0KKworICAvKiBLZWVwIHRyYWNrIG9mIHRoZSBzdGFjayBh ZGRyZXNzIHByaW9yIHRvIHB1c2hpbmcgdGhlIHJldHVybiBhZGRyZXNzLgor ICAgICBUaGlzIGlzIHRoZSB2YWx1ZSB0aGF0IHdlJ2xsIHJldHVybi4gICov CisgIGNmYSA9IHNwOworCisgIC8qIFB1c2ggdGhlIHJldHVybiBhZGRyZXNz LiAgKi8KKyAgc3AgPSBzcCAtIDQ7CisgIHdyaXRlX21lbW9yeV91bnNpZ25l ZF9pbnRlZ2VyIChzcCwgNCwgYnl0ZV9vcmRlciwgYnBfYWRkcik7CisKKyAg LyogVXBkYXRlIHRoZSBzdGFjayBwb2ludGVyLiAgKi8KKyAgcmVnY2FjaGVf Y29va2VkX3dyaXRlX3Vuc2lnbmVkIChyZWdjYWNoZSwgQ1IxNl9TUF9SRUdO VU0sIHNwKTsKKworICByZXR1cm4gY2ZhOworfQorCisvKiBJbXBsZW1lbnQg dGhlICJyZXR1cm5fdmFsdWUiIGdkYmFyY2ggbWV0aG9kLiAgKi8KKworc3Rh dGljIGVudW0gcmV0dXJuX3ZhbHVlX2NvbnZlbnRpb24KK2NyMTZfcmV0dXJu X3ZhbHVlIChzdHJ1Y3QgZ2RiYXJjaCAqZ2RiYXJjaCwKKwkJICAgc3RydWN0 IHR5cGUgKmZ1bmNfdHlwZSwKKwkJICAgc3RydWN0IHR5cGUgKnZhbHR5cGUs CisJCSAgIHN0cnVjdCByZWdjYWNoZSAqcmVnY2FjaGUsCisJCSAgIGdkYl9i eXRlICogcmVhZGJ1ZiwgY29uc3QgZ2RiX2J5dGUgKiB3cml0ZWJ1ZikKK3sK KyAgZW51bSBiZmRfZW5kaWFuIGJ5dGVfb3JkZXIgPSBnZGJhcmNoX2J5dGVf b3JkZXIgKGdkYmFyY2gpOworICBVTE9OR0VTVCB2YWx0eXBlX2xlbiA9IFRZ UEVfTEVOR1RIICh2YWx0eXBlKTsKKworICBpZiAoVFlQRV9MRU5HVEggKHZh bHR5cGUpID4gMTYKKyAgICAgIHx8ICgoVFlQRV9DT0RFICh2YWx0eXBlKSA9 PSBUWVBFX0NPREVfU1RSVUNUCisJICAgfHwgVFlQRV9DT0RFICh2YWx0eXBl KSA9PSBUWVBFX0NPREVfVU5JT04pCisJICAmJiBUWVBFX0xFTkdUSCAodmFs dHlwZSkgJSA0ICE9IDApKQorICAgIHJldHVybiBSRVRVUk5fVkFMVUVfU1RS VUNUX0NPTlZFTlRJT047CisKKyAgaWYgKHJlYWRidWYpCisgICAgeworICAg ICAgVUxPTkdFU1QgdTsKKyAgICAgIGludCBhcmdyZWcgPSBDUjE2X1IwX1JF R05VTTsKKyAgICAgIGludCBvZmZzZXQgPSAwOworCisgICAgICB3aGlsZSAo dmFsdHlwZV9sZW4gPiAwKQorCXsKKwkgIGludCBsZW4gPSBtaW4gKHZhbHR5 cGVfbGVuLCA0KTsKKworCSAgcmVnY2FjaGVfY29va2VkX3JlYWRfdW5zaWdu ZWQgKHJlZ2NhY2hlLCBhcmdyZWcsICZ1KTsKKwkgIHN0b3JlX3Vuc2lnbmVk X2ludGVnZXIgKHJlYWRidWYgKyBvZmZzZXQsIGxlbiwgYnl0ZV9vcmRlciwg dSk7CisJICB2YWx0eXBlX2xlbiAtPSBsZW47CisJICBvZmZzZXQgKz0gbGVu OworCSAgYXJncmVnKys7CisJfQorICAgIH0KKworICBpZiAod3JpdGVidWYp CisgICAgeworICAgICAgVUxPTkdFU1QgdTsKKyAgICAgIGludCBhcmdyZWcg PSBDUjE2X1IwX1JFR05VTTsKKyAgICAgIGludCBvZmZzZXQgPSAwOworCisg ICAgICB3aGlsZSAodmFsdHlwZV9sZW4gPiAwKQorCXsKKwkgIGludCBsZW4g PSBtaW4gKHZhbHR5cGVfbGVuLCA0KTsKKworCSAgdSA9IGV4dHJhY3RfdW5z aWduZWRfaW50ZWdlciAod3JpdGVidWYgKyBvZmZzZXQsIGxlbiwgYnl0ZV9v cmRlcik7CisJICByZWdjYWNoZV9jb29rZWRfd3JpdGVfdW5zaWduZWQgKHJl Z2NhY2hlLCBhcmdyZWcsIHUpOworCSAgdmFsdHlwZV9sZW4gLT0gbGVuOwor CSAgb2Zmc2V0ICs9IGxlbjsKKwkgIGFyZ3JlZysrOworCX0KKyAgICB9CisK KyAgcmV0dXJuIFJFVFVSTl9WQUxVRV9SRUdJU1RFUl9DT05WRU5USU9OOwor fQorCisvKiBJbXBsZW1lbnQgdGhlICJicmVha3BvaW50X2Zyb21fcGMiIGdk YmFyY2ggbWV0aG9kLiAgKi8KKworc3RhdGljIGNvbnN0IGdkYl9ieXRlICoK K2NyMTZfYnJlYWtwb2ludF9mcm9tX3BjIChzdHJ1Y3QgZ2RiYXJjaCAqZ2Ri YXJjaCwgQ09SRV9BRERSICogcGNwdHIsCisJCQkgaW50ICpsZW5wdHIpCit7 CisgIC8qIFdlIHVzZSBkaWZmZXJlbnQgYnJlYWtwb2ludCBpbnN0cnVjdGlv bnMgZm9yIEVMRiBhbmQgdUNsaW51eC4KKyAgICAgU2VlIGNyMTYtbGludXgt dGRlcC5jIGZvciBtb3JlIGRldGFpbHMuICAqLworICBzdHJ1Y3QgZ2RiYXJj aF90ZGVwICp0ZGVwID0gZ2RiYXJjaF90ZGVwIChnZGJhcmNoKTsKKworICAq bGVucHRyID0gMjsKKyAgaWYgKHRkZXAgPT0gTlVMTCB8fCB0ZGVwLT5icmVh a3BvaW50ID09IE5VTEwpCisgICAgcmV0dXJuIGJyZWFrcG9pbnRfZWxmOwor CisgIHJldHVybiB0ZGVwLT5icmVha3BvaW50OworfQorCisvKiBBbGxvY2F0 ZSBhbmQgaW5pdGlhbGl6ZSBhIGdkYmFyY2ggb2JqZWN0LiAgKi8KKworc3Rh dGljIHN0cnVjdCBnZGJhcmNoICoKK2NyMTZfZ2RiYXJjaF9pbml0IChzdHJ1 Y3QgZ2RiYXJjaF9pbmZvIGluZm8sIHN0cnVjdCBnZGJhcmNoX2xpc3QgKmFy Y2hlcykKK3sKKyAgc3RydWN0IGdkYmFyY2ggKmdkYmFyY2g7CisgIHN0cnVj dCBnZGJhcmNoX3RkZXAgKnRkZXA7CisgIGludCBlbGZfZmxhZ3M7CisKKyAg LyogRXh0cmFjdCB0aGUgZWxmX2ZsYWdzIGlmIGF2YWlsYWJsZS4gICovCisg IGlmIChpbmZvLmFiZmQgIT0gTlVMTAorICAgICAgJiYgYmZkX2dldF9mbGF2 b3VyIChpbmZvLmFiZmQpID09IGJmZF90YXJnZXRfZWxmX2ZsYXZvdXIpCisg ICAgZWxmX2ZsYWdzID0gZWxmX2VsZmhlYWRlciAoaW5mby5hYmZkKS0+ZV9m bGFnczsKKyAgZWxzZQorICAgIGVsZl9mbGFncyA9IDA7CisKKyAgLyogVHJ5 IHRvIGZpbmQgdGhlIGFyY2hpdGVjdHVyZSBpbiB0aGUgbGlzdCBvZiBhbHJl YWR5IGRlZmluZWQKKyAgICAgYXJjaGl0ZWN0dXJlcy4gICovCisgIGZvciAo YXJjaGVzID0gZ2RiYXJjaF9saXN0X2xvb2t1cF9ieV9pbmZvIChhcmNoZXMs ICZpbmZvKTsKKyAgICAgICBhcmNoZXMgIT0gTlVMTDsKKyAgICAgICBhcmNo ZXMgPSBnZGJhcmNoX2xpc3RfbG9va3VwX2J5X2luZm8gKGFyY2hlcy0+bmV4 dCwgJmluZm8pKQorICAgIHsKKyAgICAgIGlmIChnZGJhcmNoX3RkZXAgKGFy Y2hlcy0+Z2RiYXJjaCktPmVsZl9mbGFncyAhPSBlbGZfZmxhZ3MpCisJY29u dGludWU7CisKKyAgICAgIHJldHVybiBhcmNoZXMtPmdkYmFyY2g7CisgICAg fQorICAvKiBOb25lIGZvdW5kLCBjcmVhdGUgYSBuZXcgYXJjaGl0ZWN0dXJl IGZyb20gdGhlIGluZm9ybWF0aW9uCisgICAgIHByb3ZpZGVkLiAgKi8KKyAg dGRlcCA9IChzdHJ1Y3QgZ2RiYXJjaF90ZGVwICopIHhjYWxsb2MgKDEsIHNp emVvZiAoc3RydWN0IGdkYmFyY2hfdGRlcCkpOworICB0ZGVwLT5lbGZfZmxh Z3MgPSBlbGZfZmxhZ3M7CisgIGdkYmFyY2ggPSBnZGJhcmNoX2FsbG9jICgm aW5mbywgdGRlcCk7CisKKyAgc2V0X2dkYmFyY2hfbnVtX3BzZXVkb19yZWdz IChnZGJhcmNoLCAwKTsKKyAgc2V0X2dkYmFyY2hfbnVtX3JlZ3MgKGdkYmFy Y2gsIENSMTZfTlVNX1JFR1MpOworICBzZXRfZ2RiYXJjaF9yZWdpc3Rlcl9u YW1lIChnZGJhcmNoLCBjcjE2X3JlZ2lzdGVyX25hbWUpOworICBzZXRfZ2Ri YXJjaF9yZWdpc3Rlcl90eXBlIChnZGJhcmNoLCBjcjE2X3JlZ2lzdGVyX3R5 cGUpOworICBzZXRfZ2RiYXJjaF9wY19yZWdudW0gKGdkYmFyY2gsIENSMTZf UENfUkVHTlVNKTsKKyAgc2V0X2dkYmFyY2hfc3BfcmVnbnVtIChnZGJhcmNo LCBDUjE2X1NQX1JFR05VTSk7CisgIHNldF9nZGJhcmNoX2lubmVyX3RoYW4g KGdkYmFyY2gsIGNvcmVfYWRkcl9sZXNzdGhhbik7CisgIHNldF9nZGJhcmNo X2RlY3JfcGNfYWZ0ZXJfYnJlYWsgKGdkYmFyY2gsIDIpOworICBzZXRfZ2Ri YXJjaF9icmVha3BvaW50X2Zyb21fcGMgKGdkYmFyY2gsIGNyMTZfYnJlYWtw b2ludF9mcm9tX3BjKTsKKyAgc2V0X2dkYmFyY2hfc2tpcF9wcm9sb2d1ZSAo Z2RiYXJjaCwgY3IxNl9za2lwX3Byb2xvZ3VlKTsKKyAgc2V0X2dkYmFyY2hf cHJpbnRfaW5zbiAoZ2RiYXJjaCwgcHJpbnRfaW5zbl9jcjE2KTsKKyAgc2V0 X2dkYmFyY2hfdW53aW5kX3BjIChnZGJhcmNoLCBjcjE2X3Vud2luZF9wYyk7 CisgIHNldF9nZGJhcmNoX3Vud2luZF9zcCAoZ2RiYXJjaCwgY3IxNl91bndp bmRfc3ApOworCisgIC8qIE1ldGhvZHMgZm9yIHNhdmluZyAvIGV4dHJhY3Rp bmcgYSBkdW1teSBmcmFtZSdzIElELiAgKi8KKyAgc2V0X2dkYmFyY2hfZHVt bXlfaWQgKGdkYmFyY2gsIGNyMTZfZHVtbXlfaWQpOworICBzZXRfZ2RiYXJj aF9wdXNoX2R1bW15X2NhbGwgKGdkYmFyY2gsIGNyMTZfcHVzaF9kdW1teV9j YWxsKTsKKyAgLyogVGFyZ2V0IGJ1aWx0aW4gZGF0YSB0eXBlcy4gICovCisg IHNldF9nZGJhcmNoX2NoYXJfc2lnbmVkIChnZGJhcmNoLCA4KTsKKyAgc2V0 X2dkYmFyY2hfc2hvcnRfYml0IChnZGJhcmNoLCAxNik7CisgIHNldF9nZGJh cmNoX2ludF9iaXQgKGdkYmFyY2gsIDE2KTsKKyAgc2V0X2dkYmFyY2hfbG9u Z19iaXQgKGdkYmFyY2gsIDMyKTsKKyAgc2V0X2dkYmFyY2hfbG9uZ19sb25n X2JpdCAoZ2RiYXJjaCwgNjQpOworICBzZXRfZ2RiYXJjaF9mbG9hdF9iaXQg KGdkYmFyY2gsIDMyKTsKKworICBzZXRfZ2RiYXJjaF9wdHJfYml0IChnZGJh cmNoLCAzMik7CisgIHNldF9nZGJhcmNoX2Zsb2F0X2Zvcm1hdCAoZ2RiYXJj aCwgZmxvYXRmb3JtYXRzX2llZWVfc2luZ2xlKTsKKyAgc2V0X2dkYmFyY2hf ZG91YmxlX2JpdCAoZ2RiYXJjaCwgNjQpOworICBzZXRfZ2RiYXJjaF9sb25n X2RvdWJsZV9iaXQgKGdkYmFyY2gsIDY0KTsKKyAgc2V0X2dkYmFyY2hfZG91 YmxlX2Zvcm1hdCAoZ2RiYXJjaCwgZmxvYXRmb3JtYXRzX2llZWVfZG91Ymxl KTsKKyAgc2V0X2dkYmFyY2hfbG9uZ19kb3VibGVfZm9ybWF0IChnZGJhcmNo LCBmbG9hdGZvcm1hdHNfaWVlZV9kb3VibGUpOworCisgIGZyYW1lX3Vud2lu ZF9hcHBlbmRfdW53aW5kZXIgKGdkYmFyY2gsICZjcjE2X2ZyYW1lX3Vud2lu ZCk7CisgIHNldF9nZGJhcmNoX3JldHVybl92YWx1ZSAoZ2RiYXJjaCwgY3Ix Nl9yZXR1cm5fdmFsdWUpOworCisgIC8qIEhvb2sgaW4gQUJJLXNwZWNpZmlj IG92ZXJyaWRlcywgaWYgdGhleSBoYXZlIGJlZW4gcmVnaXN0ZXJlZC4gICov CisgIGdkYmFyY2hfaW5pdF9vc2FiaSAoaW5mbywgZ2RiYXJjaCk7CisKKyAg cmV0dXJuIGdkYmFyY2g7CisKK30KKworLyogLVdtaXNzaW5nLXByb3RvdHlw ZXMuICAqLworZXh0ZXJuIGluaXRpYWxpemVfZmlsZV9mdHlwZSBfaW5pdGlh bGl6ZV9jcjE2X3RkZXA7CisKKy8qIFJlZ2lzdGVyIHRoZSBhYm92ZSBpbml0 aWFsaXphdGlvbiByb3V0aW5lLiAgKi8KKwordm9pZAorX2luaXRpYWxpemVf Y3IxNl90ZGVwICh2b2lkKQoreworICByZWdpc3Rlcl9nZGJhcmNoX2luaXQg KGJmZF9hcmNoX2NyMTYsIGNyMTZfZ2RiYXJjaF9pbml0KTsKK30KZGlmZiAt dXByTiAuL2dkYl9zcmMub3JpZy9nZGIvY3IxNi10ZGVwLmggZ2RiX3NyYy9n ZGIvY3IxNi10ZGVwLmgKLS0tIC4vZ2RiX3NyYy5vcmlnL2dkYi9jcjE2LXRk ZXAuaAkxOTcwLTAxLTAxIDA1OjMwOjAwLjAwMDAwMDAwMCArMDUzMAorKysg Li9nZGJfc3JjL2dkYi9jcjE2LXRkZXAuaAkyMDEzLTAxLTA4IDEyOjU5OjIw LjAwMDAwMDAwMCArMDUzMApAQCAtMCwwICsxLDMyIEBACisvKiBHTlUvTGlu dXggb24gIENSMTYgdGFyZ2V0IHN1cHBvcnQuCisgICBDb3B5cmlnaHQgKEMp IDIwMTMgRnJlZSBTb2Z0d2FyZSBGb3VuZGF0aW9uLCBJbmMuCisKKyAgIENv bnRyaWJ1dGVkIGJ5IEthdXNoaWsgUGhhdGFrIChrYXVzaGlrLnBoYXRha0Br cGl0Y3VtbWlucy5jb20pCisgICBLUElUIEN1bW1pbnMgSW5mb3N5c3RlbXMg TGltaXRlZCwgUHVuZSBJbmRpYS4KKworICAgVGhpcyBmaWxlIGlzIHBhcnQg b2YgR0RCLgorCisgICBUaGlzIHByb2dyYW0gaXMgZnJlZSBzb2Z0d2FyZTsg eW91IGNhbiByZWRpc3RyaWJ1dGUgaXQgYW5kL29yIG1vZGlmeQorICAgaXQg dW5kZXIgdGhlIHRlcm1zIG9mIHRoZSBHTlUgR2VuZXJhbCBQdWJsaWMgTGlj ZW5zZSBhcyBwdWJsaXNoZWQgYnkKKyAgIHRoZSBGcmVlIFNvZnR3YXJlIEZv dW5kYXRpb247IGVpdGhlciB2ZXJzaW9uIDMgb2YgdGhlIExpY2Vuc2UsIG9y CisgICAoYXQgeW91ciBvcHRpb24pIGFueSBsYXRlciB2ZXJzaW9uLgorCisg ICBUaGlzIHByb2dyYW0gaXMgZGlzdHJpYnV0ZWQgaW4gdGhlIGhvcGUgdGhh dCBpdCB3aWxsIGJlIHVzZWZ1bCwKKyAgIGJ1dCBXSVRIT1VUIEFOWSBXQVJS QU5UWTsgd2l0aG91dCBldmVuIHRoZSBpbXBsaWVkIHdhcnJhbnR5IG9mCisg ICBNRVJDSEFOVEFCSUxJVFkgb3IgRklUTkVTUyBGT1IgQSBQQVJUSUNVTEFS IFBVUlBPU0UuICBTZWUgdGhlCisgICBHTlUgR2VuZXJhbCBQdWJsaWMgTGlj ZW5zZSBmb3IgbW9yZSBkZXRhaWxzLgorCisgICBZb3Ugc2hvdWxkIGhhdmUg cmVjZWl2ZWQgYSBjb3B5IG9mIHRoZSBHTlUgR2VuZXJhbCBQdWJsaWMgTGlj ZW5zZQorICAgYWxvbmcgd2l0aCB0aGlzIHByb2dyYW0uICBJZiBub3QsIHNl ZSA8aHR0cDovL3d3dy5nbnUub3JnL2xpY2Vuc2VzLz4uICAqLworCisKKy8q IFRhcmdldC1kZXBlbmRlbnQgc3RydWN0dXJlIGluIGdkYmFyY2guICAqLwor CitzdHJ1Y3QgZ2RiYXJjaF90ZGVwCit7CisgIC8qIFRoZSBFTEYgaGVhZGVy IGZsYWdzIHNwZWNpZnkgdGhlIG11bHRpbGliIHVzZWQuICAqLworICBpbnQg ZWxmX2ZsYWdzOworCisgIC8qIEJyZWFrcG9pbnQgaW5zdHJ1Y3Rpb24uICAq LworICBjb25zdCBnZGJfYnl0ZSAqYnJlYWtwb2ludDsKK307 --_002_C6CA53A2A46BA7469348BDBD663AB65848565AB5KCHJEXMB02kpitc_--