From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 62023 invoked by alias); 14 Apr 2016 06:34:23 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 62010 invoked by uid 89); 14 Apr 2016 06:34:22 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.9 required=5.0 tests=BAYES_00,KAM_LAZY_DOMAIN_SECURITY,RCVD_IN_DNSWL_NONE autolearn=no version=3.3.2 spammy=Embedded, expressed, H*r:sk:dynamic, interest X-HELO: smtp.eu.adacore.com Received: from mel.act-europe.fr (HELO smtp.eu.adacore.com) (194.98.77.210) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Thu, 14 Apr 2016 06:34:12 +0000 Received: from localhost (localhost [127.0.0.1]) by filtered-smtp.eu.adacore.com (Postfix) with ESMTP id 0A22181335; Thu, 14 Apr 2016 08:34:08 +0200 (CEST) Received: from smtp.eu.adacore.com ([127.0.0.1]) by localhost (smtp.eu.adacore.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id dyo720vYhsLS; Thu, 14 Apr 2016 08:34:07 +0200 (CEST) Received: from [10.8.67.193] (114.239.197.178.dynamic.wless.lssmb00p-cgnat.res.cust.swisscom.ch [178.197.239.114]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by smtp.eu.adacore.com (Postfix) with ESMTPSA id 98D518132E; Thu, 14 Apr 2016 08:34:07 +0200 (CEST) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 9.2 \(3112\)) Subject: Re: [PATCH] (ARM Cortex-M) FPU and PSP aware exception frame unwinder From: Tristan Gingold In-Reply-To: <570C1D85.1060706@redhat.com> Date: Thu, 14 Apr 2016 06:34:00 -0000 Cc: James-Adam Renquinha Henri , gdb-patches@sourceware.org, Christopher Friedt Content-Transfer-Encoding: 7bit Message-Id: References: <5706DA27.1070308@cimeq.qc.ca> <570C1D85.1060706@redhat.com> To: Pedro Alves X-IsSubscribed: yes X-SW-Source: 2016-04/txt/msg00311.txt.bz2 > On 11 Apr 2016, at 23:56, Pedro Alves wrote: > > Hi, > > [Adding a few folks who either worked on or expressed > interest in this before.] > > On 04/07/2016 11:07 PM, James-Adam Renquinha Henri wrote: >> I submitted it as a bug to the GNU ARM Embedded initially, see here for >> details: https://bugs.launchpad.net/gcc-arm-embedded/+bug/1566054 >> >> Basically, this patch allow gdb to unwind properly an extended stack >> frame, that is an exception frame with FPU state stacked. Additionally, >> because all Cortex-M variants have 2 stack pointers, the Main Stack >> Pointer (MSP) and the Process Stack Pointer (PSP), the code in the patch >> also check which stack was used prior to the exception. That way, >> backtraces work beautifully. >> >> In my original submission, I mentioned a known issue that I didn't try >> to fix *yet*, because that would involve a lot more work, and the impact >> is relatively minor: for a given outer frame, some FPU registers may not >> be reported correctly. I hope you don't mind too much. I consider the >> current patch still useful, because at least backtraces work, and it's >> an annoyance not to be able to get them. >> > > Thanks for the patch. However, we should really add new target > descriptions/features that describe these registers to gdb > instead of looking them up by name. Please see: > > https://sourceware.org/ml/gdb-patches/2015-12/msg00273.html > > And see more in this earlier attempt at getting the unwinder working: > > https://sourceware.org/ml/gdb-patches/2014-09/msg00649.html > > Tristan also wrote yet another patch for the same, as mentioned at: > > https://sourceware.org/ml/gdb-patches/2015-12/msg00281.html > > Tristan, did you ever manage to post that? Not yet. But I have tested it with two different probes. > Lots of duplicated effort. :-/ :-( Indeed. But we know that the common part is correct! Tristan.