From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 9260 invoked by alias); 19 Nov 2013 08:28:34 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 9251 invoked by uid 89); 19 Nov 2013 08:28:33 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.2 required=5.0 tests=AWL,BAYES_50,RDNS_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no version=3.3.2 X-HELO: mga02.intel.com Received: from Unknown (HELO mga02.intel.com) (134.134.136.20) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 19 Nov 2013 08:28:32 +0000 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 19 Nov 2013 00:28:23 -0800 X-ExtLoop1: 1 Received: from irsmsx103.ger.corp.intel.com ([163.33.3.157]) by orsmga002.jf.intel.com with ESMTP; 19 Nov 2013 00:28:22 -0800 Received: from irsmsx104.ger.corp.intel.com ([169.254.5.135]) by IRSMSX103.ger.corp.intel.com ([169.254.3.66]) with mapi id 14.03.0123.003; Tue, 19 Nov 2013 08:28:21 +0000 From: "Tedeschi, Walfred" To: Pedro Alves CC: "tromey@redhat.com" , "mark.kettenis@xs4all.nl" , "gdb-patches@sourceware.org" Subject: RE: [PATCH V7 8/8] Add MPX feature description to GDB manual. Date: Tue, 19 Nov 2013 08:32:00 -0000 Message-ID: References: <1381320034-4092-1-git-send-email-walfred.tedeschi@intel.com> <1381320034-4092-9-git-send-email-walfred.tedeschi@intel.com> <528A6878.2090903@redhat.com> In-Reply-To: <528A6878.2090903@redhat.com> Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes X-SW-Source: 2013-11/txt/msg00519.txt.bz2 Hello Pedro, Thanks a lot for your feedback. I will incorporate all. Best Regards, -Fred -----Original Message----- From: Pedro Alves [mailto:palves@redhat.com]=20 Sent: Monday, November 18, 2013 8:20 PM To: Tedeschi, Walfred Cc: tromey@redhat.com; mark.kettenis@xs4all.nl; gdb-patches@sourceware.org Subject: Re: [PATCH V7 8/8] Add MPX feature description to GDB manual. On 10/09/2013 01:00 PM, Walfred Tedeschi wrote: > +The @samp{org.gnu.gdb.i386.mpx} is an optional feature representing=20 > +Intel(R) Memory Protection Extension (MPX). MPX adds the bound=20 > +registers @samp{BND0} @footnote{Capital letters were used to=20 > +distinguish between architecture registers and pseudo registers. I'd suggest s/were/are. (here and elsewhere) > A set of pseudo register for the bound > +registers were created to simplify the display.} through @samp{BND3}.=20= =20 > +Bound registers store a pair of 64-bit values which are the lower=20 > +bound and upper bound. Bounds are effective addresses or memory=20 > +locations. The upper bounds are architecturally represented in 1's=20 > +complement form. A bound having lower bound =3D 0, and upper bound =3D = 0=20 > +(1's complement of all bits set) will allow access to the entire address= space. > + > +In order to take the upper bound complement of one into account the=20 > +@samp{BND0} through @samp{BND3} are described in GDB as=20 > +@samp{bnd0raw} through @samp{bnd3raw}. Pseudo registers @samp{bnd0}=20 > +through @samp{bnd3} display the upper bound performing the complement=20 > +of one operation, i.e.@ when upper bound in @samp{bnd0raw} is 0 in=20 > +the GDB @samp{bnd0} it will be @code{0xfff...}. The feature adds the fo= llowing registers: This node is mostly meant for remote stub writers. I'd suggest only describing here what's included in the description (the ra= w registers), and describe the pseudo registers elsewhere where regular use= rs will look (making sure to word things in a user-friendly way, perhaps wi= th examples.) Perhaps in Architectures->i386 (x86 Architecture-specific Issues)? > + > +@itemize @minus > +@item > +@samp{bnd0raw} through @samp{bnd3raw} for i386, amd64 and x32. > +@item > +@samp{bndcfgu} and @samp{bndstatus} for i386, amd64 and x32. > +@end itemize > + > The @samp{org.gnu.gdb.i386.linux} feature is optional. It should=20=20 > describe a single register, @samp{orig_eax}. -- Pedro Alves Intel GmbH Dornacher Strasse 1 85622 Feldkirchen/Muenchen, Deutschland Sitz der Gesellschaft: Feldkirchen bei Muenchen Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk Registergericht: Muenchen HRB 47456 Ust.-IdNr./VAT Registration No.: DE129385895 Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052