From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 12426 invoked by alias); 25 Sep 2013 12:41:19 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 12414 invoked by uid 89); 25 Sep 2013 12:41:19 -0000 Received: from mga11.intel.com (HELO mga11.intel.com) (192.55.52.93) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 25 Sep 2013 12:41:19 +0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.4 required=5.0 tests=AWL,BAYES_00,RDNS_NONE,SPF_SOFTFAIL autolearn=no version=3.3.2 X-HELO: mga11.intel.com Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP; 25 Sep 2013 05:41:16 -0700 X-ExtLoop1: 1 Received: from irsmsx103.ger.corp.intel.com ([163.33.3.157]) by fmsmga001.fm.intel.com with ESMTP; 25 Sep 2013 05:41:15 -0700 Received: from irsmsx151.ger.corp.intel.com (163.33.192.59) by IRSMSX103.ger.corp.intel.com (163.33.3.157) with Microsoft SMTP Server (TLS) id 14.3.123.3; Wed, 25 Sep 2013 13:40:56 +0100 Received: from irsmsx104.ger.corp.intel.com ([169.254.5.69]) by IRSMSX151.ger.corp.intel.com ([169.254.4.177]) with mapi id 14.03.0123.003; Wed, 25 Sep 2013 13:40:56 +0100 From: "Tedeschi, Walfred" To: Eli Zaretskii CC: "gdb-patches@sourceware.org" Subject: RE: [PATCH V4 0/8] Intel(R) MPX register support Date: Wed, 25 Sep 2013 12:41:00 -0000 Message-ID: References: <1378373188-31144-1-git-send-email-walfred.tedeschi@intel.com> <83y57bbo6q.fsf@gnu.org> <83vc2aj6qr.fsf@gnu.org> <83eh8dgjxh.fsf@gnu.org> In-Reply-To: <83eh8dgjxh.fsf@gnu.org> Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes X-SW-Source: 2013-09/txt/msg00892.txt.bz2 Hi Eli, Ok!=20 Register reading and writing need some support from the OS, and vary from O= S to OS. In this sense we have done part of the whole work on the i386-tdep= .c and part on the i386-tdep-linux.c. Regards, -Fred -----Original Message----- From: Eli Zaretskii [mailto:eliz@gnu.org]=20 Sent: Wednesday, September 25, 2013 2:34 PM To: Tedeschi, Walfred Cc: gdb-patches@sourceware.org Subject: Re: [PATCH V4 0/8] Intel(R) MPX register support > From: "Tedeschi, Walfred" > CC: "gdb-patches@sourceware.org" > Date: Wed, 25 Sep 2013 11:51:23 +0000 >=20 > Common code I meant the target dependent files, i.e. amd64-tdep.c and i38= 6-tdep.c. >=20 > We added code to support Linux only. Linux registers are processed at amd= 64-tdep-linux.c and i386-tdep-linux.c as well as amd64-linux-nat.c and i386= -linux-nat.c. >=20 > In order to implement the same features for windows we should have modif= ied the amd64-tdep-windows and i386-tdep-windows.c and for Darwin amd64-td= ep-darwin and i386-tdep-darwin.c for bsd there would be also some change on= amd64bsd-native.c and i386bsd-native.c. Additionally we OS support that = is still not ready on the other platforms. >=20 > I hope to have clarified. I'm sorry to insist, but that's exactly my question: why were the changes d= one in Linux-specific i386-tdep-linux.c etc., and not in the CPU-specific i= 386-tdep.c etc.? These registers are specific to a CPU, not to an OS, aren= 't they? Intel GmbH Dornacher Strasse 1 85622 Feldkirchen/Muenchen, Deutschland Sitz der Gesellschaft: Feldkirchen bei Muenchen Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk Registergericht: Muenchen HRB 47456 Ust.-IdNr./VAT Registration No.: DE129385895 Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052