From: "Metzger, Markus T" <markus.t.metzger@intel.com>
To: Jan Beulich <JBeulich@suse.com>, Simon Marchi <simon.marchi@polymtl.ca>
Cc: GDB <gdb-patches@sourceware.org>,
"Pedro Alves (palves@redhat.com)" <palves@redhat.com>
Subject: RE: Ping: [PATCH v2] x86-64: fix ZMM register state tracking
Date: Wed, 07 Nov 2018 13:18:00 -0000 [thread overview]
Message-ID: <A78C989F6D9628469189715575E55B236B38222C@IRSMSX104.ger.corp.intel.com> (raw)
In-Reply-To: <5BE2AC5802000078001F8F7D@prv1-mh.provo.novell.com>
> >>> On 07.11.18 at 10:07, <markus.t.metzger@intel.com> wrote:
> >> On 2018-10-29 06:31, Jan Beulich wrote:
> >> >>>> On 10.10.18 at 17:12, wrote:
> >> >> The three AVX512 state components are entirely independent - one
> >> >> being in its "init state" has no implication whatsoever on either
> >> >> of the other two. Fully separate X86_XSTATE_ZMM_H and
> >> >> X86_XSTATE_ZMM handling, to prevent upper halves of the upper 16
> >> >> ZMM registers to display as if they were zero (when they aren't) after e.g.
> >> >> VZEROALL/VZEROUPPER.
> >> >>
> >> >> gdb/
> >> >> 2018-10-10 Jan Beulich <jbeulich@suse.com>
> >> >>
> >> >> * i387-tdep.c (i387_supply_xsave): Split handling of
> >> >> X86_XSTATE_ZMM_H and X86_XSTATE_ZMM.
> >> >> (i387_collect_xsave): Likewise.
> >> >>
> >> >> gdb/testsuite/
> >> >> 2018-10-10 Simon Marchi <simon.marchi@polymtl.ca>
> >> >>
> >> >> * testsuite/gdb.arch/i386-avx512.c,
> >> >> testsuite/gdb.arch/i386-avx512.exp: Add 7th test.
> >> >>
> >> >> ---
> >> >> v2: Attach comments to zmm_endlo_regnum declarations. Add testcase
> >> >> provided by Simon.
> >>
> >> The testcase obviously LGTM. I will let Markus approve the other changes.
> >
> > The code already looked good to me in v1. Thanks for adding comments.
>
> So can I translate this into an ack for me to commit the change?
> Or else, who would be the one to give the go-ahead?
Simon can approve your patch.
IIRC Pedro had a question regarding gdbserver. From a first look, it seems to get the
feature bits right but does not distinguish 32-bit and 64-bit mode regarding the number
of available registers.
Did you run the new test you added also in remote configuration?
Markus.
Intel Deutschland GmbH
Registered Address: Am Campeon 10-12, 85579 Neubiberg, Germany
Tel: +49 89 99 8853-0, www.intel.de
Managing Directors: Christin Eisenschmid, Christian Lamprechter
Chairperson of the Supervisory Board: Nicole Lau
Registered Office: Munich
Commercial Register: Amtsgericht Muenchen HRB 186928
next prev parent reply other threads:[~2018-11-07 13:18 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-05 13:23 [PATCH] " Jan Beulich
2018-09-07 23:13 ` Simon Marchi
2018-09-10 6:25 ` Jan Beulich
2018-09-10 13:01 ` Simon Marchi
2018-09-18 13:38 ` Jan Beulich
2018-09-25 3:29 ` Simon Marchi
2018-09-25 15:04 ` Jan Beulich
2018-10-02 19:20 ` Simon Marchi
2018-10-03 14:30 ` Jan Beulich
2018-10-03 14:41 ` Simon Marchi
2018-09-11 10:34 ` Pedro Alves
2018-09-11 11:34 ` Jan Beulich
2018-09-24 17:19 ` Metzger, Markus T
2018-09-25 7:47 ` Jan Beulich
2018-10-10 15:12 ` [PATCH v2] " Jan Beulich
2018-10-29 10:31 ` Ping: " Jan Beulich
[not found] ` <8bafd220c79c3936de8ce3d6421a9c01@polymtl.ca>
2018-11-07 9:07 ` Metzger, Markus T
2018-11-07 9:12 ` Jan Beulich
2018-11-07 13:18 ` Metzger, Markus T [this message]
2018-11-07 13:25 ` Jan Beulich
2018-11-07 14:18 ` Simon Marchi
[not found] ` <5BE41AE902000078001F993A@prv1-mh.provo.novell.com>
2018-11-08 16:24 ` Simon Marchi
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