From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 61193 invoked by alias); 22 Jul 2016 07:53:29 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 61138 invoked by uid 89); 22 Jul 2016 07:53:27 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.9 required=5.0 tests=AWL,BAYES_00,MIME_BASE64_BLANKS,RP_MATCHES_RCVD,SPF_PASS autolearn=ham version=3.3.2 spammy=jans X-HELO: mga02.intel.com Received: from mga02.intel.com (HELO mga02.intel.com) (134.134.136.20) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 22 Jul 2016 07:53:17 +0000 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP; 22 Jul 2016 00:53:15 -0700 X-ExtLoop1: 1 Received: from irsmsx152.ger.corp.intel.com ([163.33.192.66]) by fmsmga002.fm.intel.com with ESMTP; 22 Jul 2016 00:53:14 -0700 Received: from irsmsx104.ger.corp.intel.com ([169.254.5.117]) by IRSMSX152.ger.corp.intel.com ([169.254.6.43]) with mapi id 14.03.0248.002; Fri, 22 Jul 2016 08:53:13 +0100 From: "Metzger, Markus T" To: Yao Qi CC: Pedro Alves , "gdb-patches@sourceware.org" Subject: RE: [PATCH v3 2/3] stack: check frame_unwind_caller_id Date: Fri, 22 Jul 2016 07:53:00 -0000 Message-ID: References: <1455207283-12660-1-git-send-email-markus.t.metzger@intel.com> <1455207283-12660-2-git-send-email-markus.t.metzger@intel.com> In-Reply-To: Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 X-IsSubscribed: yes X-SW-Source: 2016-07/txt/msg00273.txt.bz2 PiAtLS0tLU9yaWdpbmFsIE1lc3NhZ2UtLS0tLQ0KPiBGcm9tOiBZYW8gUWkg W21haWx0bzpxaXlhb2x0Y0BnbWFpbC5jb21dDQo+IFNlbnQ6IFRodXJzZGF5 LCBKdWx5IDIxLCAyMDE2IDY6MzYgUE0NCj4gVG86IE1ldHpnZXIsIE1hcmt1 cyBUIDxtYXJrdXMudC5tZXR6Z2VyQGludGVsLmNvbT4NCj4gQ2M6IFBlZHJv IEFsdmVzIDxwYWx2ZXNAcmVkaGF0LmNvbT47IGdkYi1wYXRjaGVzQHNvdXJj ZXdhcmUub3JnDQo+IFN1YmplY3Q6IFJlOiBbUEFUQ0ggdjMgMi8zXSBzdGFj azogY2hlY2sgZnJhbWVfdW53aW5kX2NhbGxlcl9pZA0KDQpIaSBZYW8sDQoN Cj4gT24gVGh1LCBGZWIgMTEsIDIwMTYgYXQgNDoxNCBQTSwgTWFya3VzIE1l dHpnZXINCj4gPG1hcmt1cy50Lm1ldHpnZXJAaW50ZWwuY29tPiB3cm90ZToN Cj4gPiBkaWZmIC0tZ2l0IGEvZ2RiL3N0YWNrLmMgYi9nZGIvc3RhY2suYw0K PiA+IGluZGV4IDg5ODc5ZjMuLjZlM2FjYzcgMTAwNjQ0DQo+ID4gLS0tIGEv Z2RiL3N0YWNrLmMNCj4gPiArKysgYi9nZGIvc3RhY2suYw0KPiA+IEBAIC0x NTA5LDI3ICsxNTA5LDMyIEBAIGZyYW1lX2luZm8gKGNoYXIgKmFkZHJfZXhw LCBpbnQgZnJvbV90dHkpDQo+ID4gICAgd3JhcF9oZXJlICgiICAgICIpOw0K PiA+ICAgIHByaW50Zl9maWx0ZXJlZCAoInNhdmVkICVzID0gIiwgcGNfcmVn bmFtZSk7DQo+ID4NCj4gPiAtICBUUlkNCj4gPiAtICAgIHsNCj4gPiAtICAg ICAgY2FsbGVyX3BjID0gZnJhbWVfdW53aW5kX2NhbGxlcl9wYyAoZmkpOw0K PiA+IC0gICAgICBjYWxsZXJfcGNfcCA9IDE7DQo+ID4gLSAgICB9DQo+ID4g LSAgQ0FUQ0ggKGV4LCBSRVRVUk5fTUFTS19FUlJPUikNCj4gPiArICBpZiAo IWZyYW1lX2lkX3AgKGZyYW1lX3Vud2luZF9jYWxsZXJfaWQgKGZpKSkpDQo+ ID4gKyAgICB2YWxfcHJpbnRfdW5hdmFpbGFibGUgKGdkYl9zdGRvdXQpOw0K PiA+ICsgIGVsc2UNCj4gDQo+IFRoaXMgcGF0Y2ggY2F1c2VzIGEgZmFpbA0K PiANCj4gRkFJTDogZ2RiLmR3YXJmMi9kdzItdW5kZWZpbmVkLXJldC1hZGRy LmV4cDogaW5mbyBmcmFtZQ0KPiANCj4gYmVjYXVzZSBwYXJ0IG9mIHRoZSBv dXRwdXQgImluZm8gZnJhbWUiIGlzIGNoYW5nZWQgZnJvbSAic2F2ZWQgcmlw ID0NCj4gPG5vdCBzYXZlZD4iDQo+IHRvICJzYXZlZCByaXAgPSA8dW5hdmFp bGFibGU+Ii4gIFRoZSByZWdyZXNzaW9uIGlzIGNhdWdodCBieSBidWlsZGJv dCB0b28NCj4gaHR0cHM6Ly9zb3VyY2V3YXJlLm9yZy9tbC9nZGItdGVzdGVy cy8yMDE2LXExL21zZzA1MjkyLmh0bWwNCj4gQ291bGQgeW91IHRha2UgYSBs b29rPw0KPiANCj4gTm90ZSB0aGF0IEphbiBwb3N0ZWQgYSBwYXRjaA0KPiBo dHRwczovL3NvdXJjZXdhcmUub3JnL21sL2dkYi1wYXRjaGVzLzIwMTYtMDQv bXNnMDAxODEuaHRtbA0KPiBmaXhpbmcgdGVzdCBjYXNlLCBidXQgSSB0aGlu ayB0aGUgdGVzdCBjYXNlIGl0c2VsZiBpcyB2YWxpZC4gIEFsc28gaW4gdGhl IGNvbW1pdA0KPiBsb2cgb2YgYWRkaW5nIGdkYi5kd2FyZjIvZHcyLXVuZGVm aW5lZC1yZXQtYWRkci5leHAsIGl0IGlzIGludGVuZGVkIHRvIG1hdGNoDQo+ ICI8bm90IHNhdmVkPiIgaW4gdGhlIHRlc3QuDQoNCkkgZm91bmQgYSBjb21t ZW50IGluIHZhbHVlLmM6MzMzIHRoYXQgc3VnZ2VzdHMgR0RCIHVzZXMgb3B0 aW1pemVkLW91dCBmb3INCnJlZ2lzdGVycyB0aGF0IGFyZSBub3Qgc3RvcmVk IGluIHRoZSBmcmFtZS4gIFNpbmNlIHRoZSBwYXRjaCBpcyBoYW5kbGluZyB0 aGUgY2FzZQ0Kb2YgYW4gaW52YWxpZCBmcmFtZS1pZCBJIGd1ZXNzIEkgc2hv dWxkIGhhdmUgdXNlZCB2YWxfcHJpbnRfbm90X3NhdmVkIGluc3RlYWQNCm9m IHZhbF9wcmludF91bmF2YWlsYWJsZS4NCg0KTGV0IG1lIHJldmVydCBKYW4n cyBmaXggYW5kIHNlZSBpZiBjaGFuZ2luZyBpdCB0byB2YWxfcHJpbnRfbm90 X3NhdmVkIGNhdXNlcyBvdGhlcg0KcmVncmVzc2lvbnMuDQoNCnJlZ2FyZHMs DQpNYXJrdXMuDQpJbnRlbCBEZXV0c2NobGFuZCBHbWJIClJlZ2lzdGVyZWQg QWRkcmVzczogQW0gQ2FtcGVvbiAxMC0xMiwgODU1NzkgTmV1YmliZXJnLCBH ZXJtYW55ClRlbDogKzQ5IDg5IDk5IDg4NTMtMCwgd3d3LmludGVsLmRlCk1h bmFnaW5nIERpcmVjdG9yczogQ2hyaXN0aW4gRWlzZW5zY2htaWQsIENocmlz dGlhbiBMYW1wcmVjaHRlcgpDaGFpcnBlcnNvbiBvZiB0aGUgU3VwZXJ2aXNv cnkgQm9hcmQ6IE5pY29sZSBMYXUKUmVnaXN0ZXJlZCBPZmZpY2U6IE11bmlj aApDb21tZXJjaWFsIFJlZ2lzdGVyOiBBbXRzZ2VyaWNodCBNdWVuY2hlbiBI UkIgMTg2OTI4Cg== >From gdb-patches-return-132701-listarch-gdb-patches=sources.redhat.com@sourceware.org Fri Jul 22 08:12:39 2016 Return-Path: Delivered-To: listarch-gdb-patches@sources.redhat.com Received: (qmail 69865 invoked by alias); 22 Jul 2016 08:12:38 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 69113 invoked by uid 89); 22 Jul 2016 08:12:36 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL,BAYES_00,KAM_LAZY_DOMAIN_SECURITY,RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=contiguous, Active X-HELO: mga14.intel.com Received: from mga14.intel.com (HELO mga14.intel.com) (192.55.52.115) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 22 Jul 2016 08:12:24 +0000 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga103.fm.intel.com with ESMTP; 22 Jul 2016 01:12:04 -0700 X-ExtLoop1: 1 Received: from irvmail001.ir.intel.com ([163.33.26.43]) by orsmga001.jf.intel.com with ESMTP; 22 Jul 2016 01:12:02 -0700 Received: from ulvlx001.iul.intel.com (ulvlx001.iul.intel.com [172.28.207.17]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id u6M8C1FW019879; Fri, 22 Jul 2016 09:12:01 +0100 Received: from ulvlx001.iul.intel.com (localhost [127.0.0.1]) by ulvlx001.iul.intel.com with ESMTP id u6M8C10p019935; Fri, 22 Jul 2016 10:12:01 +0200 Received: (from mmetzger@localhost) by ulvlx001.iul.intel.com with œ id u6M8C0ci019931; Fri, 22 Jul 2016 10:12:01 +0200 From: Markus Metzger To: gdb-patches@sourceware.org Cc: palves@redhat.com Subject: [PATCH 1/5] btrace: fix gap indication Date: Fri, 22 Jul 2016 08:12:00 -0000 Message-Id: <1469175120-19657-2-git-send-email-markus.t.metzger@intel.com> In-Reply-To: <1469175120-19657-1-git-send-email-markus.t.metzger@intel.com> References: <1469175120-19657-1-git-send-email-markus.t.metzger@intel.com> X-IsSubscribed: yes X-SW-Source: 2016-07/txt/msg00278.txt.bz2 Content-length: 4848 Trace gaps due to overflows or non-contiguous trace are ignored in the 'info record' command. Fix that. Also add a warning when decoding the trace and print the instruction number preceding the trace gap in that warning message. It looks like this: (gdb) info record Active record target: record-btrace Recording format: Intel Processor Trace. Buffer size: 16kB. warning: Decode error (-13) at instruction 101044 (offset = 0x29f0, pc = 0x7ffff728a642): no memory mapped at this address. Recorded 101044 instructions in 2093 functions (1 gaps) for thread 1 (process 5360). (gdb) record instruction-history 101044 101044 0x00007ffff728a640: pop %r13 [decode error (-13): no memory mapped at this address] Remove the dead code that was supposed to print a gaps warning at the end of trace decode. This isn't really needed since we now print a warning for each gap. 2016-07-22 Markus Metzger gdb/ * btrace.c (ftrace_add_pt): Fix gap indication. Add warning for non- contiguous trace and overflow. Rephrase trace decode warning and print instruction number. Remove dead gaps warning. (btrace_compute_ftrace_bts): Rephrase warnings and print instruction number. --- gdb/btrace.c | 54 +++++++++++++++++++++++++++++++++++------------------- 1 file changed, 35 insertions(+), 19 deletions(-) diff --git a/gdb/btrace.c b/gdb/btrace.c index f2cb750..5376cfa 100644 --- a/gdb/btrace.c +++ b/gdb/btrace.c @@ -629,11 +629,12 @@ btrace_compute_ftrace_bts (struct thread_info *tp, beginning. */ if (begin != NULL) { - warning (_("Recorded trace may be corrupted around %s."), - core_addr_to_string_nz (pc)); - end = ftrace_new_gap (end, BDE_BTS_OVERFLOW); ngaps += 1; + + warning (_("Recorded trace may be corrupted at instruction " + "%u (pc = %s)."), end->insn_offset - 1, + core_addr_to_string_nz (pc)); } break; } @@ -671,14 +672,15 @@ btrace_compute_ftrace_bts (struct thread_info *tp, /* We can't continue if we fail to compute the size. */ if (size <= 0) { - warning (_("Recorded trace may be incomplete around %s."), - core_addr_to_string_nz (pc)); - /* Indicate the gap in the trace. We just added INSN so we're not at the beginning. */ end = ftrace_new_gap (end, BDE_BTS_INSN_SIZE); ngaps += 1; + warning (_("Recorded trace may be incomplete at instruction %u " + "(pc = %s)."), end->insn_offset - 1, + core_addr_to_string_nz (pc)); + break; } @@ -749,11 +751,10 @@ ftrace_add_pt (struct pt_insn_decoder *decoder, { struct btrace_function *begin, *end, *upd; uint64_t offset; - int errcode, nerrors; + int errcode; begin = *pbegin; end = *pend; - nerrors = 0; for (;;) { struct btrace_insn btinsn; @@ -784,11 +785,29 @@ ftrace_add_pt (struct pt_insn_decoder *decoder, flag. The ENABLED instruction flag means that we continued from some other instruction. Indicate this as a trace gap. */ if (insn.enabled) - *pend = end = ftrace_new_gap (end, BDE_PT_DISABLED); + { + *pend = end = ftrace_new_gap (end, BDE_PT_DISABLED); + *ngaps += 1; + + pt_insn_get_offset (decoder, &offset); + + warning (_("Non-contiguous trace at instruction %u (offset " + "= 0x%" PRIx64 ", pc = 0x%" PRIx64 ")."), + end->insn_offset - 1, offset, insn.ip); + } /* Indicate trace overflows. */ if (insn.resynced) - *pend = end = ftrace_new_gap (end, BDE_PT_OVERFLOW); + { + *pend = end = ftrace_new_gap (end, BDE_PT_OVERFLOW); + *ngaps += 1; + + pt_insn_get_offset (decoder, &offset); + + warning (_("Overflow at instruction %u (offset = 0x%" PRIx64 + ", pc = 0x%" PRIx64 ")."), end->insn_offset - 1, + offset, insn.ip); + } } upd = ftrace_update_function (end, insn.ip); @@ -819,19 +838,16 @@ ftrace_add_pt (struct pt_insn_decoder *decoder, if (begin == NULL) continue; - pt_insn_get_offset (decoder, &offset); - - warning (_("Failed to decode Intel Processor Trace near trace " - "offset 0x%" PRIx64 " near recorded PC 0x%" PRIx64 ": %s."), - offset, insn.ip, pt_errstr (pt_errcode (errcode))); - /* Indicate the gap in the trace. */ *pend = end = ftrace_new_gap (end, errcode); *ngaps += 1; - } - if (nerrors > 0) - warning (_("The recorded execution trace may have gaps.")); + pt_insn_get_offset (decoder, &offset); + + warning (_("Decode error (%d) at instruction %u (offset = 0x%" PRIx64 + ", pc = 0x%" PRIx64 "): %s."), errcode, end->insn_offset - 1, + offset, insn.ip, pt_errstr (pt_errcode (errcode))); + } } /* A callback function to allow the trace decoder to read the inferior's -- 1.8.3.1