From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 46229 invoked by alias); 18 Aug 2015 06:30:18 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 46207 invoked by uid 89); 18 Aug 2015 06:30:15 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.8 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mga14.intel.com Received: from mga14.intel.com (HELO mga14.intel.com) (192.55.52.115) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 18 Aug 2015 06:30:14 +0000 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga103.fm.intel.com with ESMTP; 17 Aug 2015 23:30:13 -0700 X-ExtLoop1: 1 Received: from irsmsx109.ger.corp.intel.com ([163.33.3.23]) by orsmga001.jf.intel.com with ESMTP; 17 Aug 2015 23:30:12 -0700 Received: from irsmsx104.ger.corp.intel.com ([169.254.5.131]) by IRSMSX109.ger.corp.intel.com ([169.254.13.130]) with mapi id 14.03.0224.002; Tue, 18 Aug 2015 07:30:11 +0100 From: "Metzger, Markus T" To: Eli Zaretskii CC: "dje@google.com" , "palves@redhat.com" , "gdb-patches@sourceware.org" Subject: RE: [rfc] btrace: change record instruction-history /m Date: Tue, 18 Aug 2015 06:30:00 -0000 Message-ID: References: <1439552272-6256-1-git-send-email-markus.t.metzger@intel.com> <83bneanfvb.fsf@gnu.org> <834mk1obll.fsf@gnu.org> <83a8tqlznh.fsf@gnu.org> In-Reply-To: <83a8tqlznh.fsf@gnu.org> Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes X-SW-Source: 2015-08/txt/msg00452.txt.bz2 > -----Original Message----- > From: Eli Zaretskii [mailto:eliz@gnu.org] > Sent: Monday, August 17, 2015 5:10 PM > To: Metzger, Markus T > Cc: dje@google.com; palves@redhat.com; gdb-patches@sourceware.org > Subject: Re: [rfc] btrace: change record instruction-history /m >=20 > > From: "Metzger, Markus T" > > CC: "palves@redhat.com" , "gdb- > patches@sourceware.org" > > > > Date: Mon, 17 Aug 2015 07:15:37 +0000 > > > > > > >> Change record instruction-history /m to use its own simple source > > > interleaving > > > > >> algorithm. The most important part is that instructions are pri= nted in > > > > >> the order in which they were executed. > > > > > > > > > > What does "order in which they were executed" mean with today's > > > > > multi-core and multi-execution unit CPUs? > > > > > > > > > > Thanks. > > > > > > > > "multi-core" doesn't enter into the picture here. > > > > The context is a single thread of control. > > > > And "multi-execution unit" doesn't either because > > > > that's just an underlying implementation detail > > > > of the CPU - the program must behave "as if" > > > > each instruction is executed serially > > > > (or as otherwise defined by the ISA). > > > > > > You and I know that, but the text makes it sound as if each > > > instruction was somehow stamped with its execution time, and then the > > > instruction stream presented in that order, after annotating each > > > instruction with its source. And that's misleading, IMO, because > > > evidently that's not what will happen. > > > > It's not a per-instruction timestamp but it's h/w supported execution > tracing. > > The h/w generates a trace of executed instructions (per h/w thread), the > OS > > switches buffers to collect the trace per s/w thread, and GDB presents = this > to > > the user as execution-order disassembly (per thread). >=20 > So I suggest to tell that in the manual, and in general avoid saying > anything as definitive as "in the order they were executed", and > instead tell something like "in the order the hardware support for > execution tracing collects them". This at least will point interested > readers to the vendor of the hardware if they want to ask specific > questions about the order. How about "in the order they were recorded"? Markus. Intel Deutschland GmbH Registered Address: Am Campeon 10-12, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Christin Eisenschmid, Prof. Dr. Hermann Eul Chairperson of the Supervisory Board: Tiffany Doon Silva Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928