From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 96830 invoked by alias); 4 Mar 2020 20:45:15 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 96805 invoked by uid 89); 4 Mar 2020 20:45:14 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-5.1 required=5.0 tests=AWL,BAYES_00,SPF_HELO_PASS,SPF_PASS autolearn=ham version=3.3.1 spammy=placing, articles X-HELO: simark.ca Received: from simark.ca (HELO simark.ca) (158.69.221.121) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 04 Mar 2020 20:45:12 +0000 Received: from [172.16.0.95] (192-222-181-218.qc.cable.ebox.net [192.222.181.218]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPSA id 0AF1F1E4B2; Wed, 4 Mar 2020 15:45:11 -0500 (EST) Subject: Re: [PATCH v3] Implement debugging of WOW64 processes To: Hannes Domani , Gdb-patches References: <20200304191632.14947-1-ssbssa.ref@yahoo.de> <20200304191632.14947-1-ssbssa@yahoo.de> <711a3001-da27-4400-5d11-93ed14e503f2@simark.ca> <667267301.7060481.1583351203448@mail.yahoo.com> <8066975e-aabe-7c46-1ba2-1ad30f3c935e@simark.ca> <1757969531.7018208.1583353115677@mail.yahoo.com> From: Simon Marchi Message-ID: <9c1be8dc-6b4a-b492-e68d-44a486fe5b1c@simark.ca> Date: Wed, 04 Mar 2020 20:45:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 MIME-Version: 1.0 In-Reply-To: <1757969531.7018208.1583353115677@mail.yahoo.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-SW-Source: 2020-03/txt/msg00101.txt On 2020-03-04 3:18 p.m., Hannes Domani via gdb-patches wrote: > I tested watchpoints with WOW64 processes as well, didn't have any problems. I was expecting some problems in some corner cases. For example, see function x86_handle_nonaligned_watchpoint. If you make it believe that one watchpoint register can watch up to 8 bytes, when in reality they can watch just 4, then I can imagine that we could be placing an 8 bytes watchpoint, but miss a change somewhere in the last four bytes, something like that. However, according to the Intel Architecture Manual [1], section "17.2.6 Debug Registers and Intel 64 Processors", it says "Break point conditions for 8-byte memory read/writes are supported in all modes." So I presume that even when debugging a 32 bit process, 8-byte watchpoints will be supported, and that won't be a problem. Simon [1] https://software.intel.com/en-us/articles/intel-sdm