From dbaf5e7b1f35c7e97bf23aac846509b33eea491b Mon Sep 17 00:00:00 2001 From: Luis Machado Date: Fri, 15 May 2020 23:06:52 -0300 Subject: [PATCH] [ARM] Fix PR 26000, logical bitwise error / prologue analyzer This fixes an instruction mask typo. We should be matching only ldrd (immediate) and not any other of its variants. As is, it never matches anything. With the patch, the instruction mask also allows matching of ldrd (literal), but the check for SP discards this particular instruction pattern, as it has a hardcoded PC register. gdb/ChangeLog: 2020-05-25 Luis Machado PR tdep/26000 * arm-tdep.c (thumb_analyze_prologue): Fix instruction matching for ldrd (immediate). --- gdb/arm-tdep.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 40bffbb2dd..9a73b85899 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -931,7 +931,7 @@ thumb_analyze_prologue (struct gdbarch *gdbarch, parameters from memory. */ ; - else if ((insn & 0xffb0) == 0xe950 /* ldrd Rt, Rt2, + else if ((insn & 0xff70) == 0xe950 /* ldrd Rt, Rt2, [Rn, #+/-imm] */ && pv_is_register (regs[bits (insn, 0, 3)], ARM_SP_REGNUM)) /* Similarly ignore dual loads from the stack. */ -- 2.17.1