From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 30140 invoked by alias); 6 Jul 2009 19:05:13 -0000 Received: (qmail 30119 invoked by uid 22791); 6 Jul 2009 19:05:10 -0000 X-SWARE-Spam-Status: No, hits=-1.0 required=5.0 tests=AWL,BAYES_00,J_CHICKENPOX_23,J_CHICKENPOX_24,J_CHICKENPOX_25,J_CHICKENPOX_28 X-Spam-Check-By: sourceware.org Received: from web112508.mail.gq1.yahoo.com (HELO web112508.mail.gq1.yahoo.com) (98.137.26.150) by sourceware.org (qpsmtpd/0.43rc1) with SMTP; Mon, 06 Jul 2009 19:05:01 +0000 Received: (qmail 82935 invoked by uid 60001); 6 Jul 2009 19:04:59 -0000 Message-ID: <978078.82017.qm@web112508.mail.gq1.yahoo.com> Received: from [123.238.27.12] by web112508.mail.gq1.yahoo.com via HTTP; Mon, 06 Jul 2009 12:04:58 PDT Date: Mon, 06 Jul 2009 19:05:00 -0000 From: paawan oza Subject: Re: i386.record.floating.point.patch : with more testing and assurity To: Hui Zhu Cc: Michael Snyder , Mark Kettenis , "pedro@codesourcery.com" , "gdb-patches@sourceware.org" MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: quoted-printable Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2009-07/txt/msg00156.txt.bz2 Hi, please find the latest patch and ChangeLog as follows. ******************** ChangeLog ******************** Current: gdb-6.8.50.20090706 2009-07-06 Oza * i386-tdep.c: Support for floating point recording. *************************** i386.records.floats.patch *************************** diff -urN ./gdb.orig/i386-tdep.c gdb.new/i386-tdep.c --- ./gdb.orig/i386-tdep.c 2009-07-02 13:25:54.000000000 -0400 +++ gdb.new/i386-tdep.c 2009-07-06 23:44:07.000000000 -0400 @@ -3056,6 +3056,66 @@ return 0; } =20 + +/* Defines contents to record. */ +#define I386_SAVE_FPU_REGS 0xfffd +#define I386_SAVE_FPU_ENV 0xfffe +#define I386_SAVE_FPU_ENV_REG_STACK 0xffff + +/* Record the value of floating point registers which will be changed by t= he + Current instruction to "record_arch_list".=20=20 + Return -1 if something is wrong. */=20=20 + +static int i386_record_floats(struct gdbarch *gdbarch,=20 + struct i386_record_s *ir,=20 + uint32_t iregnum) +{ + struct gdbarch_tdep *tdep =3D gdbarch_tdep (gdbarch); + int i; + + /* Oza : because of floating point insn push/pop of fpu stack=20 + Is going to happen. currently we store st0-st7 registers,=20 + But we need not store all registers all the time, In future=20 + We use ftag register and record only those who are not marked as an empt= y.=20=20 + */ + if (I386_SAVE_FPU_REGS =3D=3D iregnum) + { + for (i =3D I387_ST0_REGNUM (tdep);i <=3D I387_ST0_REGNUM (tdep) + 7;= i++) + { + if (record_arch_list_add_reg (ir->regcache,i)) + return -1; + } + } + else if (I386_SAVE_FPU_ENV =3D=3D iregnum) + { + for (i =3D I387_FCTRL_REGNUM(tdep);i <=3D I387_FOP_REGNUM(tdep);i++) + { + if (record_arch_list_add_reg (ir->regcache,i)) + return -1; + } + } + else if (I386_SAVE_FPU_ENV_REG_STACK =3D=3D iregnum) + { + for (i =3D I387_ST0_REGNUM (tdep);i <=3D I387_FOP_REGNUM(tdep);i++) + { + if (record_arch_list_add_reg (ir->regcache,i)) + return -1;=20=20=20=20 + } + } + else if ((iregnum >=3D I387_ST0_REGNUM (tdep)) &&=20 + (iregnum <=3D I387_FOP_REGNUM(tdep))) + { + if (record_arch_list_add_reg (ir->regcache,iregnum)) + return -1; + } + else + { + /* Parameter error. */ + return -1; + }=20 + return 0; +} + /* Parse the current instruction and record the values of the registers and memory that will be changed in current instruction to "record_arch_list= ". Return -1 if something wrong. */ @@ -3070,6 +3130,7 @@ uint32_t tmpu32; uint32_t opcode; struct i386_record_s ir; + struct gdbarch_tdep *tdep =3D gdbarch_tdep (gdbarch); =20 memset (&ir, 0, sizeof (struct i386_record_s)); ir.regcache =3D regcache; @@ -4105,8 +4166,7 @@ } break; =20 - /* floats */ - /* It just record the memory change of instrcution. */ + /* Floats. */ case 0xd8: case 0xd9: case 0xda: @@ -4120,46 +4180,57 @@ ir.reg |=3D ((opcode & 7) << 3); if (ir.mod !=3D 3) { - /* memory */ + /* Memory. */ uint32_t addr; =20 if (i386_record_lea_modrm_addr (&ir, &addr)) return -1; switch (ir.reg) { - case 0x00: - case 0x01: case 0x02: - case 0x03: + case 0x12: + case 0x22: + case 0x32: + /* For fcom, ficom nothing to do. */ + break; + case 0x03: + case 0x13: + case 0x23: + case 0x33: + /* For fcomp, ficomp pop FPU stack, store all. */ + if (i386_record_floats(gdbarch, &ir, I386_SAVE_FPU_REGS)) + return -1; + break; + case 0x00: + case 0x01: case 0x04: case 0x05: case 0x06: case 0x07: case 0x10: - case 0x11: - case 0x12: - case 0x13: + case 0x11: case 0x14: case 0x15: case 0x16: case 0x17: case 0x20: case 0x21: - case 0x22: - case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: case 0x30: case 0x31: - case 0x32: - case 0x33: case 0x34: case 0x35: case 0x36: case 0x37: - break; + /* For fadd, fmul, fsub, fsubr, fdiv, fdivr, fiadd, fimul,=20 + fisub, fisubr, fidiv, fidivr, modR/M.reg is an extension = of code,=20 + Always affects st(0) register. */ + if (i386_record_floats(gdbarch, &ir, I387_ST0_REGNUM (tdep))) + return -1; + break;=20=20=20=20=20=20=20=20=20=20=20=09=20=20=20=20=09=20= =20=20=20 case 0x08: case 0x0a: case 0x0b: @@ -4167,6 +4238,7 @@ case 0x19: case 0x1a: case 0x1b: + case 0x1d:=20 case 0x28: case 0x29: case 0x2a: @@ -4174,11 +4246,16 @@ case 0x38: case 0x39: case 0x3a: - case 0x3b: + case 0x3b:=09=20=20=20 + case 0x3c:=20 + case 0x3d:=20 switch (ir.reg & 7) { case 0: - break; + /* Handling fld, fild. */ + if (i386_record_floats(gdbarch, &ir, I386_SAVE_FPU_REGS)) + return -1;=20=20=20=20 + break; case 1: switch (ir.reg >> 4) { @@ -4191,6 +4268,7 @@ return -1; break; case 3: + break; default: if (record_arch_list_add_mem (addr, 2)) return -1; @@ -4201,15 +4279,48 @@ switch (ir.reg >> 4) { case 0: + if (record_arch_list_add_mem (addr, 4)) + return -1; + if (3 =3D=3D (ir.reg & 7)) + { + /* For fstp m32fp */ + if (i386_record_floats(gdbarch, &ir, \ + I386_SAVE_FPU_REGS)) + return -1;=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20= =20=20=20=20=20=20=20 + }=20 + break; case 1: if (record_arch_list_add_mem (addr, 4)) return -1; + if ((3 =3D=3D (ir.reg & 7)) \ + || (5 =3D=3D (ir.reg & 7)) \ + || (7 =3D=3D (ir.reg & 7))) + { + /* For fstp insn */ + if (i386_record_floats(gdbarch, &ir, \ + I386_SAVE_FPU_REGS)) + return -1;=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20= =20=20=20=20=20=20=20 + }=20 break; case 2: if (record_arch_list_add_mem (addr, 8)) return -1; + if (3 =3D=3D (ir.reg & 7)) + { + /* For fstp m64fp */ + if (i386_record_floats(gdbarch, &ir, \ + I386_SAVE_FPU_REGS)) + return -1;=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20= =20=20=20=20=20=20=20 + }=20 break; case 3: + if ((3 <=3D (ir.reg & 7)) && (6 <=3D (ir.reg & 7))) + { + /* For fistp, fbld, fild, fbstp. */ + if (i386_record_floats(gdbarch, &ir, \ + I386_SAVE_FPU_REGS)) + return -1;=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20= =20=20=20=20=20=20=20 + }=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20= =20=20=20=20=20=20=20=20 default: if (record_arch_list_add_mem (addr, 2)) return -1; @@ -4218,54 +4329,74 @@ break; } break; - case 0x0c: - case 0x0d: - case 0x1d: - case 0x2c: - case 0x3c: - case 0x3d: - break; - case 0x0e: + case 0x0c: + /* Insn fldenv. */ + if (i386_record_floats(gdbarch, &ir, \ + I386_SAVE_FPU_ENV_REG_STACK)) + return -1;=20=20 + break; + case 0x0d:=20 + /* Insn fldcw. */ + if (i386_record_floats(gdbarch, &ir, I387_FCTRL_REGNUM (tdep))) + return -1;=20=20 + break; + case 0x2c:=20 + /* Insn frstor. */ + if (i386_record_floats(gdbarch, &ir, \ + I386_SAVE_FPU_ENV_REG_STACK)) + return -1;=20=20 + break;=20 + case 0x0e:=20 if (ir.dflag) { - if (record_arch_list_add_mem (addr, 28)) - return -1; + if (record_arch_list_add_mem (addr, 28)) + return -1; } else { - if (record_arch_list_add_mem (addr, 14)) - return -1; + if (record_arch_list_add_mem (addr, 14)) + return -1; } break; - case 0x0f: - case 0x2f: + case 0x0f:=20=20 + case 0x2f:=20=20 if (record_arch_list_add_mem (addr, 2)) return -1; break; - case 0x1f: - case 0x3e: + case 0x1f:=20=20 + case 0x3e:=20=20 if (record_arch_list_add_mem (addr, 10)) return -1; + /* Insn fstp, fbstp. */ + if (i386_record_floats(gdbarch, &ir, I386_SAVE_FPU_REGS)) + return -1;=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20= =20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20 break; - case 0x2e: + case 0x2e:=20 if (ir.dflag) { - if (record_arch_list_add_mem (addr, 28)) - return -1; - addr +=3D 28; + if (record_arch_list_add_mem (addr, 28)) + return -1; + addr +=3D 28; } else { - if (record_arch_list_add_mem (addr, 14)) - return -1; - addr +=3D 14; + if (record_arch_list_add_mem (addr, 14)) + return -1; + addr +=3D 14; } if (record_arch_list_add_mem (addr, 80)) return -1; + /* Insn fsave. */ + if (i386_record_floats(gdbarch, &ir, \ + I386_SAVE_FPU_ENV_REG_STACK)) + return -1;=20=20=20 break; - case 0x3f: + case 0x3f:=20 if (record_arch_list_add_mem (addr, 8)) return -1; + /* Ins fistp. */ + if (i386_record_floats(gdbarch, &ir, I386_SAVE_FPU_REGS)) + return -1;=20=20=20 break; default: ir.addr -=3D 2; @@ -4273,9 +4404,198 @@ goto no_support; break; } - } + }=20=20=20 + /* Opcode is an extension of modR/M byte. */=20=20=20=20=20 + else + {=20 + switch (opcode) + { + case 0xd8: + if (i386_record_floats(gdbarch, &ir, I387_ST0_REGNUM (tdep))) + return -1;=09 + break; + case 0xd9:=20=20=20=20 + if (0x0c =3D=3D (ir.modrm >> 4)) + { + if ((ir.modrm & 0x0f) <=3D 7) + { + if (i386_record_floats(gdbarch, &ir, I386_SAVE_FPU_REG= S)) + return -1;=09 + } + else + { + if (i386_record_floats(gdbarch, &ir, \ + I387_ST0_REGNUM (tdep))) + return -1;=09 + /* If only st(0) is changing, then we have already rec= orded */ + if ((ir.modrm & 0x0f) - 0x08) + { + if (i386_record_floats(gdbarch, &ir, \ + I387_ST0_REGNUM (tdep) + ((ir.modrm & 0x0f) - 0x08= ))) + return -1;=09=20=20=20=20=20=20=20=20=20=20=20=20= =20=20=20=20=20=20=20=20=20=20 + }=20 + }=20=20 + } + else + { + switch(ir.modrm) + { + case 0xe0: + case 0xe1: + case 0xf0: + case 0xf5: + case 0xf8: + case 0xfa: + case 0xfc: + case 0xfe: + case 0xff: + if (i386_record_floats(gdbarch, &ir, \ + I387_ST0_REGNUM (tdep))) + return -1; + break;=20=20=20=20=20=20=20=20=20=20=20 + case 0xf1:=20=20 + case 0xf2:=20=20 + case 0xf3:=20=20 + case 0xf4: + case 0xf6:=20 + case 0xf7:=20=20=20=20 + case 0xe8:=20=20 + case 0xe9:=20=20 + case 0xea:=20=20 + case 0xeb: + case 0xec:=20=20=20=20=20=20=20=20 + case 0xed:=20=20=20=20 + case 0xee:=20=20=20 + case 0xf9:=20=20=20=20=20 + case 0xfb: + if (i386_record_floats(gdbarch, &ir, I386_SAVE_FPU_REG= S)) + return -1;=09 + break; + case 0xfd:=20 + if (i386_record_floats(gdbarch, &ir, \ + I387_ST0_REGNUM (tdep))) + return -1; + if (i386_record_floats(gdbarch, &ir, \ + I387_ST0_REGNUM (tdep) + 1)) + return -1; + break; + }=20 + } + break; + case 0xda: + if (0xe9 =3D=3D ir.modrm) + { + if (i386_record_floats(gdbarch, &ir, I386_SAVE_FPU_REGS)) + return -1;=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20= =20=20=20=20=20 + } + else if ((0x0c =3D=3D ir.modrm >> 4) || (0x0d =3D=3D ir.modr= m >> 4)) + { + if (i386_record_floats(gdbarch, &ir, I387_ST0_REGNUM (tdep= ))) + return -1;=09=20=20=20=20=20=20=20=20=20=20=20=20=20=20= =20=20 + if (((ir.modrm & 0x0f) > 0) && ((ir.modrm & 0x0f) <=3D 7)) + { + if (i386_record_floats(gdbarch, &ir, \ + I387_ST0_REGNUM (tdep) + (ir.modrm & 0x0f))) + return -1;=09=20=20=20=20=20=20=20=20=20=20=20=20=20= =20=20=20=20=20=20=20=20=20 + } + else if ((ir.modrm & 0x0f) - 0x08) + { + if (i386_record_floats(gdbarch, &ir, \ + I387_ST0_REGNUM (tdep) + ((ir.modrm & 0x0f) - 0x08))) + return -1; + } + }=20=20 + break;=20 + case 0xdb: + if (0xe3 =3D=3D ir.modrm) + { + if (i386_record_floats(gdbarch, &ir, I386_SAVE_FPU_ENV)) + return -1;=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20= =20=20=20=20=20 + } + else if ((0x0c =3D=3D ir.modrm >> 4) || (0x0d =3D=3D ir.modr= m >> 4)) + { + if (i386_record_floats(gdbarch, &ir, I387_ST0_REGNUM (tdep= ))) + return -1;=09=20=20=20=20=20=20=20=20=20=20=20=20=20=20= =20=20 + if (((ir.modrm & 0x0f) > 0) && ((ir.modrm & 0x0f) <=3D 7)) + { + if (i386_record_floats(gdbarch, &ir, \ + I387_ST0_REGNUM (tdep) + (ir.modrm & 0x0f))) + return -1;=09=20=20=20=20=20=20=20=20=20=20=20=20=20= =20=20=20=20=20=20=20=20=20 + } + else if ((ir.modrm & 0x0f) - 0x08) + { + if (i386_record_floats(gdbarch, &ir, \ + I387_ST0_REGNUM (tdep) + ((ir.modrm & 0x0f) - 0x08))) + return -1; + } + }=20=20 + break; + case 0xdc: + if ( (0x0c =3D=3D ir.modrm >> 4) \ + || (0x0d =3D=3D ir.modrm >> 4) \ + || (0x0f =3D=3D ir.modrm >> 4)) + { + if ((ir.modrm & 0x0f) <=3D 7) + { + if (i386_record_floats(gdbarch, &ir, \ + I387_ST0_REGNUM (tdep) + (ir.modrm & 0x0f))) + return -1;=09=20=20=20=20=20=20=20=20=20=20=20=20=20= =20=20=20=20=20=20=20=20=20 + } + else + { + if (i386_record_floats(gdbarch, &ir, \ + I387_ST0_REGNUM (tdep) + ((ir.modrm & 0x0f) - 0x08))) + return -1; + } + }=20=20 + break; + case 0xdd:=20=20=20=20=20=20=20=20=20=20=20=20=20 + if (0x0c =3D=3D ir.modrm >> 4) + { + if (i386_record_floats(gdbarch, &ir, \ + I387_FTAG_REGNUM (tdep))) + return -1; + } + else if ((0x0d =3D=3D ir.modrm >> 4) || (0x0e =3D=3D ir.modr= m >> 4)) + {=20 + if ((ir.modrm & 0x0f) <=3D 7) + { + if (i386_record_floats(gdbarch, &ir, \ + I387_ST0_REGNUM (tdep) + (ir.modrm & 0x0f))) + return -1;=09=20 + } + else + { + if (i386_record_floats(gdbarch, &ir, I386_SAVE_FPU_R= EGS)) + return -1; + } + }=20=20=20=20=20=20=20=20=20=20=20=20 + break; + case 0xde: + if ((0x0c =3D=3D ir.modrm >> 4) \ + || (0x0e =3D=3D ir.modrm >> 4) \ + || (0x0f =3D=3D ir.modrm >> 4) \ + || (0xd9 =3D=3D ir.modrm)) + {=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20 + if (i386_record_floats(gdbarch, &ir, I386_SAVE_FPU_REGS)) + return -1;=09=20 + }=20=20=20 + break; + case 0xdf: + if (0xe0 =3D=3D ir.modrm) + { + if (record_arch_list_add_reg (ir.regcache, I386_EAX_REGN= UM)) + return -1; + } + else if ((0x0f =3D=3D ir.modrm >> 4) || (0x0e =3D=3D ir.modr= m >> 4)) + {=20 + if (i386_record_floats(gdbarch, &ir, I386_SAVE_FPU_REGS)) + return -1; + }=20 + break; + }=20=09=20=20 + }=20=20=20=20=20=20=20=20=20 break; - /* string ops */ /* movsS */ case 0xa4: @@ -4694,10 +5014,17 @@ /* fwait */ /* XXX */ case 0x9b: - printf_unfiltered (_("Process record doesn't support instruction " - "fwait.\n")); - ir.addr -=3D 1; - goto no_support; + if (target_read_memory (ir.addr, &tmpu8, 1)) + { + if (record_debug) + printf_unfiltered (_("Process record: error reading memory at " + "addr 0x%s len =3D 1.\n"), + paddress (gdbarch, ir.addr)); + return -1; + } + opcode =3D (uint32_t) tmpu8; + ir.addr++; + goto reswitch;=20=20=20=20=20 break; =20 /* int3 */ --- On Sun, 7/5/09, Hui Zhu wrote: > From: Hui Zhu > Subject: Re: i386.record.floating.point.patch : with more testing and ass= urity > To: "paawan oza" > Cc: "Michael Snyder" , "Mark Kettenis" , "pedro@codesourcery.com" , "gdb-patche= s@sourceware.org" > Date: Sunday, July 5, 2009, 3:45 PM > Hi Paawan, >=20 > 1.=A0 gcc -g -O2=A0=A0=A0-I. -I../../src/gdb > -I../../src/gdb/common > -I../../src/gdb/config > -DLOCALEDIR=3D"\"/usr/local/share/locale\"" > -DHAVE_CONFIG_H -I../../src/gdb/../include/opcode > -I../../src/gdb/../readline/.. -I../bfd > -I../../src/gdb/../bfd > -I../../src/gdb/../include -I../libdecnumber > -I../../src/gdb/../libdecnumber=A0 > -I../../src/gdb/gnulib -Ignulib > -DMI_OUT=3D1 -DTUI=3D1=A0 -Wall > -Wdeclaration-after-statement > -Wpointer-arith -Wformat-nonliteral -Wno-pointer-sign > -Wno-unused > -Wno-switch -Wno-char-subscripts -Werror -c -o i386-tdep.o > -MT > i386-tdep.o -MMD -MP -MF .deps/i386-tdep.Tpo > ../../src/gdb/i386-tdep.c > cc1: warnings being treated as errors > ../../src/gdb/i386-tdep.c: In function > 'i386_process_record': > ../../src/gdb/i386-tdep.c:4985: warning: implicit > declaration of > function 'paddr_nz' > ../../src/gdb/i386-tdep.c:4985: warning: format '%s' > expects type > 'char *', but argument 2 has type 'int' > make[2]: *** [i386-tdep.o] Error 1 > make[2]: Leaving directory `/media/disk/gdb/bgdb/gdb' > make[1]: *** [all-gdb] Error 2 > make[1]: Leaving directory `/media/disk/gdb/bgdb' > make: *** [all] Error 2 >=20 > paddr_nz was removed.=A0 Please update your patch follow > cvs-head. >=20 > 2. +#define I386_SAVE_FPU_REGS=A0=A0=A0 > =A0=A0=A0 0xFFFD > +#define I386_SAVE_FPU_ENV=A0=A0=A0 > =A0=A0=A0 0xFFFE > +#define I386_SAVE_FPU_ENV_REG_STACK=A0=A0=A0 > 0xFFFF >=20 > They just used in prec right?=A0 Maybe you can move them > close to record > code in i386-tedp.c. >=20 > 3. +static int i386_record_floats(struct i386_record_s *ir, > uint32_t iregnum) > +{ > +=A0 int i; > + > +=A0 /* Oza : push/pop of fpu stack is going to happen > +=A0 =A0=A0=A0currently we store st0-st7 > registers, but we need not store all > registers all the time. > +=A0 =A0=A0=A0using fstatus, we use 11-13 bits > which gives us stack top and > hence we optimize our storage. > +=A0 =A0=A0=A0alternatively we can use ftag > register too */ > +=A0 if (I386_SAVE_FPU_REGS =3D=3D iregnum) > +=A0 =A0 { > +=A0 =A0 =A0 for > (i=3DI386_ST0_REGNUM;i<=3DI386_ST0_REGNUM+7;i++) > +=A0 =A0 =A0 =A0 { > +=A0 =A0 =A0 =A0 =A0 if > (record_arch_list_add_reg (ir->regcache,i)) > +=A0 =A0 =A0 =A0 =A0 =A0 return -1; > +=A0 =A0 =A0 =A0 } > +=A0 =A0 } > About the number of fp regs.=A0 Please use the code: > #define I387_ST0_REGNUM(tdep) ((tdep)->st0_regnum) > #define I387_NUM_XMM_REGS(tdep) ((tdep)->num_xmm_regs) > #define I387_MM0_REGNUM(tdep) ((tdep)->mm0_regnum) >=20 > #define I387_FCTRL_REGNUM(tdep) (I387_ST0_REGNUM (tdep) + > 8) > #define I387_FSTAT_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) + > 1) > #define I387_FTAG_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) + > 2) > #define I387_FISEG_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) + > 3) > #define I387_FIOFF_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) + > 4) > #define I387_FOSEG_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) + > 5) > #define I387_FOOFF_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) + > 6) > #define I387_FOP_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) + > 7) > #define I387_XMM0_REGNUM(tdep) (I387_ST0_REGNUM (tdep) + > 16) > #define I387_MXCSR_REGNUM(tdep) \ > =A0 (I387_XMM0_REGNUM (tdep) + I387_NUM_XMM_REGS > (tdep)) >=20 > They are in i387-tdep.h. >=20 > And maybe you can try function i387_supply_fsave and > i387_collect_fsave. >=20 >=20 > 4.=A0 Your code's format is not very well.=A0 Please > make it like the code in cvs. >=20 >=20 >=20 > Thanks, > Hui >=20 >=20 >=20 >=20 > On Sat, Jul 4, 2009 at 13:19, paawan oza > wrote: > > > > Hi, > > > > Actually, the initial patch which I submitted were > using them. > > but as I have incorporated Hui's comments I have > removed those constants completely. > > in the sense I have no longer extended the > enumration. > > > > but of course, those registers are recorded as and > when required. > > e.g. (ffree insn changes FTAG register, so we record > it) > > > > Regards, > > Oza. > > > > --- On Sat, 7/4/09, Michael Snyder > wrote: > > > >> From: Michael Snyder > >> Subject: Re: i386.record.floating.point.patch : > with more testing and assurity > >> To: "paawan oza" > >> Cc: "Mark Kettenis" , > "pedro@codesourcery.com" > , > "teawater@gmail.com" > , > "gdb-patches@sourceware.org" > > >> Date: Saturday, July 4, 2009, 3:19 AM > >> paawan oza wrote: > >> > Hi, > >> > > >> > In My understanding the point was like > below. > >> > in the patch there were following register > extended in > >> enumeration in i386-tdep.h > >> > > >> > I386_FSTAT, > >> > I386_FTAG,=A0 =A0 =A0=A0=A0I386_FISEG, > >> > I386_FIOFF, > >> > I386_FOSEG, > >> > I386_FOOFF, > >> > I386_FOP > >> > > >> > > >> > According to Hui in some of his previous > mails...his > >> idea was > >> >> FCTRL, FOP and so on are the fp reg of > >> amd64.=A0 For now, prec is still > >> >> not support amd64 And amd64's support are > in > >> amd64-tedp.... files.=A0 >Change i386_regnum is > not a > >> good idea. I suggest you divide fp patch to 2 > >parts. One > >> is for i386, the other for amd64. For now, just > send i386 > >> patch >for review.=A0 And send amd64 patch when > prec > >> support amd64" > >> > > >> > > >> > while, my idea/understanding is: > >> > FCTRL, FOP registers are not only a part of > amd64, but > >> also part of i386 (x87 FPU unit) also. > >> > so according to me these registers are part > of i386 > >> also and it needed to be also in i386-tdep.h. > >> > > >> > Regards, > >> > Oza. > >> > >> I'm not sure why you want to add those constants > to > >> i386-tdep.h, > >> when the rest of your patch does not seem to use > them. > >> > >> > > > > > > > > >=20